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94a9038826
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77 Commits

Author SHA1 Message Date
gbeauche
94a9038826 - Remove dead code in readcpu.cpp concerning CONST_JUMP control flow. 
- Replace unused fl_compiled with fl_const_jump
- Implement block inlining enabled with USE_INLINING && USE_CHECKSUM_INFO.
  However, this is currently disabled as it doesn't give much and exhibits
  even more a cache/code generation problem with FPU JIT compiled code.
- Actual checksum values are now integral part of a blockinfo regardless
  of USE_CHECKSUM_INFO is set or not. Reduce number of elements in that
  structure and speeds up a little calculation of checksum of chained blocks.
- Don't care about show_checksum() for now.
 2002-10-02 15:55:10 +00:00
gbeauche
21909f1eed - Rewrite blockinfo allocator et al. Use a template class so that this 
can work with other types related to blockinfos.
- Add new method to compute checksums. This should permit code inlining
  and follow-ups of const_jumps without breaking the lazy cache invalidator.
  aka. chain infos for checksuming. TODO: Incomplete support thus disabled.
 2002-10-01 16:22:36 +00:00
gbeauche
75de104c92 - Optimize use of quit_program variable. This is a real boolean for B2. 
- Remove unused/dead code concerning surroundings of (debugging).
- m68k_compile_execute() is generated and optimized code now.
 2002-10-01 09:39:55 +00:00
gbeauche
bdf9d76bb8 - #include "flags_x86.h" here to get NATICE_CC_?? helper macros 
- Add raw_cmp_b_mi() and raw_call_m_indexed() for generated
  m68k_compile_execute() function
 2002-10-01 09:37:03 +00:00
gbeauche
8748b48b7a Disable USE_QUAD_DOUBLE for now and probably for good as (i) the emulator 
implementation is not correct, (ii) I don't know of any CPU which
handles this kind of format *natively* with conformance to IEEE.
 2002-09-20 16:52:48 +00:00
gbeauche
ec92457d68 Fix align_jumps for athlon, that's really "16" and gcc-3.2 sources contained 
the same error. ;-)
 2002-09-20 14:55:50 +00:00
gbeauche
d7c677d077 - Implement {make,extract}_extended() for USE_QUAD_DOUBLE 
- Don't forget to fill in mantissa3 member for USE_QUAD_DOUBLE in
  make_extended_*() but make sure NaN, inf, zeros are handled beforehand
 2002-09-19 20:52:50 +00:00
gbeauche
a5ba7ea5ac Don't define USE_LONG_DOUBLE when sizeof(long double) == 16. This still 
is not very clean but it should build now. Probably live with USE_LONG_DOUBLE
for any case where native long double exists and sizeof > 8 ?
 2002-09-19 16:02:13 +00:00
gbeauche
b765112cf9 Get rid of any "extern inline" bits. Use static inline instead as MIPS 
compilers don't really like the former syntax.
 2002-09-19 15:42:16 +00:00
gbeauche
ecd3db832e - Rewrite raw_init_cpu() to match more details, from kernel sources. 
- Add possibility to tune code alignment to the underlying processor. However,
  this is turned off as I don't see much improvement and align_jumps = 64
  for Athlon looks suspicious to me.
- Remove two extra align_target() that are already covered.
- Remove unused may_trap() predicate.
 2002-09-19 14:59:03 +00:00
gbeauche
feca66d43e Optimize runtime assembler with shorter equivalents when the accumulator 
(%eax) is referenced along with immediates.
 2002-09-18 15:56:17 +00:00
gbeauche
54ac7a1493 Move -DSAHF_SETO_PROFITABLE down in x86 & gas specific block. Also ensure 
SAHF_SETO_PROFITABLE is defined when compiling the JIT. Aka I don't want
to support obsolete and probably bogus code nowadays.
 2002-09-18 11:41:56 +00:00
gbeauche
c40279294a Don't forget to use vm_realease() to free up translation cache. Also free 
the right amount of memory that was previously allocated.
 2002-09-18 09:55:37 +00:00
gbeauche
599f7e845f Use vm_acquire() to allocate translation cache 2002-09-18 07:50:55 +00:00
gbeauche
4fc127c8df - Changes to support 68040 -> x86 dynamic translator 
- Globalize FLIGHT_RECORDER, possibly used in compiler/ sources as well
 2002-09-17 16:05:39 +00:00
gbeauche
c0526db089 Import JIT compiler 2002-09-17 16:04:06 +00:00
gbeauche
6af88bc787 Only use *l() math functions when they are available 2002-09-16 15:40:23 +00:00
gbeauche
48986febc6 - FP endianness is now testing at configure time 
- Fix junk introduced in previous rev for extract_extended()
 2002-09-16 12:01:38 +00:00
gbeauche
e59e4904d3 Fix "ieee" FPU core on big endian and without long double > double support 
- Handle conversions to/from host double for m68k long doubles formats
- Make mathlib aware of sizeof(long double) == sizeof(double) arches
- Attempt to fix FSCALE implementation
 2002-09-15 18:21:13 +00:00
gbeauche
57e73de5f6 USE_LONG_DOUBLE guards 2002-09-13 15:06:42 +00:00
gbeauche
a50871f87c Updates for new FPU core architecture 2002-09-13 12:50:56 +00:00
gbeauche
c327eee41b * Basilisk II JIT integration, phase 2: 
- Add new FPU core architecture
- Clean fpu_x86_asm.h as it is no longer automatically generated
 2002-09-13 12:50:40 +00:00
gbeauche
d3bda319a8 Use B2_mutex instead of pthread mutexes when ENABLE_EXCLUSIVE_SPCFLAGS is 
set. However, this is not used at the moment. Is there an advantage? People
may want to add arch-optimized SPCFLAGS_{SET,CLEAR}.
 2002-09-01 16:32:02 +00:00
gbeauche
7972082c56 - Merge with Basilisk II/JIT cpu core, interpretive part for now 
- Clean use of USE_PREFETCH_BUFFER macro and dependent bits
 2002-09-01 15:17:13 +00:00
gbeauche
9534ec2fc8 - Update to fix build with gcc-3.1 and -O3 optimization level 2002-03-27 10:45:59 +00:00
gbeauche
f5e58c95d6 - When X86_ASSEMBLY is set, aka when cpuopti is used, do call the 
instruction handler by hand and make sure to save %ebp too
- Really merge cpu core with uae-0.8.21:
  - Trace mode fixes (Bernd Roesch & Bernd Schmidt)
  - Reintegrate PTEST and PFLUSH instructions back as no-ops
 2002-03-23 13:57:38 +00:00
gbeauche
a42a559bf1 - Close log file 2002-03-18 21:25:07 +00:00
gbeauche
2762a7dd48 - Add Flight Recorder for m68k too. That helps. ;-) 2002-03-16 16:31:54 +00:00
cebix
628533940d - documentation updates 
- 2001 -> 2002
- version 0.9 -> 1.0
 2002-01-15 14:58:43 +00:00
gbeauche
eec091e56b - Fix condition codes handling for BFINS instructions (uae 0.8.20) 2002-01-06 08:21:09 +00:00
gbeauche
f93d1b483d - merge 680x0 emulation core with uae 0.8.17 2001-08-19 16:21:01 +00:00
cebix
20db0c7260 - 1-bit mode under X11 always uses default visual 
- fixed possible crash in driver_window dtor (image data would be freed twice,
  once by XDestroyImage() and once in driver_base dtor)
- fixed compilation problems with banked memory
- fixed typos
 2001-07-14 15:02:49 +00:00
gbeauche
1c6d6d7cb2 - merged some code from uae-0.8.16 2001-07-13 10:13:58 +00:00
gbeauche
cb59a85240 - Experimental fixes for 64-bit addressing systems (e.g. Linux/ia64). The 
cpu emulation almost work correctly. FP emulation seems totaly boguous.
 2001-07-07 09:08:54 +00:00
cebix
0cf3f32b7d video_x.cpp supports resolution switching in windowed mode: the available 
resolutions are 512x384, 640x480, 800x600, 1024x768 and 1280x1024 (the prefs
editor has to be updated to reflect this). The resolution selected in the
prefs editor is used as the default, but it can be changed in the Monitors
control panel. So far only tested with direct addressing.
 2001-06-28 21:20:02 +00:00
gbeauche
dae4fb627c - added SIGSEGV support for Linux/Alpha (to be checked), Darwin/PPC 
- added uniform virtual memory allocation
  (supports mmap(), vm_allocate(), or fallbacks to malloc()/free())
- cleaned up memory allocation in main_unix.cpp
 2001-06-26 22:35:42 +00:00
gbeauche
19cda89b5e - NEGX may use X & Z flags 2001-06-05 12:23:27 +00:00
gbeauche
fedb56d8af - fixes for gcc-3.0 2001-04-25 14:53:45 +00:00
gbeauche
ebb5be06cf - fixed operand number for source register (do_fmod) 2001-04-09 14:19:58 +00:00
cebix
3b54f1f8de - FreeBSD configure script cleanups [Michael Alyn Miller] 
- ether_linux.cpp moved and renamed to ether_unix.cpp, now also works with
  the tap driver under FreeBSD [Michael Alyn Miller]
- fpu_x86_asm.h: fixed problem in with newer GCC pre-processors
 2001-03-29 14:20:55 +00:00
gbeauche
6059507910 Moved FPU emulation code sources to uae_cpu/fpu/ 2001-03-20 18:05:36 +00:00
gbeauche
28b71c0972 - removed old JIT compiler, its related support functions and files 
(compiler.{h,cpp})
 2001-03-20 17:35:46 +00:00
gbeauche
7535a1042f Additions: 
- MOVE16 (Ay)+,(xxx).L
- MOVE16 (xxx).L,(Ay)+
- MOVE16 (Ay),(xxx).L
- MOVE16 (xxx).L,(Ay)

Fixes:
- MOVE16 (Ax)+,(Ay)+ where x == y: address register shall be incremented
  only once
- CINV, CPUSH: 'p' field matches correctly the instruction 'cache field'
 2001-03-19 13:11:40 +00:00
cebix
4785ea2b9a fixed compilation problems under BeOS 2001-02-09 20:04:15 +00:00
cebix
c23567ab14 - bumped version number to 0.9 
- updated copyright dates
 2001-02-02 20:53:00 +00:00
gbeauche
d21cbd327d - From Lauri's ChangeLog: "Fixed a bug in FPU FTAN opcode (didn't pop the value 
1.0 that x86 partial tangent FPTAN always pushes to stack for 8087/287
  compatibility)."
 2001-01-11 13:19:30 +00:00
gbeauche
5ec4d31f86 - fixed ADDQ and SUBQ bitmasks 2000-09-22 17:22:09 +00:00
gbeauche
d3f64dcb5f - changed set/get PC to better reflect direct or real addressing modes 
- removed m68k_get_pc_p()
- default to not using prefetch buffer
 2000-09-22 17:21:45 +00:00
gbeauche
b7177f6932 - changed set/get PC to better reflect direct or real addressing modes 2000-09-22 17:21:25 +00:00
gbeauche
1f2183a186 - merged DIRECT_ADDRESSING and REAL_ADDRESSING 
- conditionally removed unused code for direct addressing or real addressing modes
 2000-09-22 17:20:33 +00:00