forked from Apple-2-HW/GR8RAM
140 lines
2.8 KiB
Plaintext
140 lines
2.8 KiB
Plaintext
UFM Load
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LState ARCLK ARShft DRCLK DRShft UFM
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--------------------------------------------------------------------------------
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$0000 0 1 0 0
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$0FBF 0 1 0 0
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...
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$0FC0 1 1 0 0
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$0FC1 1 1 0 0
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$0FC2 0 1 0 0
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$0FC3 0 1 0 0
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$0FC4 1 1 0 0
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$0FC5 1 1 0 0
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$0FC6 0 1 0 0
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$0FC7 0 1 0 0
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$0FC8 1 1 0 0
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$0FC9 1 1 0 0
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$0FCA 0 1 0 0
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$0FCB 0 1 0 0
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$0FCC 1 1 0 0
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$0FCD 1 1 0 0
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$0FCE 0 1 0 0
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$0FCF 0 1 0 0
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$0FD0 1 1 0 0
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$0FD1 1 1 0 0
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$0FD2 0 1 0 0
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$0FD3 0 1 0 0
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$0FD4 1 1 0 0
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$0FD5 1 1 0 0
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$0FD6 0 1 0 0
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$0FD7 0 1 0 0
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$0FD8 1 1 0 0
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$0FD9 1 1 0 0
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$0FDA 0 1 0 0
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$0FDB 0 1 0 0
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$0FDC 1 1 0 0
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$0FDD 1 1 0 0
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$0FDE 0 1 0 0
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$0FDF 0 1 0 0
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$0FE0 1 1 0 0
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$0FE1 1 1 0 0
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$0FE2 0 1 0 0
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$0FE3 0 1 0 0
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$0FE4 1 1 0 0
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$0FE5 1 1 0 0
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$0FE6 0 1 0 0
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$0FE7 0 1 0 0
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$0FE8 1 1 0 0
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$0FE9 1 1 0 0
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$0FEA 0 1 0 0
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$0FEB 0 1 0 0
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$0FEC 1 1 0 0
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$0FED 1 1 0 0
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$0FEE 0 1 0 0
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$0FEF 0 1 0 0
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$0FF0 1 1 0 0
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$0FF1 1 1 0 0
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$0FF2 0 1 0 0
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$0FF3 0 1 0 0
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$0FF4 1 1 0 0
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$0FF5 1 1 0 0
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$0FF6 0 1 0 0
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$0FF7 0 1 0 0
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$0FF8 1 1 0 0
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$0FF9 1 1 0 0
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$0FFA 0 1 0 0
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$0FFB 0 1 0 0
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$0FFC 1 1 0 0
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$0FFD 1 1 0 0
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$0FFE 0 1 0 0
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$0FFF 0 1 0 0
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$1000 0 0 1 0 parallel load into DR
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$1001 0 0 1 0
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$1002 0 0 0 1
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$1003 0 0 0 1
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$1004 0 0 1 1 SetLoaded <= Dout
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$1005 0 0 1 1
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$1006 0 0 0 1
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$1007 0 0 0 1
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$1008 0 0 1 1 latch DR[14] (nSetFW[1])
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$1009 0 0 1 1
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$100A 0 0 0 1
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$100B 0 0 0 1
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$100C 0 0 1 1 latch DR[13] (nSetFW[0])
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$100D 0 0 1 1
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$100E 0 0 0 1
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$100F 0 0 0 1
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$1010 0 0 0 1 latch DR[12] (nSetLim8M)
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$1011 0 0 0 1
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$1012 0 0 0 1
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$1013 0 0 0 1
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$1014 0 0 0 1
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$1015 0 0 0 1
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$1016 0 0 0 1
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$1017 0 0 0 1
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$1018 0 0 0 1
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$1019 0 0 0 1
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$101A 0 0 0 1
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$101B 0 0 0 1
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$101C 1 0 0 1 Increment address
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$101D 1 0 0 1
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$101E 0 0 0 1
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$101F 0 0 0 1
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...
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$2FE0 0 0 1 0 parallel load into DR
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$2FE1 0 0 1 0
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$2FE2 0 0 0 1
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$2FE3 0 0 0 1
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$2FE4 0 0 1 1 SetLoaded <= Dout
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$2FE5 0 0 1 1
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$2FE6 0 0 0 1
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$2FE7 0 0 0 1
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$2FE8 0 0 1 1 latch DR[14] (nSetFW[1])
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$2FE9 0 0 1 1
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$2FEA 0 0 0 1
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$2FEB 0 0 0 1
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$2FEC 0 0 1 1 latch DR[13] (nSetFW[0])
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$2FED 0 0 1 1
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$2FEE 0 0 0 1
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$2FEF 0 0 0 1
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$2FF0 0 0 0 1 latch DR[12] (nSetLim8M)
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$2FF1 0 0 0 1
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$2FF2 0 0 0 1
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$2FF3 0 0 0 1
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$2FF4 0 0 0 1
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$2FF5 0 0 0 1
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$2FF6 0 0 0 1
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$2FF7 0 0 0 1
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$2FF8 0 0 0 1
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$2FF9 0 0 0 1
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$2FFA 0 0 0 1
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$2FFB 0 0 0 1
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$2FFC 1 0 0 1 Increment address
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$2FFD 1 0 0 1
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$2FFE 0 0 0 1
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$2FFF 0 0 0 1
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$3000 0 0 0 0 Everything 0, set SetLoaded
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