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8bitworkshop/presets/verilog
History
Steven Hugg c101292a9c Merge branch 'master' of github.com:sehugg/8bitworkshop
2018-06-07 16:25:48 -07:00
..
7segment.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
ball_absolute.v
update presets; redir.html expire
2018-06-01 10:33:37 -07:00
ball_paddle.v
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
ball_slip_counter.v
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
clock_divider.v
more presets
2018-02-09 00:11:36 -06:00
cpu8.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
cpu16.v
sync vs async RAM
2018-02-28 09:26:37 -06:00
cpu_platform.v
working on assembler
2018-05-27 11:13:06 -07:00
digits10.v
moved around ALU ops, 16-bit cpu, reg/wire
2018-02-21 11:03:38 -06:00
femto8.cfg
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
femto8.json
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
femto16.cfg
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
femto16.json
Merge branch 'master' of github.com:sehugg/8bitworkshop
2018-05-27 11:13:27 -07:00
font_cp437_8x8.v
smoother scope transition; slowest/fastest buttons; video width tweak
2018-02-27 14:09:27 -06:00
framebuffer.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
gates.v
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
hvsync_generator.v
moved around ALU ops, 16-bit cpu, reg/wire
2018-02-21 11:03:38 -06:00
lfsr.v
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
Makefile
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
music.v
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
paddles.v
paddles.v
2018-06-03 19:46:33 -07:00
racing_game_cpu.v
new inline verilog assembler
2018-02-18 11:14:04 -06:00
racing_game.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
ram1.v
update presets; redir.html expire
2018-06-01 10:33:37 -07:00
ram2.v
updated verilog presets and test makefile
2018-02-16 23:33:29 -06:00
ram.v
update presets; redir.html expire
2018-06-01 10:33:37 -07:00
scoreboard.v
moved around ALU ops, 16-bit cpu, reg/wire
2018-02-21 11:03:38 -06:00
sharedbuffer.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
skeleton.verilator
work on cpu, sprite
2018-02-05 18:05:49 -06:00
sound_generator.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
sprite_bitmap.v
moved around ALU ops, 16-bit cpu, reg/wire
2018-02-21 11:03:38 -06:00
sprite_renderer.v
moved around ALU ops, 16-bit cpu, reg/wire
2018-02-21 11:03:38 -06:00
sprite_rotation.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
sprite_scanline_renderer.v
paddles.v
2018-06-03 19:46:33 -07:00
starfield.v
new inline verilog assembler
2018-02-18 11:14:04 -06:00
tank.v
more Verilog code; inline asm for depends; fixed tank
2018-02-25 10:34:27 -06:00
test2.asm
working on assembler
2018-05-27 11:13:06 -07:00
test_hvsync.v
more presets
2018-02-09 00:11:36 -06:00
test.asm
"Save As"; command-line assembler; 32-bit limit (so far) in opcodes
2018-03-23 15:05:08 -06:00
tile_renderer.v
new presets
2018-03-01 20:17:37 -06:00