Steven Hugg 6e5005f613 look in cache first, fetch local/ verilog includes too; apple2 reset; platform checkmark

2018-07-25 13:02:44 -04:00

..

7segment.v

more Verilog code; inline asm for depends; fixed tank

2018-02-25 10:34:27 -06:00

ball_absolute.v

update presets; redir.html expire

2018-06-01 10:33:37 -07:00

ball_paddle.v

fixed verilog local paths

2018-07-22 22:26:03 -04:00

ball_slip_counter.v

fixed verilog inline asm

2018-07-12 06:50:40 -05:00

clock_divider.v

more presets

2018-02-09 00:11:36 -06:00

cpu8.v

more Verilog code; inline asm for depends; fixed tank

2018-02-25 10:34:27 -06:00

cpu16.v

sync vs async RAM

2018-02-28 09:26:37 -06:00

cpu_platform.v

updated cpu_platform.v to have inputs

2018-07-11 19:53:05 -07:00

digits10.v

moved around ALU ops, 16-bit cpu, reg/wire

2018-02-21 11:03:38 -06:00

femto8.cfg

updated verilog presets and test makefile

2018-02-16 23:33:29 -06:00

femto8.json

more Verilog code; inline asm for depends; fixed tank

2018-02-25 10:34:27 -06:00

femto16.cfg

updated verilog presets and test makefile

2018-02-16 23:33:29 -06:00

femto16.json

Merge branch 'master' of github.com:sehugg/8bitworkshop

2018-05-27 11:13:27 -07:00

font_cp437_8x8.v

smoother scope transition; slowest/fastest buttons; video width tweak

2018-02-27 14:09:27 -06:00

framebuf_vpu.v

moved to error line widgets

2018-07-20 16:40:38 -05:00

framebuffer.v

fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v

2018-07-17 22:17:01 -05:00

gates.v

updated verilog presets and test makefile

2018-02-16 23:33:29 -06:00

hvsync_generator.v

moved around ALU ops, 16-bit cpu, reg/wire

2018-02-21 11:03:38 -06:00

lfsr.v

update lsfr preset; filter verilog boring errors

2018-07-21 09:34:06 -05:00

Makefile

updated verilog presets and test makefile

2018-02-16 23:33:29 -06:00

music.v

updated verilog presets and test makefile

2018-02-16 23:33:29 -06:00

paddles.v

fixed verilog local paths

2018-07-22 22:26:03 -04:00

racing_game_cpu.v

fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v

2018-07-17 22:17:01 -05:00

racing_game.v

fixed verilog local paths

2018-07-22 22:26:03 -04:00

ram1.v

update presets; redir.html expire

2018-06-01 10:33:37 -07:00

ram2.v

updated verilog presets and test makefile

2018-02-16 23:33:29 -06:00

ram.v

look in cache first, fetch local/ verilog includes too; apple2 reset; platform checkmark

2018-07-25 13:02:44 -04:00

scoreboard.v

moved around ALU ops, 16-bit cpu, reg/wire

2018-02-21 11:03:38 -06:00

sharedbuffer.v

more Verilog code; inline asm for depends; fixed tank

2018-02-25 10:34:27 -06:00

skeleton.verilator

work on cpu, sprite

2018-02-05 18:05:49 -06:00

sound_generator.v

update lsfr preset; filter verilog boring errors

2018-07-21 09:34:06 -05:00

sprite_bitmap.v

moved around ALU ops, 16-bit cpu, reg/wire

2018-02-21 11:03:38 -06:00

sprite_renderer.v

fixed verilog local paths

2018-07-22 22:26:03 -04:00

sprite_rotation.v

more Verilog code; inline asm for depends; fixed tank

2018-02-25 10:34:27 -06:00

sprite_scanline_renderer.v

paddles.v

2018-06-03 19:46:33 -07:00

starfield.v

update lsfr preset; filter verilog boring errors

2018-07-21 09:34:06 -05:00

tank.v

more Verilog code; inline asm for depends; fixed tank

2018-02-25 10:34:27 -06:00

test2.asm

fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v

2018-07-17 22:17:01 -05:00

test_hvsync.v

more presets

2018-02-09 00:11:36 -06:00

test.asm

"Save As"; command-line assembler; 32-bit limit (so far) in opcodes

2018-03-23 15:05:08 -06:00

tile_renderer.v

new presets

2018-03-01 20:17:37 -06:00