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7segment.v
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more Verilog code; inline asm for depends; fixed tank
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2018-02-25 10:34:27 -06:00 |
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ball_absolute.v
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update presets; redir.html expire
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2018-06-01 10:33:37 -07:00 |
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ball_paddle.v
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fixed verilog local paths
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2018-07-22 22:26:03 -04:00 |
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ball_slip_counter.v
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fixed verilog inline asm
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2018-07-12 06:50:40 -05:00 |
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clock_divider.v
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cpu8.v
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more Verilog code; inline asm for depends; fixed tank
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2018-02-25 10:34:27 -06:00 |
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cpu16.v
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sync vs async RAM
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2018-02-28 09:26:37 -06:00 |
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cpu_platform.v
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updated cpu_platform.v to have inputs
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2018-07-11 19:53:05 -07:00 |
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digits10.v
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moved around ALU ops, 16-bit cpu, reg/wire
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2018-02-21 11:03:38 -06:00 |
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femto8.cfg
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femto8.json
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more Verilog code; inline asm for depends; fixed tank
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2018-02-25 10:34:27 -06:00 |
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femto16.cfg
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femto16.json
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Merge branch 'master' of github.com:sehugg/8bitworkshop
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2018-05-27 11:13:27 -07:00 |
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font_cp437_8x8.v
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smoother scope transition; slowest/fastest buttons; video width tweak
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2018-02-27 14:09:27 -06:00 |
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framebuf_vpu.v
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moved to error line widgets
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2018-07-20 16:40:38 -05:00 |
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framebuffer.v
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fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v
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2018-07-17 22:17:01 -05:00 |
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gates.v
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hvsync_generator.v
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moved around ALU ops, 16-bit cpu, reg/wire
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2018-02-21 11:03:38 -06:00 |
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lfsr.v
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update lsfr preset; filter verilog boring errors
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2018-07-21 09:34:06 -05:00 |
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Makefile
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music.v
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paddles.v
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fixed verilog local paths
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2018-07-22 22:26:03 -04:00 |
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racing_game_cpu.v
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fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v
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2018-07-17 22:17:01 -05:00 |
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racing_game.v
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fixed verilog local paths
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2018-07-22 22:26:03 -04:00 |
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ram1.v
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update presets; redir.html expire
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2018-06-01 10:33:37 -07:00 |
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ram2.v
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ram.v
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look in cache first, fetch local/ verilog includes too; apple2 reset; platform checkmark
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2018-07-25 13:02:44 -04:00 |
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scoreboard.v
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moved around ALU ops, 16-bit cpu, reg/wire
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2018-02-21 11:03:38 -06:00 |
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sharedbuffer.v
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more Verilog code; inline asm for depends; fixed tank
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2018-02-25 10:34:27 -06:00 |
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skeleton.verilator
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sound_generator.v
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update lsfr preset; filter verilog boring errors
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2018-07-21 09:34:06 -05:00 |
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sprite_bitmap.v
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moved around ALU ops, 16-bit cpu, reg/wire
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2018-02-21 11:03:38 -06:00 |
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sprite_renderer.v
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fixed verilog local paths
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2018-07-22 22:26:03 -04:00 |
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sprite_rotation.v
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more Verilog code; inline asm for depends; fixed tank
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2018-02-25 10:34:27 -06:00 |
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sprite_scanline_renderer.v
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paddles.v
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2018-06-03 19:46:33 -07:00 |
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starfield.v
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update lsfr preset; filter verilog boring errors
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2018-07-21 09:34:06 -05:00 |
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tank.v
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more Verilog code; inline asm for depends; fixed tank
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2018-02-25 10:34:27 -06:00 |
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test2.asm
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fixed asmlines in inline asm; reset h/vpaddle on vsync; fixed framebuffer.v
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2018-07-17 22:17:01 -05:00 |
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test_hvsync.v
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test.asm
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"Save As"; command-line assembler; 32-bit limit (so far) in opcodes
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2018-03-23 15:05:08 -06:00 |
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tile_renderer.v
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new presets
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2018-03-01 20:17:37 -06:00 |
