AtomBusMon/src
David Banks 55c8889881 Updated reset output to avoid the use of a tristate signal in BusMonCore
Change-Id: I3f49317689eb5808a5edb5fe5b10552d01a3db59
2015-11-15 11:37:50 +00:00
..
AlanD Fixed AlanD core 65C02 bugs: D was being set in IRQ/BRK; sync was inferring a latch 2015-11-11 13:07:19 +00:00
AVR8 Cosmetic tweaks to avoid warnings to Quartus 2015-11-14 13:36:15 +00:00
DCM Experimental AtomFast6502 with a different clocking arrangement 2015-09-23 14:56:31 +01:00
oho_dy1 Single-stepping functionality complete 2015-06-07 11:19:33 +01:00
SYS09 Initial checkin of ICE-6809; version now 0.49 2015-07-02 15:35:05 +01:00
T80 Working Z80 memory access and disassembler in the small GODIL, incremented version to 0.44 2015-06-28 19:42:25 +01:00
T6502 Fixed a bug with the I Flag being 0 rather than 1 following reset 2015-08-29 20:57:49 +01:00
AtomBusMon.bmm Implemented 6502 register access functionality with the embedded core 2015-06-16 11:57:32 +01:00
AtomBusMon.ucf Updated AtomBusMon pinout to match 6502, would allow piggy-backing in principle 2015-06-20 22:36:10 +01:00
AtomBusMon.vhd Updated reset output to avoid the use of a tristate signal in BusMonCore 2015-11-15 11:37:50 +00:00
AtomCpuMon.bmm Refactor: 2nd stage 2015-10-31 14:29:14 +00:00
AtomCpuMon.ucf Added a jumper enabled fakeTube register at 0xFEE0 with value 0xFE to work around a beeb issue with pullups, incremented version to 0.28 2015-06-18 11:01:06 +01:00
AtomCpuMon.vhd Updated reset output to avoid the use of a tristate signal in BusMonCore 2015-11-15 11:37:50 +00:00
AtomFast6502.bmm Experimental AtomFast6502 adding bus mon function 2015-10-31 11:46:40 +00:00
AtomFast6502.ucf Experimental AtomFast6502 adding bus mon function 2015-10-31 11:46:40 +00:00
AtomFast6502.vhd Experimental AtomFast6502 adding bus mon function 2015-10-31 11:46:40 +00:00
Blank.ucf Added Blank design and T65-based 6502 design 2015-06-14 17:57:26 +01:00
Blank.vhd Added Blank design and T65-based 6502 design 2015-06-14 17:57:26 +01:00
BusMonCore.vhd Updated reset output to avoid the use of a tristate signal in BusMonCore 2015-11-15 11:37:50 +00:00
MC6809ECpuMon.bmm Changed to 18K ROM/2K RAM, version now 0.60, bitfiles published for all three designs 2015-07-06 18:49:57 +01:00
MC6809ECpuMon.ucf Added a jumper to select between 6809 and 6809E clocking; increased breakpoints to 8; version now 0.52 2015-07-04 16:51:08 +01:00
MC6809ECpuMon.vhd Refactor: 1st stage 2015-10-31 13:45:09 +00:00
MOS6502CpuMonCore.vhd Refactor: 2nd stage - bug fixes 2015-10-31 18:31:41 +00:00
Z80CpuMon.bmm Changed to 18K ROM/2K RAM, version now 0.60, bitfiles published for all three designs 2015-07-06 18:49:57 +01:00
Z80CpuMon.ucf Increased Z80 drive to 4mA, as 2mA is barely sufficient to counter the 1K5 GODIL pullups 2015-07-04 14:49:59 +01:00
Z80CpuMon.vhd Refactor: 1st stage 2015-10-31 13:45:09 +00:00