2019-10-04 00:17:26 +00:00
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//
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// AtariST.cpp
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// Clock Signal
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//
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// Created by Thomas Harte on 03/10/2019.
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// Copyright © 2019 Thomas Harte. All rights reserved.
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//
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#include "AtariST.hpp"
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2019-11-09 20:31:41 +00:00
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#include "../../CRTMachine.hpp"
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2019-11-09 23:19:05 +00:00
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#include "../../JoystickMachine.hpp"
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2019-11-09 20:31:41 +00:00
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#include "../../KeyboardMachine.hpp"
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#include "../../MouseMachine.hpp"
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#include "../../MediaTarget.hpp"
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#include "../../../Activity/Source.hpp"
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2019-10-04 02:47:57 +00:00
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2019-10-26 20:52:06 +00:00
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//#define LOG_TRACE
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2020-01-03 01:15:48 +00:00
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//bool should_log = false;
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2019-11-09 20:31:41 +00:00
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#include "../../../Processors/68000/68000.hpp"
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2019-10-05 01:34:15 +00:00
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2019-11-09 20:31:41 +00:00
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#include "../../../Components/AY38910/AY38910.hpp"
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#include "../../../Components/68901/MFP68901.hpp"
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#include "../../../Components/6850/6850.hpp"
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2019-10-07 02:30:48 +00:00
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2019-10-27 01:33:57 +00:00
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#include "DMAController.hpp"
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2019-11-02 23:47:44 +00:00
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#include "IntelligentKeyboard.hpp"
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2019-10-05 01:34:15 +00:00
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#include "Video.hpp"
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2019-10-27 01:33:57 +00:00
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2019-11-09 20:31:41 +00:00
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#include "../../../ClockReceiver/JustInTime.hpp"
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#include "../../../ClockReceiver/ForceInline.hpp"
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2019-12-21 01:49:14 +00:00
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#include "../../../Configurable/StandardOptions.hpp"
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2019-10-07 02:30:48 +00:00
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2019-11-09 20:31:41 +00:00
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#include "../../../Outputs/Speaker/Implementation/LowpassSpeaker.hpp"
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2019-12-09 02:01:30 +00:00
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#define LOG_PREFIX "[ST] "
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2019-11-09 20:31:41 +00:00
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#include "../../../Outputs/Log.hpp"
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2019-10-05 01:34:15 +00:00
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2019-11-09 20:31:41 +00:00
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#include "../../Utility/MemoryPacker.hpp"
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#include "../../Utility/MemoryFuzzer.hpp"
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2019-10-05 02:38:46 +00:00
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2019-10-05 01:34:15 +00:00
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namespace Atari {
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namespace ST {
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2019-10-04 02:47:57 +00:00
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2019-12-21 01:49:14 +00:00
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std::vector<std::unique_ptr<Configurable::Option>> get_options() {
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return Configurable::standard_options(
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static_cast<Configurable::StandardOptions>(Configurable::DisplayRGB | Configurable::DisplayCompositeColour | Configurable::QuickLoadTape)
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);
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}
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2019-12-22 05:22:17 +00:00
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constexpr int CLOCK_RATE = 8021247;
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2019-10-04 02:47:57 +00:00
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2019-10-17 03:21:14 +00:00
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using Target = Analyser::Static::Target;
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2019-10-04 02:47:57 +00:00
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class ConcreteMachine:
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public Atari::ST::Machine,
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2019-10-05 01:34:15 +00:00
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public CPU::MC68000::BusHandler,
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2019-10-21 02:10:05 +00:00
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public CRTMachine::Machine,
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2019-10-22 03:02:30 +00:00
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public ClockingHint::Observer,
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2019-10-26 02:36:01 +00:00
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public Motorola::ACIA::ACIA::InterruptDelegate,
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2019-10-29 01:13:21 +00:00
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public Motorola::MFP68901::MFP68901::InterruptDelegate,
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2019-11-04 02:11:25 +00:00
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public DMAController::Delegate,
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2019-11-03 02:30:02 +00:00
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public MouseMachine::Machine,
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2019-11-09 23:19:05 +00:00
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public JoystickMachine::Machine,
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2019-11-03 03:04:08 +00:00
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public KeyboardMachine::MappedMachine,
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2019-11-04 02:57:54 +00:00
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public Activity::Source,
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2019-11-03 03:26:42 +00:00
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public MediaTarget::Machine,
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2019-12-09 01:20:13 +00:00
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public GI::AY38910::PortHandler,
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2019-12-21 01:49:14 +00:00
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public Configurable::Device,
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2019-12-09 01:20:13 +00:00
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public Video::RangeObserver {
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2019-10-04 02:47:57 +00:00
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public:
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2019-10-05 01:34:15 +00:00
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ConcreteMachine(const Target &target, const ROMMachine::ROMFetcher &rom_fetcher) :
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2019-10-07 02:30:48 +00:00
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mc68000_(*this),
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2019-10-14 01:32:34 +00:00
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keyboard_acia_(Cycles(500000)),
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midi_acia_(Cycles(500000)),
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2019-12-19 00:28:41 +00:00
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ay_(GI::AY38910::Personality::YM2149F, audio_queue_),
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2019-10-17 03:21:14 +00:00
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speaker_(ay_),
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ikbd_(keyboard_acia_->transmit, keyboard_acia_->receive) {
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2019-10-04 02:47:57 +00:00
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set_clock_rate(CLOCK_RATE);
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2019-12-11 01:25:27 +00:00
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speaker_.set_input_rate(float(CLOCK_RATE) / 4.0f);
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2019-10-05 01:34:15 +00:00
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2019-12-09 01:20:13 +00:00
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ram_.resize(512 * 1024); // i.e. 512kb
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video_->set_ram(reinterpret_cast<uint16_t *>(ram_.data()), ram_.size());
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2019-10-05 02:38:46 +00:00
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Memory::Fuzz(ram_);
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2019-10-05 01:34:15 +00:00
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std::vector<ROMMachine::ROM> rom_descriptions = {
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2019-11-13 04:23:14 +00:00
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{"AtariST", "the UK TOS 1.00 ROM", "tos100.img", 192*1024, 0x1a586c64}
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// {"AtariST", "the UK TOS 1.04 ROM", "tos104.img", 192*1024, 0xa50d1d43}
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2019-10-05 01:34:15 +00:00
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};
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const auto roms = rom_fetcher(rom_descriptions);
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if(!roms[0]) {
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throw ROMMachine::Error::MissingROMs;
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}
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2019-10-05 02:38:46 +00:00
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Memory::PackBigEndian16(*roms[0], rom_);
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2019-10-06 21:15:29 +00:00
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// Set up basic memory map.
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memory_map_[0] = BusDevice::MostlyRAM;
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2019-10-22 03:10:30 +00:00
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int c = 1;
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2019-12-09 01:20:13 +00:00
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for(; c < int(ram_.size() >> 16); ++c) memory_map_[c] = BusDevice::RAM;
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2019-12-08 16:52:43 +00:00
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for(; c < 0x40; ++c) memory_map_[c] = BusDevice::Floating;
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2019-10-26 20:52:06 +00:00
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for(; c < 0xff; ++c) memory_map_[c] = BusDevice::Unassigned;
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2019-10-06 21:15:29 +00:00
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2019-10-26 20:52:06 +00:00
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const bool is_early_tos = true;
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if(is_early_tos) {
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for(c = 0xfc; c < 0xff; ++c) memory_map_[c] = BusDevice::ROM;
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} else {
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for(c = 0xe0; c < 0xe4; ++c) memory_map_[c] = BusDevice::ROM;
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}
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2019-10-06 21:15:29 +00:00
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2019-10-26 20:52:06 +00:00
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memory_map_[0xfa] = memory_map_[0xfb] = BusDevice::Cartridge;
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2019-10-06 21:15:29 +00:00
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memory_map_[0xff] = BusDevice::IO;
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2019-10-21 02:10:05 +00:00
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2019-10-22 03:02:30 +00:00
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midi_acia_->set_interrupt_delegate(this);
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keyboard_acia_->set_interrupt_delegate(this);
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2019-10-21 02:10:05 +00:00
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midi_acia_->set_clocking_hint_observer(this);
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keyboard_acia_->set_clocking_hint_observer(this);
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2019-10-21 03:13:44 +00:00
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ikbd_.set_clocking_hint_observer(this);
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2019-10-31 02:42:06 +00:00
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mfp_->set_clocking_hint_observer(this);
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2019-10-31 02:59:32 +00:00
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dma_->set_clocking_hint_observer(this);
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2019-10-22 03:02:30 +00:00
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2019-10-26 02:36:01 +00:00
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mfp_->set_interrupt_delegate(this);
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2019-11-04 02:11:25 +00:00
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dma_->set_delegate(this);
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2019-11-03 03:04:08 +00:00
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ay_.set_port_handler(this);
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2019-10-26 02:36:01 +00:00
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2019-10-22 03:02:30 +00:00
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set_gpip_input();
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2019-11-03 03:26:42 +00:00
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2019-12-09 01:20:13 +00:00
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video_->set_range_observer(this);
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2019-11-03 03:26:42 +00:00
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// Insert any supplied media.
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insert_media(target.media);
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2019-10-04 02:47:57 +00:00
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}
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2019-10-07 02:30:48 +00:00
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~ConcreteMachine() {
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audio_queue_.flush();
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}
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2019-10-05 01:34:15 +00:00
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// MARK: CRTMachine::Machine
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2019-10-04 02:47:57 +00:00
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void set_scan_target(Outputs::Display::ScanTarget *scan_target) final {
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2019-10-05 01:34:15 +00:00
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video_->set_scan_target(scan_target);
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2019-10-04 02:47:57 +00:00
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}
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2020-01-21 02:45:10 +00:00
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Outputs::Display::ScanStatus get_scan_status() const final {
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return video_->get_scan_status();
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}
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2019-12-21 01:49:14 +00:00
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void set_display_type(Outputs::Display::DisplayType display_type) final {
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video_->set_display_type(display_type);
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}
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2019-10-04 02:47:57 +00:00
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Outputs::Speaker::Speaker *get_speaker() final {
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2019-10-07 02:30:48 +00:00
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return &speaker_;
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2019-10-04 02:47:57 +00:00
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}
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void run_for(const Cycles cycles) final {
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2019-11-03 01:25:45 +00:00
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// Give the keyboard an opportunity to consume any events.
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if(!keyboard_needs_clock_) {
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ikbd_.run_for(HalfCycles(0));
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}
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2019-10-05 01:34:15 +00:00
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mc68000_.run_for(cycles);
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}
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// MARK: MC68000::BusHandler
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2019-10-05 02:38:46 +00:00
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using Microcycle = CPU::MC68000::Microcycle;
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2019-10-05 01:34:15 +00:00
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HalfCycles perform_bus_operation(const CPU::MC68000::Microcycle &cycle, int is_supervisor) {
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2019-11-01 01:00:05 +00:00
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// Just in case the last cycle was an interrupt acknowledge or bus error. TODO: find a better solution?
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mc68000_.set_is_peripheral_address(false);
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mc68000_.set_bus_error(false);
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2019-10-05 02:38:46 +00:00
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// Advance time.
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2019-10-07 02:30:48 +00:00
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advance_time(cycle.length);
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2019-10-05 02:38:46 +00:00
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2019-12-09 02:01:30 +00:00
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// Check for assertion of reset.
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if(cycle.operation & Microcycle::Reset) {
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LOG("Unhandled Reset");
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}
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2019-10-05 02:38:46 +00:00
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// A null cycle leaves nothing else to do.
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if(!(cycle.operation & (Microcycle::NewAddress | Microcycle::SameAddress))) return HalfCycles(0);
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2019-10-26 02:36:01 +00:00
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// An interrupt acknowledge, perhaps?
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if(cycle.operation & Microcycle::InterruptAcknowledge) {
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// Current implementation: everything other than 6 (i.e. the MFP is autovectored.
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2019-12-31 04:00:55 +00:00
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const int interrupt_level = cycle.word_address()&7;
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if(interrupt_level != 6) {
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video_interrupts_pending_ &= ~interrupt_level;
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update_interrupt_input();
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2019-10-26 02:36:01 +00:00
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mc68000_.set_is_peripheral_address(true);
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return HalfCycles(0);
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} else {
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if(cycle.operation & Microcycle::SelectByte) {
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2019-11-01 01:00:05 +00:00
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const int interrupt = mfp_->acknowledge_interrupt();
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if(interrupt != Motorola::MFP68901::MFP68901::NoAcknowledgement) {
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cycle.value->halves.low = uint8_t(interrupt);
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} else {
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// TODO: this should take a while. Find out how long.
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mc68000_.set_bus_error(true);
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}
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2019-10-26 02:36:01 +00:00
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}
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return HalfCycles(0);
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}
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}
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2019-12-09 01:20:13 +00:00
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auto address = cycle.host_endian_byte_address();
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2019-11-19 03:57:13 +00:00
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2019-11-08 00:55:00 +00:00
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// If this is a new strobing of the address signal, test for bus error and pre-DTack delay.
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HalfCycles delay(0);
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2019-12-08 16:52:43 +00:00
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if(cycle.operation & Microcycle::NewAddress) {
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2019-12-09 01:20:13 +00:00
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// Bus error test.
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2019-12-08 16:52:43 +00:00
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if(
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// Anything unassigned should generate a bus error.
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2019-12-09 01:20:13 +00:00
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(memory_map_[address >> 16] == BusDevice::Unassigned) ||
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2019-12-08 16:52:43 +00:00
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// Bus errors also apply to unprivileged access to the first 0x800 bytes, or the IO area.
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2019-12-09 01:20:13 +00:00
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(!is_supervisor && (address < 0x800 || memory_map_[address >> 16] == BusDevice::IO))
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2019-12-08 16:52:43 +00:00
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) {
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mc68000_.set_bus_error(true);
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return delay; // TODO: there should be an extra delay here.
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2019-11-08 00:55:00 +00:00
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}
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2019-12-08 16:52:43 +00:00
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// DTack delay rule: if accessing RAM or the shifter, align with the two cycles next available
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// for the CPU to access that side of the bus.
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2019-12-09 01:20:13 +00:00
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if(address < ram_.size() || (address == 0xff8260)) {
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2019-12-08 16:52:43 +00:00
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// DTack will be implicit; work out how long until that should be,
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// and apply bus error constraints.
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const int i_phase = bus_phase_.as<int>() & 7;
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if(i_phase < 4) {
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delay = HalfCycles(4 - i_phase);
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advance_time(delay);
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}
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}
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2019-11-08 00:55:00 +00:00
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}
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2019-12-09 01:20:13 +00:00
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uint8_t *memory = nullptr;
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switch(memory_map_[address >> 16]) {
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2019-11-09 21:12:37 +00:00
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default:
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2019-10-06 21:15:29 +00:00
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case BusDevice::MostlyRAM:
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2019-12-09 01:20:13 +00:00
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if(address < 8) {
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2019-10-06 21:15:29 +00:00
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memory = rom_.data();
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break;
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}
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case BusDevice::RAM:
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memory = ram_.data();
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break;
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case BusDevice::ROM:
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memory = rom_.data();
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address %= rom_.size();
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break;
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2019-12-08 16:52:43 +00:00
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case BusDevice::Floating:
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// TODO: provide vapour reads here. But: will these always be of the last video fetch?
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2019-10-10 03:01:11 +00:00
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case BusDevice::Unassigned:
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2019-10-06 21:15:29 +00:00
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case BusDevice::Cartridge:
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/*
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TOS 1.0 appears to attempt to read from the catridge before it has setup
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the bus error vector. Therefore I assume no bus error flows.
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*/
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switch(cycle.operation & (Microcycle::SelectWord | Microcycle::SelectByte | Microcycle::Read)) {
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default: break;
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case Microcycle::SelectWord | Microcycle::Read:
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*cycle.value = 0xffff;
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break;
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case Microcycle::SelectByte | Microcycle::Read:
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cycle.value->halves.low = 0xff;
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break;
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}
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2019-11-08 00:55:00 +00:00
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return delay;
|
2019-10-06 21:15:29 +00:00
|
|
|
|
|
|
|
case BusDevice::IO:
|
2020-01-05 01:35:47 +00:00
|
|
|
switch(address & 0xfffe) { // TODO: surely it's going to be even less precise than this?
|
2019-10-07 02:30:48 +00:00
|
|
|
default:
|
2019-10-26 20:52:06 +00:00
|
|
|
// assert(false);
|
2019-10-07 02:30:48 +00:00
|
|
|
|
2020-01-05 01:35:47 +00:00
|
|
|
case 0x8000:
|
2019-10-07 02:30:48 +00:00
|
|
|
/* Memory controller configuration:
|
|
|
|
b0, b1: bank 1
|
|
|
|
b2, b3: bank 0
|
|
|
|
|
|
|
|
00 = 128k
|
|
|
|
01 = 512k
|
|
|
|
10 = 2mb
|
|
|
|
11 = reserved
|
|
|
|
*/
|
|
|
|
break;
|
|
|
|
|
2020-01-05 02:06:21 +00:00
|
|
|
// Video controls.
|
|
|
|
case 0x8200: case 0x8202: case 0x8204: case 0x8206:
|
|
|
|
case 0x8208: case 0x820a: case 0x820c: case 0x820e:
|
|
|
|
case 0x8210: case 0x8212: case 0x8214: case 0x8216:
|
|
|
|
case 0x8218: case 0x821a: case 0x821c: case 0x821e:
|
|
|
|
case 0x8220: case 0x8222: case 0x8224: case 0x8226:
|
|
|
|
case 0x8228: case 0x822a: case 0x822c: case 0x822e:
|
|
|
|
case 0x8230: case 0x8232: case 0x8234: case 0x8236:
|
|
|
|
case 0x8238: case 0x823a: case 0x823c: case 0x823e:
|
|
|
|
case 0x8240: case 0x8242: case 0x8244: case 0x8246:
|
|
|
|
case 0x8248: case 0x824a: case 0x824c: case 0x824e:
|
|
|
|
case 0x8250: case 0x8252: case 0x8254: case 0x8256:
|
|
|
|
case 0x8258: case 0x825a: case 0x825c: case 0x825e:
|
|
|
|
case 0x8260: case 0x8262:
|
|
|
|
if(!cycle.data_select_active()) return delay;
|
|
|
|
|
|
|
|
if(cycle.operation & Microcycle::Read) {
|
|
|
|
cycle.set_value16(video_->read(int(address >> 1)));
|
|
|
|
} else {
|
|
|
|
video_->write(int(address >> 1), cycle.value16());
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
// DMA.
|
|
|
|
case 0x8604: case 0x8606: case 0x8608: case 0x860a: case 0x860c:
|
|
|
|
if(!cycle.data_select_active()) return delay;
|
|
|
|
|
|
|
|
if(cycle.operation & Microcycle::Read) {
|
|
|
|
cycle.set_value16(dma_->read(int(address >> 1)));
|
|
|
|
} else {
|
|
|
|
dma_->write(int(address >> 1), cycle.value16());
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
// Audio.
|
|
|
|
//
|
|
|
|
// Re: mirrors, Dan Hollis' hardware register list asserts:
|
|
|
|
//
|
|
|
|
// "Note: PSG Registers are now fixed at these addresses. All other addresses are masked out on the Falcon. Any
|
|
|
|
// writes to the shadow registers $8804-$88FF will cause bus errors.", which I am taking to imply that those shadow
|
|
|
|
// registers exist on the Atari ST.
|
|
|
|
case 0x8800: case 0x8802: case 0x8804: case 0x8806: case 0x8808: case 0x880a: case 0x880c: case 0x880e:
|
|
|
|
case 0x8810: case 0x8812: case 0x8814: case 0x8816: case 0x8818: case 0x881a: case 0x881c: case 0x881e:
|
|
|
|
case 0x8820: case 0x8822: case 0x8824: case 0x8826: case 0x8828: case 0x882a: case 0x882c: case 0x882e:
|
|
|
|
case 0x8830: case 0x8832: case 0x8834: case 0x8836: case 0x8838: case 0x883a: case 0x883c: case 0x883e:
|
|
|
|
case 0x8840: case 0x8842: case 0x8844: case 0x8846: case 0x8848: case 0x884a: case 0x884c: case 0x884e:
|
|
|
|
case 0x8850: case 0x8852: case 0x8854: case 0x8856: case 0x8858: case 0x885a: case 0x885c: case 0x885e:
|
|
|
|
case 0x8860: case 0x8862: case 0x8864: case 0x8866: case 0x8868: case 0x886a: case 0x886c: case 0x886e:
|
|
|
|
case 0x8870: case 0x8872: case 0x8874: case 0x8876: case 0x8878: case 0x887a: case 0x887c: case 0x887e:
|
|
|
|
case 0x8880: case 0x8882: case 0x8884: case 0x8886: case 0x8888: case 0x888a: case 0x888c: case 0x888e:
|
|
|
|
case 0x8890: case 0x8892: case 0x8894: case 0x8896: case 0x8898: case 0x889a: case 0x889c: case 0x889e:
|
|
|
|
case 0x88a0: case 0x88a2: case 0x88a4: case 0x88a6: case 0x88a8: case 0x88aa: case 0x88ac: case 0x88ae:
|
|
|
|
case 0x88b0: case 0x88b2: case 0x88b4: case 0x88b6: case 0x88b8: case 0x88ba: case 0x88bc: case 0x88be:
|
|
|
|
case 0x88c0: case 0x88c2: case 0x88c4: case 0x88c6: case 0x88c8: case 0x88ca: case 0x88cc: case 0x88ce:
|
|
|
|
case 0x88d0: case 0x88d2: case 0x88d4: case 0x88d6: case 0x88d8: case 0x88da: case 0x88dc: case 0x88de:
|
|
|
|
case 0x88e0: case 0x88e2: case 0x88e4: case 0x88e6: case 0x88e8: case 0x88ea: case 0x88ec: case 0x88ee:
|
|
|
|
case 0x88f0: case 0x88f2: case 0x88f4: case 0x88f6: case 0x88f8: case 0x88fa: case 0x88fc: case 0x88fe:
|
|
|
|
|
2019-11-08 00:55:00 +00:00
|
|
|
if(!cycle.data_select_active()) return delay;
|
2019-10-07 02:30:48 +00:00
|
|
|
|
|
|
|
advance_time(HalfCycles(2));
|
|
|
|
update_audio();
|
2019-11-02 03:01:06 +00:00
|
|
|
|
2019-10-07 02:30:48 +00:00
|
|
|
if(cycle.operation & Microcycle::Read) {
|
|
|
|
ay_.set_control_lines(GI::AY38910::ControlLines(GI::AY38910::BC2 | GI::AY38910::BC1));
|
2019-11-02 03:01:06 +00:00
|
|
|
cycle.set_value8_high(ay_.get_data_output());
|
2019-10-07 02:30:48 +00:00
|
|
|
ay_.set_control_lines(GI::AY38910::ControlLines(0));
|
|
|
|
} else {
|
2020-01-05 02:32:34 +00:00
|
|
|
// Net effect here: addresses with bit 1 set write to a register,
|
|
|
|
// addresses with bit 1 clear select a register.
|
|
|
|
ay_.set_control_lines(GI::AY38910::ControlLines(
|
|
|
|
GI::AY38910::BC2 | GI::AY38910::BDIR
|
|
|
|
| ((address&2) ? 0 : GI::AY38910::BC1)
|
|
|
|
));
|
2019-11-02 03:01:06 +00:00
|
|
|
ay_.set_data_input(cycle.value8_high());
|
|
|
|
ay_.set_control_lines(GI::AY38910::ControlLines(0));
|
2019-10-07 02:30:48 +00:00
|
|
|
}
|
2019-11-08 00:55:00 +00:00
|
|
|
return delay + HalfCycles(2);
|
2019-10-07 03:14:05 +00:00
|
|
|
|
|
|
|
// The MFP block:
|
2020-01-05 01:35:47 +00:00
|
|
|
case 0xfa00: case 0xfa02: case 0xfa04: case 0xfa06:
|
|
|
|
case 0xfa08: case 0xfa0a: case 0xfa0c: case 0xfa0e:
|
|
|
|
case 0xfa10: case 0xfa12: case 0xfa14: case 0xfa16:
|
|
|
|
case 0xfa18: case 0xfa1a: case 0xfa1c: case 0xfa1e:
|
|
|
|
case 0xfa20: case 0xfa22: case 0xfa24: case 0xfa26:
|
|
|
|
case 0xfa28: case 0xfa2a: case 0xfa2c: case 0xfa2e:
|
|
|
|
case 0xfa30: case 0xfa32: case 0xfa34: case 0xfa36:
|
|
|
|
case 0xfa38: case 0xfa3a: case 0xfa3c: case 0xfa3e:
|
2019-11-08 00:55:00 +00:00
|
|
|
if(!cycle.data_select_active()) return delay;
|
2019-10-07 03:14:05 +00:00
|
|
|
|
|
|
|
if(cycle.operation & Microcycle::Read) {
|
2019-12-09 01:20:13 +00:00
|
|
|
cycle.set_value8_low(mfp_->read(int(address >> 1)));
|
2019-10-07 03:14:05 +00:00
|
|
|
} else {
|
2019-12-09 01:20:13 +00:00
|
|
|
mfp_->write(int(address >> 1), cycle.value8_low());
|
2019-10-07 03:14:05 +00:00
|
|
|
}
|
|
|
|
break;
|
2019-10-10 03:01:11 +00:00
|
|
|
|
2019-10-11 00:54:29 +00:00
|
|
|
// ACIAs.
|
2020-01-05 01:35:47 +00:00
|
|
|
case 0xfc00: case 0xfc02: case 0xfc04: case 0xfc06: {
|
2019-10-11 00:54:29 +00:00
|
|
|
// Set VPA.
|
|
|
|
mc68000_.set_is_peripheral_address(!cycle.data_select_active());
|
2019-11-08 00:55:00 +00:00
|
|
|
if(!cycle.data_select_active()) return delay;
|
2019-10-11 00:54:29 +00:00
|
|
|
|
2020-01-04 22:27:55 +00:00
|
|
|
const auto acia_ = (address & 4) ? &midi_acia_ : &keyboard_acia_;
|
2019-10-11 00:54:29 +00:00
|
|
|
if(cycle.operation & Microcycle::Read) {
|
2019-12-09 01:20:13 +00:00
|
|
|
cycle.set_value8_high((*acia_)->read(int(address >> 1)));
|
2019-10-11 00:54:29 +00:00
|
|
|
} else {
|
2019-12-09 01:20:13 +00:00
|
|
|
(*acia_)->write(int(address >> 1), cycle.value8_high());
|
2019-10-11 00:54:29 +00:00
|
|
|
}
|
|
|
|
} break;
|
2019-10-07 02:30:48 +00:00
|
|
|
}
|
|
|
|
return HalfCycles(0);
|
2019-10-05 02:38:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
// If control has fallen through to here, the access is either a read from ROM, or a read or write to RAM.
|
|
|
|
switch(cycle.operation & (Microcycle::SelectWord | Microcycle::SelectByte | Microcycle::Read)) {
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
|
|
|
|
case Microcycle::SelectWord | Microcycle::Read:
|
2019-12-09 01:20:13 +00:00
|
|
|
cycle.value->full = *reinterpret_cast<uint16_t *>(&memory[address]);
|
2019-10-05 02:38:46 +00:00
|
|
|
break;
|
|
|
|
case Microcycle::SelectByte | Microcycle::Read:
|
2019-12-09 01:20:13 +00:00
|
|
|
cycle.value->halves.low = memory[address];
|
2019-10-05 02:38:46 +00:00
|
|
|
break;
|
|
|
|
case Microcycle::SelectWord:
|
2019-12-09 01:20:13 +00:00
|
|
|
if(address >= video_range_.low_address && address < video_range_.high_address)
|
|
|
|
video_.flush();
|
|
|
|
*reinterpret_cast<uint16_t *>(&memory[address]) = cycle.value->full;
|
2019-10-05 02:38:46 +00:00
|
|
|
break;
|
|
|
|
case Microcycle::SelectByte:
|
2019-12-09 01:20:13 +00:00
|
|
|
if(address >= video_range_.low_address && address < video_range_.high_address)
|
|
|
|
video_.flush();
|
|
|
|
memory[address] = cycle.value->halves.low;
|
2019-10-05 02:38:46 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2019-10-05 01:34:15 +00:00
|
|
|
return HalfCycles(0);
|
2019-10-04 02:47:57 +00:00
|
|
|
}
|
2019-10-05 01:34:15 +00:00
|
|
|
|
2019-10-07 02:30:48 +00:00
|
|
|
void flush() {
|
2019-11-04 04:03:50 +00:00
|
|
|
dma_.flush();
|
|
|
|
mfp_.flush();
|
|
|
|
keyboard_acia_.flush();
|
|
|
|
midi_acia_.flush();
|
2019-10-09 01:18:08 +00:00
|
|
|
video_.flush();
|
2019-11-04 04:03:50 +00:00
|
|
|
update_audio();
|
|
|
|
audio_queue_.perform();
|
2019-10-07 02:30:48 +00:00
|
|
|
}
|
|
|
|
|
2019-10-05 01:34:15 +00:00
|
|
|
private:
|
2019-10-07 02:30:48 +00:00
|
|
|
forceinline void advance_time(HalfCycles length) {
|
2019-10-31 02:42:06 +00:00
|
|
|
// Advance the relevant counters.
|
2019-10-07 02:30:48 +00:00
|
|
|
cycles_since_audio_update_ += length;
|
2019-10-07 03:14:05 +00:00
|
|
|
mfp_ += length;
|
2019-10-27 01:33:57 +00:00
|
|
|
dma_ += length;
|
2019-10-13 22:19:39 +00:00
|
|
|
keyboard_acia_ += length;
|
|
|
|
midi_acia_ += length;
|
2019-11-08 00:55:00 +00:00
|
|
|
bus_phase_ += length;
|
2019-10-31 02:42:06 +00:00
|
|
|
|
|
|
|
// Don't even count time for the keyboard unless it has requested it.
|
|
|
|
if(keyboard_needs_clock_) {
|
|
|
|
cycles_since_ikbd_update_ += length;
|
|
|
|
ikbd_.run_for(cycles_since_ikbd_update_.divide(HalfCycles(512)));
|
|
|
|
}
|
|
|
|
|
|
|
|
// Flush anything that needs real-time updating.
|
2019-10-21 02:10:05 +00:00
|
|
|
if(!may_defer_acias_) {
|
|
|
|
keyboard_acia_.flush();
|
|
|
|
midi_acia_.flush();
|
|
|
|
}
|
2019-10-09 03:06:50 +00:00
|
|
|
|
2019-10-31 02:42:06 +00:00
|
|
|
if(mfp_is_realtime_) {
|
|
|
|
mfp_.flush();
|
|
|
|
}
|
|
|
|
|
|
|
|
if(dma_is_realtime_) {
|
|
|
|
dma_.flush();
|
2019-10-21 03:13:44 +00:00
|
|
|
}
|
|
|
|
|
2019-10-31 02:42:06 +00:00
|
|
|
// Update the video output, checking whether a sequence point has been hit.
|
2019-10-09 03:06:50 +00:00
|
|
|
while(length >= cycles_until_video_event_) {
|
|
|
|
length -= cycles_until_video_event_;
|
|
|
|
video_ += cycles_until_video_event_;
|
|
|
|
cycles_until_video_event_ = video_->get_next_sequence_point();
|
|
|
|
|
2019-10-10 03:01:11 +00:00
|
|
|
mfp_->set_timer_event_input(1, video_->display_enabled());
|
2019-10-26 02:42:13 +00:00
|
|
|
update_interrupt_input();
|
2019-10-09 03:06:50 +00:00
|
|
|
}
|
|
|
|
cycles_until_video_event_ -= length;
|
|
|
|
video_ += length;
|
2019-10-07 02:30:48 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
void update_audio() {
|
|
|
|
speaker_.run_for(audio_queue_, cycles_since_audio_update_.divide_cycles(Cycles(4)));
|
|
|
|
}
|
|
|
|
|
2019-10-05 01:34:15 +00:00
|
|
|
CPU::MC68000::Processor<ConcreteMachine, true> mc68000_;
|
2019-11-08 00:55:00 +00:00
|
|
|
HalfCycles bus_phase_;
|
|
|
|
|
2019-10-13 22:19:39 +00:00
|
|
|
JustInTimeActor<Video> video_;
|
2019-10-09 03:06:50 +00:00
|
|
|
HalfCycles cycles_until_video_event_;
|
2019-10-05 01:34:15 +00:00
|
|
|
|
2019-10-29 01:35:10 +00:00
|
|
|
// The MFP runs at 819200/2673749ths of the CPU clock rate.
|
|
|
|
JustInTimeActor<Motorola::MFP68901::MFP68901, 819200, 2673749> mfp_;
|
2019-10-14 01:32:34 +00:00
|
|
|
JustInTimeActor<Motorola::ACIA::ACIA, 16> keyboard_acia_;
|
|
|
|
JustInTimeActor<Motorola::ACIA::ACIA, 16> midi_acia_;
|
2019-10-11 00:54:29 +00:00
|
|
|
|
2019-10-07 02:30:48 +00:00
|
|
|
Concurrency::DeferringAsyncTaskQueue audio_queue_;
|
|
|
|
GI::AY38910::AY38910 ay_;
|
|
|
|
Outputs::Speaker::LowpassSpeaker<GI::AY38910::AY38910> speaker_;
|
|
|
|
HalfCycles cycles_since_audio_update_;
|
|
|
|
|
2019-10-27 01:33:57 +00:00
|
|
|
JustInTimeActor<DMAController> dma_;
|
|
|
|
|
2019-10-21 03:13:44 +00:00
|
|
|
HalfCycles cycles_since_ikbd_update_;
|
2019-10-17 03:21:14 +00:00
|
|
|
IntelligentKeyboard ikbd_;
|
|
|
|
|
2019-12-09 01:20:13 +00:00
|
|
|
std::vector<uint8_t> ram_;
|
|
|
|
std::vector<uint8_t> rom_;
|
2019-10-05 01:34:15 +00:00
|
|
|
|
2019-10-06 21:15:29 +00:00
|
|
|
enum class BusDevice {
|
2019-12-08 16:52:43 +00:00
|
|
|
/// A mostly RAM page is one that returns ROM for the first 8 bytes, RAM elsewhere.
|
|
|
|
MostlyRAM,
|
|
|
|
/// Allows reads and writes to ram_.
|
|
|
|
RAM,
|
|
|
|
/// Nothing is mapped to this area, and it also doesn't trigger an exception upon access.
|
|
|
|
Floating,
|
|
|
|
/// Allows reading from rom_; writes do nothing.
|
|
|
|
ROM,
|
|
|
|
/// Allows interaction with a cartrige_.
|
|
|
|
Cartridge,
|
|
|
|
/// Marks the IO page, in which finer decoding will occur.
|
|
|
|
IO,
|
|
|
|
/// An unassigned page has nothing below it, in a way that triggers exceptions.
|
|
|
|
Unassigned
|
2019-10-06 21:15:29 +00:00
|
|
|
};
|
|
|
|
BusDevice memory_map_[256];
|
2019-10-21 02:10:05 +00:00
|
|
|
|
2019-10-22 03:02:30 +00:00
|
|
|
// MARK: - Clocking Management.
|
2019-10-21 02:10:05 +00:00
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bool may_defer_acias_ = true;
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2019-10-21 03:13:44 +00:00
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bool keyboard_needs_clock_ = false;
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2019-10-31 02:42:06 +00:00
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bool mfp_is_realtime_ = false;
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bool dma_is_realtime_ = false;
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2019-10-21 02:10:05 +00:00
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void set_component_prefers_clocking(ClockingHint::Source *component, ClockingHint::Preference clocking) final {
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// This is being called by one of the components; avoid any time flushing here as that's
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// already dealt with (and, just to be absolutely sure, to avoid recursive mania).
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may_defer_acias_ =
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(keyboard_acia_.last_valid()->preferred_clocking() != ClockingHint::Preference::RealTime) &&
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(midi_acia_.last_valid()->preferred_clocking() != ClockingHint::Preference::RealTime);
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2019-10-21 03:13:44 +00:00
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keyboard_needs_clock_ = ikbd_.preferred_clocking() != ClockingHint::Preference::None;
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2019-10-31 02:42:06 +00:00
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mfp_is_realtime_ = mfp_.last_valid()->preferred_clocking() == ClockingHint::Preference::RealTime;
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2019-10-31 02:59:32 +00:00
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dma_is_realtime_ = dma_.last_valid()->preferred_clocking() == ClockingHint::Preference::RealTime;
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2019-10-21 02:10:05 +00:00
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}
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2019-10-22 03:02:30 +00:00
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// MARK: - GPIP input.
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2019-10-29 01:13:21 +00:00
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void acia6850_did_change_interrupt_status(Motorola::ACIA::ACIA *) final {
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set_gpip_input();
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}
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2019-11-04 02:11:25 +00:00
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void dma_controller_did_change_output(DMAController *) final {
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2019-10-22 03:02:30 +00:00
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set_gpip_input();
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2019-11-04 02:11:25 +00:00
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// Filty hack, here! Should: set the 68000's bus request line. But until
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// that's implemented, just offers magical zero-cost DMA insertion and
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// extrication.
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if(dma_->get_bus_request_line()) {
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2019-12-20 03:58:07 +00:00
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dma_->bus_grant(reinterpret_cast<uint16_t *>(ram_.data()), ram_.size() >> 1);
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2019-11-04 02:11:25 +00:00
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}
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2019-10-22 03:02:30 +00:00
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}
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void set_gpip_input() {
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/*
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Atari ST GPIP bits:
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GPIP 7: monochrome monitor detect
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GPIP 6: RS-232 ring indicator
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GPIP 5: FD/HD interrupt
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GPIP 4: keyboard/MIDI interrupt
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GPIP 3: unused
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GPIP 2: RS-232 clear to send
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GPIP 1: RS-232 carrier detect
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GPIP 0: centronics busy
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*/
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mfp_->set_port_input(
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2019-11-02 23:36:15 +00:00
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0x80 | // b7: Monochrome monitor detect (1 = is monochrome).
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2019-10-28 02:39:21 +00:00
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0x40 | // b6: RS-232 ring indicator.
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2019-10-29 01:13:21 +00:00
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(dma_->get_interrupt_line() ? 0x00 : 0x20) | // b5: FD/HS interrupt (0 = interrupt requested).
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((keyboard_acia_->get_interrupt_line() || midi_acia_->get_interrupt_line()) ? 0x00 : 0x10) | // b4: Keyboard/MIDI interrupt (0 = interrupt requested).
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2019-10-28 02:39:21 +00:00
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0x08 | // b3: Unused
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0x04 | // b2: RS-232 clear to send.
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0x02 | // b1 : RS-232 carrier detect.
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0x00 // b0: Centronics busy (1 = busy).
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2019-10-22 03:02:30 +00:00
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);
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}
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2019-10-26 02:36:01 +00:00
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// MARK - MFP input.
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void mfp68901_did_change_interrupt_status(Motorola::MFP68901::MFP68901 *mfp) final {
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update_interrupt_input();
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}
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2019-12-31 04:00:55 +00:00
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int video_interrupts_pending_ = 0;
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bool previous_hsync_ = false, previous_vsync_ = false;
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2019-10-26 02:36:01 +00:00
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void update_interrupt_input() {
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2019-12-31 04:00:55 +00:00
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// Complete guess: set video interrupts pending if/when hsync of vsync
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// go inactive. Reset upon IACK.
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const bool hsync = video_.last_valid()->hsync();
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const bool vsync = video_.last_valid()->vsync();
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if(previous_hsync_ != hsync && previous_hsync_) {
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video_interrupts_pending_ |= 2;
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}
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if(previous_vsync_ != vsync && previous_vsync_) {
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video_interrupts_pending_ |= 4;
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}
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previous_vsync_ = vsync;
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previous_hsync_ = hsync;
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2019-10-26 02:36:01 +00:00
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if(mfp_->get_interrupt_line()) {
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mc68000_.set_interrupt_level(6);
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2019-12-31 04:00:55 +00:00
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} else if(video_interrupts_pending_ & 4) {
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2019-10-26 02:42:13 +00:00
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mc68000_.set_interrupt_level(4);
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2019-12-31 04:00:55 +00:00
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} else if(video_interrupts_pending_ & 2) {
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2019-10-26 02:42:13 +00:00
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mc68000_.set_interrupt_level(2);
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2019-10-26 02:36:01 +00:00
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} else {
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mc68000_.set_interrupt_level(0);
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}
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}
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2019-11-03 01:25:45 +00:00
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// MARK: - MouseMachine
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Inputs::Mouse &get_mouse() final {
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return ikbd_;
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}
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2019-11-03 02:30:02 +00:00
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// MARK: - KeyboardMachine
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void set_key_state(uint16_t key, bool is_pressed) final {
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ikbd_.set_key_state(Key(key), is_pressed);
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}
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IntelligentKeyboard::KeyboardMapper keyboard_mapper_;
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KeyboardMapper *get_keyboard_mapper() final {
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return &keyboard_mapper_;
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}
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|
2019-11-09 23:19:05 +00:00
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// MARK: - JoystickMachine
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const std::vector<std::unique_ptr<Inputs::Joystick>> &get_joysticks() final {
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return ikbd_.get_joysticks();
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}
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2019-11-03 03:04:08 +00:00
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// MARK: - AYPortHandler
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void set_port_output(bool port_b, uint8_t value) final {
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if(port_b) {
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// TODO: ?
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} else {
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/*
|
2019-12-20 03:19:59 +00:00
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Port A:
|
2019-11-03 03:04:08 +00:00
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b7: reserved
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b6: "freely usable output (monitor jack)"
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b5: centronics strobe
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b4: RS-232 DTR output
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b3: RS-232 RTS output
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b2: select floppy drive 1
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b1: select floppy drive 0
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b0: "page choice signal for double-sided floppy drive"
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*/
|
2019-11-04 02:11:25 +00:00
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dma_->set_floppy_drive_selection(!(value & 2), !(value & 4), !(value & 1));
|
2019-11-03 03:04:08 +00:00
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}
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}
|
2019-11-03 03:26:42 +00:00
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// MARK: - MediaTarget
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bool insert_media(const Analyser::Static::Media &media) final {
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size_t c = 0;
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for(const auto &disk: media.disks) {
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dma_->set_floppy_disk(disk, c);
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++c;
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if(c == 2) break;
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}
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return true;
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}
|
2019-11-04 02:57:54 +00:00
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// MARK: - Activity Source
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void set_activity_observer(Activity::Observer *observer) override {
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|
dma_->set_activity_observer(observer);
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}
|
2019-12-09 01:20:13 +00:00
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// MARK: - Video Range
|
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|
Video::Range video_range_;
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void video_did_change_access_range(Video *video) final {
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|
video_range_ = video->get_memory_access_range();
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}
|
2019-12-21 01:49:14 +00:00
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// MARK: - Configuration options.
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std::vector<std::unique_ptr<Configurable::Option>> get_options() final {
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return Atari::ST::get_options();
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}
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void set_selections(const Configurable::SelectionSet &selections_by_option) final {
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|
Configurable::Display display;
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if(Configurable::get_display(selections_by_option, display)) {
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|
set_video_signal_configurable(display);
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}
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}
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Configurable::SelectionSet get_accurate_selections() final {
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|
Configurable::SelectionSet selection_set;
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Configurable::append_display_selection(selection_set, Configurable::Display::CompositeColour);
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return selection_set;
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}
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|
Configurable::SelectionSet get_user_friendly_selections() final {
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|
Configurable::SelectionSet selection_set;
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Configurable::append_display_selection(selection_set, Configurable::Display::RGB);
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|
return selection_set;
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}
|
2019-11-03 02:30:02 +00:00
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|
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};
|
2019-10-04 02:47:57 +00:00
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|
2019-10-05 01:34:15 +00:00
|
|
|
}
|
2019-10-04 02:47:57 +00:00
|
|
|
}
|
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|
2019-10-04 00:17:26 +00:00
|
|
|
using namespace Atari::ST;
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Machine *Machine::AtariST(const Analyser::Static::Target *target, const ROMMachine::ROMFetcher &rom_fetcher) {
|
2019-10-04 02:47:57 +00:00
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|
return new ConcreteMachine(*target, rom_fetcher);
|
2019-10-04 00:17:26 +00:00
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|
}
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|
Machine::~Machine() {}
|