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384 Commits

Author SHA1 Message Date
Thomas Harte
f8eb7dd015 Correct EXT, STOP, LINK output. 2022-04-22 14:35:29 -04:00
Thomas Harte
716153cf0a Merge branch 'OpDumper' of github.com:TomHarte/CLK into OpDumper 2022-04-22 14:25:48 -04:00
Thomas Harte
821b5358ea Add TRAP suffix, disambiguate RTR and RTE. 2022-04-22 14:24:12 -04:00
Thomas Harte
fa1139acb3 Correct MOVEP parameters. 2022-04-21 19:02:28 -04:00
Thomas Harte
3a42b0ac3d Correct BSR test. 2022-04-21 16:31:25 -04:00
Thomas Harte
14ff3162cf Correct MOVEM syntax, output of BSR. 2022-04-21 16:28:32 -04:00
Thomas Harte
768f47198f Add proper arguments for Bcc, BRA, BSR. 2022-04-21 16:10:21 -04:00
Thomas Harte
b4bb7cdaf9 Map three-bit Q to 8, not 0. 2022-04-21 09:57:23 -04:00
Thomas Harte
3673f931b8 Correct ASL/ASR/etc output. 2022-04-21 09:48:49 -04:00
Thomas Harte
3dce673b37 Add second operand to DBcc. 2022-04-20 20:04:56 -04:00
Thomas Harte
f7932d8583 Correct JSR and DBcc output. 2022-04-20 19:27:20 -04:00
Thomas Harte
b6c91035f4 Merge branch 'OpDumper' of github.com:TomHarte/CLK into OpDumper 2022-04-20 16:41:01 -04:00
Thomas Harte
7f030bc282 Preserve An at start of CMPAs. 2022-04-20 16:37:12 -04:00
Thomas Harte
32f946b3f0 Fix CMPA output. 2022-04-20 16:31:59 -04:00
Thomas Harte
939f015007 Remove suffixes from BTST/BCHG/etc. 2022-04-20 09:00:48 -04:00
Thomas Harte
20d54c0397 Tighten test. 2022-04-20 08:32:11 -04:00
Thomas Harte
950fddebf9 Preserve MOVE USP. 2022-04-20 08:30:16 -04:00
Thomas Harte
47d5d65633 Attempt to resolve all missing register numbers. 2022-04-19 20:38:08 -04:00
Thomas Harte
be1cec8f55 Ensure LEA appears as LEA. 2022-04-19 20:20:28 -04:00
Thomas Harte
6207f2ab41 Correct MOVEA output. 2022-04-19 17:15:36 -04:00
Thomas Harte
e30a02a0c0 Better log MOVEs. 2022-04-19 16:57:46 -04:00
Thomas Harte
c7097274c9 Add register numbers to MOVEs. 2022-04-19 16:33:18 -04:00
Thomas Harte
e82f2a3810 Correct ADDX/SUBX mode and register. 2022-04-19 16:20:01 -04:00
Thomas Harte
cbf6ae81d0 Output NOP, include register number in NBCD. 2022-04-19 08:05:37 -04:00
Thomas Harte
7a6fab72fe Include register numbers and Q values. 2022-04-17 19:42:45 -04:00
Thomas Harte
4005506e42 Output all existing decodings. 2022-04-17 07:55:13 -04:00
Thomas Harte
ee625cb8a8 Minor style improvements; especially: don't assume value of NoBusProgram. 2021-12-25 14:05:38 -05:00
Thomas Harte
f20940a37b Give Program full ownership of the sentinel value. 
In case I want to reduce the size of this field later.
 2021-12-23 16:32:21 -05:00
Thomas Harte
32e0a66610 Trust the compiler with this bit field. 2021-12-23 16:28:55 -05:00
Thomas Harte
d9598b35c2 Add some additional metrics. 2021-12-23 16:27:54 -05:00
Thomas Harte
863971f944 68000: fix E alignment, expand Microcycle::apply. 2021-09-08 21:03:37 -04:00
Thomas Harte
402f2ddbd9 Increases likelihood of 68000 Program offset-size assumptions being met. 2020-07-02 22:24:04 -04:00
Thomas Harte
6e4b8d58a5 Completes [[fallthrough]]s. 2020-06-19 23:50:37 -04:00
Thomas Harte
945a9da94f Adds further [[fallthrough]]s. 2020-06-19 23:44:20 -04:00
Thomas Harte
73131735fa Further qmake warning corrections. 2020-05-30 19:31:17 -04:00
Thomas Harte
267006782f Starts to add Qt target; resolves many build warnings. 2020-05-30 00:37:06 -04:00
Thomas Harte
a3d4c7599b Attempts fully to capture 68000 state. 
Albeit that it can't be put back yet.
 2020-05-18 23:55:54 -04:00
Thomas Harte
f7a16762b4 Starts populating the 68000 state registers. 2020-05-16 00:06:04 -04:00
Thomas Harte
66c2eb0414 Further tightens const and constexpr usage. 2020-05-12 22:22:21 -04:00
Thomas Harte
dca79ea10e Requires trace flag currently set. 2020-01-18 22:52:53 -05:00
Thomas Harte
b7fd4de32f Ensures a one-instruction latency on the trace flag. 2020-01-18 22:06:00 -05:00
Thomas Harte
9f2f547932 Adds and satisfies test on the function code word. 
Thanks to ijor's "68000 Address and Bus Error Stack Frame" re: contents.
 2020-01-04 23:58:07 -05:00
Thomas Harte
f0d5bbecf2 Introduces a test of stack contents after an address error. 
Fixes: stacked PC, address of fault.
 2020-01-04 23:22:07 -05:00
Thomas Harte
a28c52c250 Fixes A7-relative JSRs. 
I completely withdraw my earlier statement re: the test cases.
 2020-01-04 22:22:33 -05:00
Thomas Harte
7de1181213 Make a new guess at post-overflow DIV flags, based on tests. 
Specifically: for DIVU, stick with the current guess of a fixed set. For DIVS, leave N and Z alone.
 2020-01-03 23:44:49 -05:00
Thomas Harte
c7a5b054db There's no TODO here; overflow is always 0 for a 16x16 multiply. 
... and the original 68000 doesn't support 32x32 multiplies.
 2020-01-03 22:44:19 -05:00
Thomas Harte
2f8078db22 Switches to should_log as a global when I'm hacking about. 2020-01-02 20:15:48 -05:00
Thomas Harte
5be30b1f7b Introduces further comparative tests, prompting a new CHK fix. 
Specifically: how to set N when both is_under and is_over are true, and to eliminate a failure fully to prefetch in the longer addressing modes.
 2020-01-01 19:11:36 -05:00
Thomas Harte
b184426f2b Ensure that an interrupt from a STOP doesn't return to the STOP. 2020-01-01 14:51:47 -05:00
Thomas Harte
1de4f179c0 Adds more thorough comment on the bus program used. 2019-12-25 19:49:49 -05:00