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Author	SHA1	Message	Date
Thomas Harte	192513656a	After much guesswork, fix SBCD and thereby pass flamewing tests.	2022-05-12 11:39:01 -04:00
Thomas Harte	41dc728c9b	Merge branch '68000Perform' of github.com:TomHarte/CLK into 68000Perform	2022-05-12 11:27:59 -04:00
Thomas Harte	f3c1b1f052	Name flags, remove closing underscores on exposed data fields.	2022-05-12 08:19:41 -04:00
Thomas Harte	bd61c72007	Mutate SBCD to correct values, though not yet statuses.	2022-05-12 07:22:26 -04:00
Thomas Harte	0efeea1294	Slightly improve SBCD. Not there yet though.	2022-05-12 07:07:21 -04:00
Thomas Harte	56ce1ec6e8	No need to subclass.	2022-05-11 21:25:38 -04:00
Thomas Harte	de168956e4	Fix tested operand order.	2022-05-11 16:44:39 -04:00
Thomas Harte	5b80844d81	Add a sanity test count, temporarily.	2022-05-11 16:34:28 -04:00
Thomas Harte	a9902fc817	Fix ABCD when the result has an invalid lower digit.	2022-05-11 16:31:27 -04:00
Thomas Harte	ed75688251	Fix capture of the initial zero flag.	2022-05-11 15:40:17 -04:00
Thomas Harte	17add4b585	Introduce and overwhelmingly fail the flamewing BCD tests.	2022-05-11 15:19:39 -04:00
Thomas Harte	d492156453	Add noreturn attribute as a warning.	2022-05-11 10:51:48 -04:00
Thomas Harte	96af3d5ec5	Fix infinite inner/outer loop.	2022-05-11 10:26:12 -04:00
Thomas Harte	69ba14e34e	Support the trace flag.	2022-05-11 09:39:15 -04:00
Thomas Harte	943c924382	Add missing: MOVE to/from USP, RESET.	2022-05-11 07:52:23 -04:00
Thomas Harte	4b97427937	Remove further magic constants.	2022-05-11 07:00:35 -04:00
Thomas Harte	ab8e1fdcbf	Take a swing at access faults and address errors.	2022-05-10 16:20:30 -04:00
Thomas Harte	477979c275	Fully formulate and document the flow controller.	2022-05-10 10:34:07 -04:00
Thomas Harte	c635720a09	Tidy up; provide a notification for bit-change operations.	2022-05-10 08:23:25 -04:00
Thomas Harte	f2a6a12f79	Remove further vestiges of timing.	2022-05-09 20:58:51 -04:00
Thomas Harte	7445c617bc	Start removing 68000-specific timing calculations.	2022-05-09 20:32:02 -04:00
Thomas Harte	8e7340860e	Minor thematic rearrangement.	2022-05-09 16:35:17 -04:00
Thomas Harte	2ca1eb4cf8	Move set_pc into the operation-specific group.	2022-05-09 16:20:15 -04:00
Thomas Harte	0af8660181	Remove add_pc and decline_branch in favour of operation-specific signals.	2022-05-09 16:19:25 -04:00
Thomas Harte	330ec1b848	TODO is done.	2022-05-09 11:52:33 -04:00
Thomas Harte	2f7cff84d9	Enable missing rotates and shifts.	2022-05-09 11:26:01 -04:00
Thomas Harte	8e5650fde9	Clean up Instruction.hpp.	2022-05-09 10:13:42 -04:00
Thomas Harte	539932dc56	Provide function codes. TODO: optionally.	2022-05-09 09:18:02 -04:00
Thomas Harte	5ab5e1270e	Fix test for new MOVEM semantics.	2022-05-09 09:17:48 -04:00
Thomas Harte	e35de357fa	Route reads and writes through a common path.	2022-05-08 17:17:46 -04:00
Thomas Harte	0818fd7828	Ensure no status updates fall through the cracks.	2022-05-07 21:29:12 -04:00
Thomas Harte	98cb9cc1eb	Fix CHK operand size.	2022-05-07 21:16:44 -04:00
Thomas Harte	bf8c97abbb	Permit TRAP, TRAPV and CHK to push the next PC rather than the current.	2022-05-07 20:32:39 -04:00
Thomas Harte	ad6cf5e401	Pull out magic constant, simplify sp and TAS.	2022-05-07 20:20:24 -04:00
Thomas Harte	2b3900fd14	Fix LINK A7.	2022-05-07 08:15:26 -04:00
Thomas Harte	1defeca1ad	Implement RTS, RTR, RTE.	2022-05-06 12:30:49 -04:00
Thomas Harte	ac6a9ab631	Fix TAS Dn.	2022-05-06 12:23:04 -04:00
Thomas Harte	8176bb6f79	Expose issues with TST and TAS.	2022-05-06 12:18:56 -04:00
Thomas Harte	9c266d4316	Proceed to unimplemented TST.	2022-05-06 11:33:57 -04:00
Thomas Harte	d478a1b448	Proceed to next failure: PEA.	2022-05-06 10:04:20 -04:00
Thomas Harte	190a351a29	Fix address writeback.	2022-05-06 09:56:01 -04:00
Thomas Harte	607ddd2f78	Preserve MOVEM order in Operation.	2022-05-06 09:45:06 -04:00
Thomas Harte	fed79a116f	Be overt about the size being described here.	2022-05-06 09:22:38 -04:00
Thomas Harte	5db0ea0236	Add note for my tomorrow self.	2022-05-05 21:11:02 -04:00
Thomas Harte	06fe320cc0	Correct source counting, but this leaves the operands still being the wrong way around.	2022-05-05 21:06:53 -04:00
Thomas Harte	f7991e18de	Makes a failed attempt to implement MOVEM to registers.	2022-05-05 20:32:21 -04:00
Thomas Harte	d7d0a5c15e	Implement MOVEM to memory.	2022-05-05 18:51:29 -04:00
Thomas Harte	47f4bbeec6	Switch to a contiguous block of 16 registers.	2022-05-05 15:31:59 -04:00
Thomas Harte	9ab70b340c	Route MOVEM appropriately.	2022-05-05 12:42:57 -04:00
Thomas Harte	70cdc2ca9f	Fix MOVEP to register. ... Advance to lack of MOVEM.	2022-05-05 12:37:47 -04:00