Thomas Harte
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27c4d19455
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Support STOP.
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2022-05-14 11:35:35 -04:00 |
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Thomas Harte
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f83954f5b7
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Switch to common bit-selection logic.
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2022-05-13 15:08:15 -04:00 |
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Thomas Harte
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77b56c50e6
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Ensure you can't trace into divide-by-zero, etc.
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2022-05-13 14:02:56 -04:00 |
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Thomas Harte
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002a8c061f
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Trim the public interface of Executor .
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2022-05-13 13:55:37 -04:00 |
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Thomas Harte
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4299334e24
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Clean up some TODOs, eliminate one further conditional.
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2022-05-13 11:17:57 -04:00 |
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Thomas Harte
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4d03c73222
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Ensure that the first instruction of privilege/line1010/etc exceptions isn't traced.
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2022-05-13 11:08:22 -04:00 |
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Thomas Harte
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6c854e8ecc
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Simplify is_supervisor semantics.
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2022-05-13 07:53:40 -04:00 |
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Thomas Harte
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2e796f31d4
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Support interrupts; documentation to come.
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2022-05-12 20:52:24 -04:00 |
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Thomas Harte
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6d43576db7
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Remove errant semicolon.
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2022-05-12 16:21:36 -04:00 |
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Thomas Harte
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b7d1bff0c7
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Eliminate branches from ABCD.
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2022-05-12 15:25:01 -04:00 |
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Thomas Harte
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79c5af755f
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Eliminate branches from SBCD.
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2022-05-12 15:18:03 -04:00 |
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Thomas Harte
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c6d84e7e60
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Use Status::FlagT pervasively.
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2022-05-12 11:42:33 -04:00 |
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Thomas Harte
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192513656a
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After much guesswork, fix SBCD and thereby pass flamewing tests.
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2022-05-12 11:39:01 -04:00 |
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Thomas Harte
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f3c1b1f052
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Name flags, remove closing underscores on exposed data fields.
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2022-05-12 08:19:41 -04:00 |
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Thomas Harte
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bd61c72007
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Mutate SBCD to correct values, though not yet statuses.
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2022-05-12 07:22:26 -04:00 |
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Thomas Harte
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0efeea1294
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Slightly improve SBCD. Not there yet though.
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2022-05-12 07:07:21 -04:00 |
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Thomas Harte
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a9902fc817
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Fix ABCD when the result has an invalid lower digit.
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2022-05-11 16:31:27 -04:00 |
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Thomas Harte
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96af3d5ec5
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Fix infinite inner/outer loop.
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2022-05-11 10:26:12 -04:00 |
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Thomas Harte
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69ba14e34e
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Support the trace flag.
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2022-05-11 09:39:15 -04:00 |
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Thomas Harte
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943c924382
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Add missing: MOVE to/from USP, RESET.
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2022-05-11 07:52:23 -04:00 |
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Thomas Harte
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4b97427937
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Remove further magic constants.
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2022-05-11 07:00:35 -04:00 |
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Thomas Harte
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ab8e1fdcbf
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Take a swing at access faults and address errors.
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2022-05-10 16:20:30 -04:00 |
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Thomas Harte
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c635720a09
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Tidy up; provide a notification for bit-change operations.
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2022-05-10 08:23:25 -04:00 |
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Thomas Harte
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f2a6a12f79
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Remove further vestiges of timing.
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2022-05-09 20:58:51 -04:00 |
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Thomas Harte
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7445c617bc
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Start removing 68000-specific timing calculations.
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2022-05-09 20:32:02 -04:00 |
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Thomas Harte
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2ca1eb4cf8
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Move set_pc into the operation-specific group.
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2022-05-09 16:20:15 -04:00 |
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Thomas Harte
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0af8660181
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Remove add_pc and decline_branch in favour of operation-specific signals.
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2022-05-09 16:19:25 -04:00 |
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Thomas Harte
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2f7cff84d9
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Enable missing rotates and shifts.
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2022-05-09 11:26:01 -04:00 |
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Thomas Harte
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8e5650fde9
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Clean up Instruction.hpp.
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2022-05-09 10:13:42 -04:00 |
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Thomas Harte
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539932dc56
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Provide function codes. TODO: optionally.
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2022-05-09 09:18:02 -04:00 |
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Thomas Harte
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e35de357fa
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Route reads and writes through a common path.
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2022-05-08 17:17:46 -04:00 |
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Thomas Harte
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0818fd7828
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Ensure no status updates fall through the cracks.
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2022-05-07 21:29:12 -04:00 |
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Thomas Harte
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bf8c97abbb
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Permit TRAP, TRAPV and CHK to push the next PC rather than the current.
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2022-05-07 20:32:39 -04:00 |
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Thomas Harte
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ad6cf5e401
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Pull out magic constant, simplify sp and TAS .
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2022-05-07 20:20:24 -04:00 |
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Thomas Harte
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2b3900fd14
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Fix LINK A7.
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2022-05-07 08:15:26 -04:00 |
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Thomas Harte
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1defeca1ad
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Implement RTS, RTR, RTE.
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2022-05-06 12:30:49 -04:00 |
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Thomas Harte
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ac6a9ab631
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Fix TAS Dn.
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2022-05-06 12:23:04 -04:00 |
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Thomas Harte
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8176bb6f79
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Expose issues with TST and TAS.
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2022-05-06 12:18:56 -04:00 |
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Thomas Harte
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9c266d4316
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Proceed to unimplemented TST.
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2022-05-06 11:33:57 -04:00 |
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Thomas Harte
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190a351a29
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Fix address writeback.
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2022-05-06 09:56:01 -04:00 |
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Thomas Harte
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607ddd2f78
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Preserve MOVEM order in Operation .
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2022-05-06 09:45:06 -04:00 |
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Thomas Harte
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fed79a116f
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Be overt about the size being described here.
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2022-05-06 09:22:38 -04:00 |
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Thomas Harte
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5db0ea0236
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Add note for my tomorrow self.
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2022-05-05 21:11:02 -04:00 |
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Thomas Harte
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06fe320cc0
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Correct source counting, but this leaves the operands still being the wrong way around.
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2022-05-05 21:06:53 -04:00 |
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Thomas Harte
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f7991e18de
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Makes a failed attempt to implement MOVEM to registers.
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2022-05-05 20:32:21 -04:00 |
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Thomas Harte
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d7d0a5c15e
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Implement MOVEM to memory.
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2022-05-05 18:51:29 -04:00 |
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Thomas Harte
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47f4bbeec6
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Switch to a contiguous block of 16 registers.
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2022-05-05 15:31:59 -04:00 |
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Thomas Harte
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9ab70b340c
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Route MOVEM appropriately.
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2022-05-05 12:42:57 -04:00 |
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Thomas Harte
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70cdc2ca9f
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Fix MOVEP to register.
Advance to lack of MOVEM.
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2022-05-05 12:37:47 -04:00 |
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Thomas Harte
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67462c2f92
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Rewire MOVEP.
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2022-05-05 12:27:36 -04:00 |
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