62 Commits

Author	SHA1	Message	Date
Thomas Harte	b30fda3c36	Localise shorthand Storage; note that labels may be unused.	2025-10-29 12:19:25 -04:00
Thomas Harte	5e789b4b0c	Grab last PC operation address; ensure power-on reset is predictable.	2025-10-29 09:03:35 -04:00
Thomas Harte	dd25d387fe	Allow for __COUNTER__ potentially not starting at 0.	2025-10-28 21:07:03 -04:00
Thomas Harte	e688d87c22	Move negative and zero into private storage.	2025-10-28 18:23:16 -04:00
Thomas Harte	332fb2f384	Make decimal flag private.	2025-10-28 17:34:31 -04:00
Thomas Harte	5332bcd6b4	Clarify set/get difference; make interrupt flag storage private.	2025-10-28 17:32:10 -04:00
Thomas Harte	55c59e6164	Start hiding Flags implementation.	2025-10-28 17:24:53 -04:00
Thomas Harte	58e1880773	Eliminate 'addr' side effects.	2025-10-27 22:14:48 -04:00
Thomas Harte	c8c4c99f09	Incorporate IRQ timing test; accept that it must be tested within the access macro.	2025-10-27 21:32:52 -04:00
Thomas Harte	bc5b7a6725	Unpublish WriteableReader.	2025-10-27 17:01:29 -04:00
Thomas Harte	3dd07b6ac1	To simplify debugging, add non-constructing path. ... This won't have any effect on generated code.	2025-10-27 12:41:17 -04:00
Thomas Harte	12d912b627	Add insurance against bus handler not writing.	2025-10-27 12:37:38 -04:00
Thomas Harte	967c3f6dba	Ensure NMI isn't perpetual.	2025-10-26 21:56:35 -04:00
Thomas Harte	cba96aee37	Honour interrupt flag.	2025-10-25 17:02:48 -04:00
Thomas Harte	4df49d9f18	Round out interrupt signalling.	2025-10-25 08:54:25 -04:00
Thomas Harte	8b04608d68	Implement STP and WAI.	2025-10-24 23:47:30 -04:00
Thomas Harte	213f9850e7	Add WDC65C02 decoder.	2025-10-24 23:41:55 -04:00
Thomas Harte	378bffbf84	Implement BBR/BBS.	2025-10-24 23:37:18 -04:00
Thomas Harte	e81233c586	Implement JMP (abs,x).	2025-10-24 22:16:36 -04:00
Thomas Harte	b946029394	Correct 65c02 JMPAbsoluteIndirect.	2025-10-24 21:57:53 -04:00
Thomas Harte	fe79a1231d	Add extra cycle to immediate decimal arithmetic.	2025-10-24 21:39:14 -04:00
Thomas Harte	76a5872d17	Install extra cycle for 65c02 decimal arithmetic.	2025-10-24 21:24:05 -04:00
Thomas Harte	2e0e89c494	Implement fast modify path; fix more NOPs.	2025-10-24 16:43:57 -04:00
Thomas Harte	48f8ddf53a	65c02: make AbsoluteIndexed modify cycle harmless.	2025-10-24 15:55:45 -04:00
Thomas Harte	9aae07b737	Implement zero indirect addressing mode.	2025-10-24 15:53:55 -04:00
Thomas Harte	d7abdc8017	Transfer ownership of final PC increment, to accomodate 65c02 misreads.	2025-10-24 15:49:17 -04:00
Thomas Harte	cb81156835	65c02: distinguish 'fast' NOPs from regular.	2025-10-24 13:52:32 -04:00
Thomas Harte	e4fe127444	Fix 65c02 modify cycles: read/read/write, not read/write/write.	2025-10-24 13:30:10 -04:00
Thomas Harte	58f7d4065c	65c02: support single-cycle NOP.	2025-10-24 12:29:53 -04:00
Thomas Harte	5dc00a2092	Update #undef list.	2025-10-24 12:00:22 -04:00
Thomas Harte	b20d489bf0	Remove SHA/SHX/etc.	2025-10-24 11:58:55 -04:00
Thomas Harte	df39870587	Factor out index decision.	2025-10-24 11:53:55 -04:00
Thomas Harte	e9c8c61dcf	Reformulate to be slightly more conditional, but substantially deduplicate code.	2025-10-23 21:52:31 -04:00
Thomas Harte	79ab1d8cb1	Implement final SHA.	2025-10-23 13:42:23 -04:00
Thomas Harte	7cd20f5d12	Add all absolute-indexed oddities.	2025-10-23 13:39:03 -04:00
Thomas Harte	5396d751e1	Support SHX and a SHA.	2025-10-23 13:27:55 -04:00
Thomas Harte	d23e715650	Decision: these five have weird addressing, so that counts as weird addressing modes.	2025-10-23 13:13:01 -04:00
Thomas Harte	0791bce338	Fix everything other than the oddball SHA/SHX/SHY/SHS.	2025-10-22 22:12:32 -04:00
Thomas Harte	62a8bf4261	Add missing RTS cycle.	2025-10-22 17:56:11 -04:00
Thomas Harte	ebda18b44e	Implement the two JMPs.	2025-10-22 17:52:55 -04:00
Thomas Harte	a8f41b9017	Implement RTI and RTS.	2025-10-22 17:48:19 -04:00
Thomas Harte	410c19a7da	Fix pull.	2025-10-22 17:43:08 -04:00
Thomas Harte	2d114b6677	Implement JSR.	2025-10-22 17:37:01 -04:00
Thomas Harte	02e74ca1f4	Add absolute-indexed addressing.	2025-10-22 17:18:54 -04:00
Thomas Harte	69122cdec4	Swing at zero-indexed addressing.	2025-10-22 17:12:23 -04:00
Thomas Harte	d730168631	Remove dead label.	2025-10-22 13:30:24 -04:00
Thomas Harte	2f210ebe3b	Fix IndexedIndirect/IndirectIndexed confusion, proceed to test 0x14.	2025-10-22 13:29:45 -04:00
Thomas Harte	693b53baa2	Proceed through absolute addressing to test 0x10.	2025-10-22 13:05:46 -04:00
Thomas Harte	45363922b5	Adds rolls and shifts, and zero-page addressing.	2025-10-22 12:56:07 -04:00
Thomas Harte	0463c1ceda	Reduce repetition.	2025-10-21 23:21:11 -04:00