Thomas Harte
|
33c3fa21e3
|
Fixed (HL)/(In + d) CB page modify instructions. Reducing failures to 672.
|
2017-05-27 15:54:24 -04:00 |
|
Thomas Harte
|
9bc2b48d9b
|
Found a form I like for indexed addressing, applying it only where obvious for now. Which eliminates more than a couple of hundred of remaining failures.
|
2017-05-26 23:23:33 -04:00 |
|
Thomas Harte
|
e4e71a1e5f
|
Switched back to descriptive failures, but put a cap on them.
|
2017-05-25 21:08:24 -04:00 |
|
Thomas Harte
|
fba5af280e
|
Shortened failure message, at least for now.
|
2017-05-25 21:05:47 -04:00 |
|
Thomas Harte
|
2cadc706e2
|
Now runs FUSE tests, albeit testing only a subset of the results. But enough to get started.
|
2017-05-25 21:00:33 -04:00 |
|
Thomas Harte
|
3c6f63abcc
|
Started towards running the FUSE tests. Just need to deal with the memory segments.
|
2017-05-25 19:12:59 -04:00 |
|
Thomas Harte
|
00cd7e7e9c
|
After hitting my head against the wall of trying to use [NS]Scanner as a parser some more, have given up and transcoded the two tests files to JSON.
|
2017-05-25 18:20:13 -04:00 |
|
Thomas Harte
|
055c860b43
|
Sealed off RegisterState as immutable, and started trying to parse the .expected file.
|
2017-05-23 22:32:36 -04:00 |
|
Thomas Harte
|
454c8628c3
|
Implemented an additional constructor for RegisterStates, pulling it out into file-level scope and implementing Equatable.
|
2017-05-23 22:05:33 -04:00 |
|
Thomas Harte
|
a23a6db4d6
|
Tidied up, creating a holder for RegisterState and giving it deserialisation logic. This makes sense because a register state will also need to be taken from the outputScanner, and from the machine.
|
2017-05-23 08:13:24 -04:00 |
|
Thomas Harte
|
6575091a78
|
Fixed Z80's ownership of its fetch-decode-execute program, its habit of scheduling invalidly when hitting an unrecognised operation and the test machine's habit of dereferencing invalidly.
|
2017-05-22 21:50:34 -04:00 |
|
Thomas Harte
|
9e25d014d2
|
Made an attempt to log bus activity for comparison with FUSE results.
|
2017-05-22 19:49:38 -04:00 |
|
Thomas Harte
|
41d5dd8679
|
Added a memory access delegate to the Z80 all-ram processor, to allow access patterns to be captured.
|
2017-05-22 19:24:11 -04:00 |
|
Thomas Harte
|
22afa509ca
|
Got to a parsing and towards an attempt to run FUSE tests.
|
2017-05-22 19:14:46 -04:00 |
|
Thomas Harte
|
3fb3cc8269
|
Got explicit about encodings.
|
2017-05-21 22:53:06 -04:00 |
|
Thomas Harte
|
e3e461d7cb
|
Added a test class for running the FUSE tests. With nothing much in it.
|
2017-05-21 22:49:24 -04:00 |
|
Thomas Harte
|
c16fccb317
|
Fixed file names.
|
2017-05-21 22:43:07 -04:00 |
|
Thomas Harte
|
b9cffdf2bd
|
Imported the FUSE tests.
|
2017-05-21 22:42:20 -04:00 |
|
Thomas Harte
|
01a064dd63
|
Added an empty ED page.
|
2017-05-20 17:29:30 -04:00 |
|
Thomas Harte
|
d910405648
|
Added enough infrastructure to be able to react to the two CP/M calls this cares about.
|
2017-05-19 21:53:39 -04:00 |
|
Thomas Harte
|
62b432c046
|
Added the concept of a trap handler to the all-RAM processor and exposed it via the test Z80 classes.
|
2017-05-19 21:20:28 -04:00 |
|
Thomas Harte
|
11d05fb3b8
|
Expanded a little on operations, added an implementation or two.
|
2017-05-19 19:18:35 -04:00 |
|
Thomas Harte
|
58efca835f
|
Sought to add a further opcode.
|
2017-05-18 22:53:43 -04:00 |
|
Thomas Harte
|
da6e520b91
|
Merge branch 'master' into Z80
|
2017-05-18 22:30:51 -04:00 |
|
Thomas Harte
|
9398b6c2c8
|
Unable to differentiate, decided to map a Mac shift key to both Oric shifts.
|
2017-05-18 22:25:59 -04:00 |
|
Thomas Harte
|
a3dafa9056
|
Abbreviated uses of enumerations.
|
2017-05-17 21:44:08 -04:00 |
|
Thomas Harte
|
64d6ee1be5
|
Adjusted slightly to adapt to latest Swift warnings.
|
2017-05-17 07:49:48 -04:00 |
|
Thomas Harte
|
1378ab7278
|
Ensured initial program counter and stack pointer are correct for Zexall, fixed the Z80 to use a compile-time polymorphic call for bus access.
|
2017-05-17 07:36:06 -04:00 |
|
Thomas Harte
|
87a021ec2d
|
Made further attempt to get as fas as having the Z80 attempt to do something.
|
2017-05-16 22:19:40 -04:00 |
|
Thomas Harte
|
189317b80c
|
Added enough of a Z80 test machine to bridge up into Swift.
|
2017-05-16 22:05:42 -04:00 |
|
Thomas Harte
|
4f0775cc7c
|
Imported the Zexall.com tester, as a first thing to throw at the Z80 to be.
|
2017-05-16 21:37:09 -04:00 |
|
Thomas Harte
|
7190f927b7
|
Factored out the stuff that both all-RAM processors would share, rather than duplicating it.
|
2017-05-16 21:28:17 -04:00 |
|
Thomas Harte
|
d559d8b901
|
Continued edging towards getting the absolute basics of a testable Z80, for test-driven development. Corrected old-fashioned instance naming issues with the corresponding 6502 class and removed an unnecessary source file while at it.
|
2017-05-16 21:19:17 -04:00 |
|
Thomas Harte
|
df80c37adb
|
Renamed TestMachine to TestMachine6502 since there's going to be multiple of them.
|
2017-05-15 08:18:57 -04:00 |
|
Thomas Harte
|
0808e9b6fb
|
Pulled the 6502 into a CPU namespace, making it an instance of something that has micro-opcodes and schedules them, and factoring out the formulation of a register pair.
|
2017-05-14 22:08:15 -04:00 |
|
Thomas Harte
|
b81a2cc273
|
First tentative steps towards adding a Z80 implementation.
|
2017-05-14 17:46:41 -04:00 |
|
Thomas Harte
|
8e35e913bb
|
Formally withdrew the 'load automatically' option for the Vic, having removed that option elsewhere.
|
2017-05-14 16:59:24 -04:00 |
|
Thomas Harte
|
2edf73908c
|
Temporarily disabled the existing fast loading implementation in pursuit of another, and started trying to correct the lack of connection between the userport VIA and the tape drive.
|
2017-05-06 22:00:12 -04:00 |
|
Thomas Harte
|
92a8b68859
|
Dumped Mach-specific test-and-set in favour of ordinary C11.
|
2017-04-15 21:41:59 -04:00 |
|
Thomas Harte
|
bdd432fe1d
|
Added an ugly workaround for the empirical sound shutdown issues.
|
2017-03-26 20:28:04 -04:00 |
|
Thomas Harte
|
e01f3f06c8
|
Completed curly bracket movement.
|
2017-03-26 14:34:47 -04:00 |
|
Thomas Harte
|
031a68000a
|
Added a class to contain the Pitfall 2 pager and a skeleton of initial work.
|
2017-03-18 22:08:47 -04:00 |
|
Thomas Harte
|
c3d82f88a5
|
Tidied up and commented on the Activision stack implementation.
|
2017-03-18 21:01:58 -04:00 |
|
Thomas Harte
|
c033bad0b9
|
Here's MNetwork!
|
2017-03-18 20:51:49 -04:00 |
|
Thomas Harte
|
c31d85f820
|
Re-emplaced the MegaBoy. Also cut detritus from the main Atari header.
|
2017-03-18 19:02:34 -04:00 |
|
Thomas Harte
|
217fbf257e
|
CBS RAM Plus returns.
|
2017-03-18 18:56:20 -04:00 |
|
Thomas Harte
|
0b611a14b9
|
Tigervision paging returns.
|
2017-03-18 18:50:13 -04:00 |
|
Thomas Harte
|
df6861c9dc
|
Parker Bros paging is back.
|
2017-03-18 18:21:01 -04:00 |
|
Thomas Harte
|
a4cd12394e
|
Reinstated the Activision stack pager.
|
2017-03-18 18:03:48 -04:00 |
|
Thomas Harte
|
bb3daaa99b
|
Sought to reintroduce the Atari 8k paging scheme, at the same time deciding to do away with the copy and paste of holding on to ROM data.
|
2017-03-18 15:04:01 -04:00 |
|