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11,832 Commits 10 Branches 121 Tags 499 MiB
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3293 Commits

Author SHA1 Message Date
Thomas Harte
8a6bf84cff Keyboard: log more, ignore unrecognised commands. 2024-03-29 20:54:07 -04:00
Thomas Harte
0ddbc67b1f Switch to default CMOS RAM obtained from RISC OS itself. 2024-03-28 21:23:49 -04:00
Thomas Harte
bb339d619f Eliminate trace test; I don't think I'm going to work it through. 2024-03-28 14:23:00 -04:00
Thomas Harte
2ed11877e8 Determine a couple of further exclusions. 2024-03-28 14:11:41 -04:00
Thomas Harte
ea6b83815b Add a further category of exclusions. 2024-03-28 14:01:37 -04:00
Thomas Harte
740b0e35d5 Completely bypass ignored tests. 2024-03-28 11:28:37 -04:00
Thomas Harte
4fcb85d132 Cleave off most remaining reasons for failure. 2024-03-28 10:32:27 -04:00
Thomas Harte
c04c708a9d Trade some depth for breadth. 2024-03-27 22:37:10 -04:00
Thomas Harte
f4cf1e5313 Attempt to cleave by broad reason. 2024-03-27 22:36:37 -04:00
Thomas Harte
3549488b7a Add round-trip test for status flags. 2024-03-24 22:18:16 -04:00
Thomas Harte
5ccb18225a Provide key states to the keyboard. 2024-03-23 15:43:04 -04:00
Thomas Harte
9ea3e547ee Fix IRQ/FIQ return addresses. 2024-03-22 21:42:34 -04:00
Thomas Harte
de7b7818f4 Add 4bpp output. 2024-03-22 10:18:25 -04:00
Thomas Harte
1341816791 Break apart, switching to delegates for interrupts. 2024-03-20 14:26:56 -04:00
Thomas Harte
2ad6bb099b Begin foray into disassembly. 2024-03-19 11:34:10 -04:00
Thomas Harte
7b1f800387 Extend I2C state machine. 2024-03-17 21:55:19 -04:00
Thomas Harte
47e9279bd4 Add a target for I2C activity. 2024-03-16 15:00:23 -04:00
Thomas Harte
3a899ea4be Add test coverage for STM descending, proving nothing. 2024-03-15 14:55:17 -04:00
Thomas Harte
e7457461ba Reduce magic constants. 2024-03-11 14:49:03 -04:00
Thomas Harte
ca779bc841 Expand test set. 2024-03-11 14:48:18 -04:00
Thomas Harte
db49146efe Figure out what's going on with TEQ. 2024-03-11 09:51:09 -04:00
Thomas Harte
830d70d3aa Trust tests on immediate-opcode ROR 0; limit shift by register. 2024-03-10 23:38:31 -04:00
Thomas Harte
336292bc49 Further correct R15 as a destination. 2024-03-10 22:56:02 -04:00
Thomas Harte
bd62228cc6 The test set doesn't seem to do word rotation. 2024-03-10 22:40:37 -04:00
Thomas Harte
ccdd340c9a Reads also may or may not be aligned. *sigh* 2024-03-10 22:34:56 -04:00
Thomas Harte
0b42f5fb30 Make further test-set allowances. 2024-03-10 22:29:40 -04:00
Thomas Harte
21278d028c Correct unaligned accesses. 2024-03-10 21:56:19 -04:00
Thomas Harte
fbc273f114 Add invented model for tests. 2024-03-10 21:45:56 -04:00
Thomas Harte
06a5df029d Summarise failures. 2024-03-10 16:56:39 -04:00
Thomas Harte
e17700b495 Permit digression for 03110002, temporarily. 2024-03-10 14:47:02 -04:00
Thomas Harte
655b1e516c Test PSR and PC. 2024-03-10 14:14:18 -04:00
Thomas Harte
4e7a63f792 Do a de minimis checking of memory accesses. 2024-03-09 15:18:35 -05:00
Thomas Harte
a2896b9bd0 Test register values. 2024-03-09 15:11:12 -05:00
Thomas Harte
d6f882a8bb Integrate PC and PSR, guarantee invisible register values. 2024-03-09 14:59:44 -05:00
Thomas Harte
08f50f3eff Box in flags. 2024-03-08 23:01:29 -05:00
Thomas Harte
47f7340dfc Start hacking in some ARM tests. 2024-03-08 22:54:42 -05:00
Thomas Harte
9406a97141 Add some register switch tests. 2024-03-08 11:34:10 -05:00
Thomas Harte
0d666f9935 Get a bit more rigorous about reporting. 2024-03-06 09:54:39 -05:00
Thomas Harte
6f0ad0ab71 Add an empty Archimedes shell. 2024-03-04 12:06:43 -05:00
Thomas Harte
3e80651a0e Collect 'Electron' under 'Acorn'. 2024-03-04 11:31:25 -05:00
Thomas Harte
eae92a0cdb Add a through path for Archimedes disk images. 2024-03-04 10:13:57 -05:00
Thomas Harte
230e9c6327 Obscure active. 2024-03-03 21:43:30 -05:00
Thomas Harte
11c4d2f09e Add further exposition. 2024-03-03 21:38:27 -05:00
Thomas Harte
b42a6e447d Tie down more corners. 2024-03-03 21:29:53 -05:00
Thomas Harte
4e7963ee81 Clarify PC semantics; remove faulty underscore. 2024-03-03 14:11:02 -05:00
Thomas Harte
945b7e90da Add just enough to persuade self that execution is broadly sane. 2024-03-03 14:03:08 -05:00
Thomas Harte
99f0233b76 Fix immediate offset and data processing operation. 2024-03-02 23:27:37 -05:00
Thomas Harte
62da0dee7f Unify reads. 2024-03-02 23:15:17 -05:00
Thomas Harte
1663d3d9d1 Introduce disaster of an attempted test run. 2024-03-02 22:40:12 -05:00
Thomas Harte
c0dd96eb7c Add a catalogue entry for RISC OS. 2024-03-02 21:44:27 -05:00
Thomas Harte
c865da67e0 Introduce further barrel-shifter tests. 2024-03-02 15:12:03 -05:00
Thomas Harte
e6f77a9b80 Add logical right-shift tests. 2024-03-01 18:06:54 -05:00
Thomas Harte
42ba6d1281 Relocate execution code appropriately. 2024-03-01 15:02:47 -05:00
Thomas Harte
85b7afd530 Attempt a complete block data transfer. 2024-03-01 14:48:36 -05:00
Thomas Harte
f2f59a4de5 Attempt to deal with data aborts. 2024-03-01 10:38:08 -05:00
Thomas Harte
5759798ad7 Deal with downward write order. 2024-02-29 14:34:20 -05:00
Thomas Harte
ab1dd7f57e Implement a little of block data transfer. 2024-02-29 11:33:40 -05:00
Thomas Harte
53a2ea3a57 Add address exception. 2024-02-29 10:49:11 -05:00
Thomas Harte
1f1e7236be Add rotation. 2024-02-29 10:47:41 -05:00
Thomas Harte
fd2c5b6679 Make a quick first attempt at memory accesses. 2024-02-29 10:18:09 -05:00
Thomas Harte
0b287c55d5 Edge towards single data transfer. 2024-02-29 10:02:57 -05:00
Thomas Harte
93b4008f81 Localise flags, detect improper carry write. 2024-02-28 21:28:19 -05:00
Thomas Harte
904462b881 Regularise data transfers. 2024-02-28 21:23:57 -05:00
Thomas Harte
4d400c3cb7 Add easy exceptions. 2024-02-28 14:25:12 -05:00
Thomas Harte
c49b26701f Relocate and clarify barrel shifts. 
With a view to independent testing.
 2024-02-28 13:53:13 -05:00
Thomas Harte
9b42d35d56 Update interface. 2024-02-28 11:42:33 -05:00
Thomas Harte
645152a1fd Implement branch. 2024-02-28 11:33:28 -05:00
Thomas Harte
487ade56ed Add basic multiply. 2024-02-28 11:27:27 -05:00
Thomas Harte
5a48c15e46 Add scheduler side of PC writeback. 2024-02-28 10:15:23 -05:00
Thomas Harte
d6bf1808f9 Take a swing at PC-as-input. 2024-02-28 09:33:05 -05:00
Thomas Harte
b676153d21 State intention to merge status with other registers. 2024-02-27 15:36:34 -05:00
Thomas Harte
b4e0b46bac Add notes on R15. 2024-02-27 10:04:30 -05:00
Thomas Harte
09c1b2d7db Add missing shifts. 2024-02-27 09:55:24 -05:00
Thomas Harte
4255283e33 Deal with conditionality up front. 2024-02-26 21:36:23 -05:00
Thomas Harte
16e827bb2c Add basic arithmetics. 2024-02-26 21:27:58 -05:00
Thomas Harte
def69ce6d5 Add notes on R15. 2024-02-26 15:12:39 -05:00
Thomas Harte
054a799699 Fill in the easy 50% of operations. 2024-02-26 15:10:00 -05:00
Thomas Harte
580f402bb6 Muddle further towards data processing. 2024-02-26 14:50:45 -05:00
Thomas Harte
030dda34f0 Start poking at implementation. 2024-02-26 14:30:26 -05:00
Thomas Harte
481b6d0e69 Sketch out some status flags. 2024-02-25 22:01:51 -05:00
Thomas Harte
a88d41bf00 List the flags. 2024-02-25 15:21:54 -05:00
Thomas Harte
56a5df3783 Do the least possible manual test. 2024-02-22 10:48:19 -05:00
Thomas Harte
d205e538e1 Accept the C++ I'm in; clarify and simplify interface. 2024-02-22 10:16:54 -05:00
Thomas Harte
f9cbec668b Add empty shell for tests. 2024-02-21 15:43:24 -05:00
Thomas Harte
6577f68efc Complete instruction set; consolidate mapper. 2024-02-21 15:32:27 -05:00
Thomas Harte
e986ae2878 Add coprocessor data operations and register transfers. 2024-02-21 15:25:57 -05:00
Thomas Harte
4c53414cc3 Merge branch 'master' into ARMDecoding 2024-02-17 08:14:18 -05:00
Thomas Harte
bc5727af14 Switch to = default. 2024-02-16 21:50:15 -05:00
Thomas Harte
bd0a15c054 Start working on ARM2 decoding. 2024-02-16 21:36:07 -05:00
Thomas Harte
e1fdda928a Add Mockingboard to Qt UI. 2024-02-15 09:13:17 -05:00
Thomas Harte
1c8261dc09 Add Mockingboard to macOS UI. 2024-02-15 09:10:19 -05:00
Thomas Harte
07c11e8268 Begin 6522 wiring. 2024-02-14 15:18:19 -05:00
Thomas Harte
f14e45f93e Remove various instances of ';;'. 2024-02-12 14:23:54 -05:00
Thomas Harte
d49c07687c Unify [get_/skip_]samples, adding a third option for in-place mixing. 2024-02-12 10:55:52 -05:00
Thomas Harte
609d81d75d Distinguish sources of samples and of whole buffers. 2024-02-09 14:25:40 -05:00
Thomas Harte
c105acf1c7 Adopt a full type for stereo samples, gaining + and +=. 2024-02-09 10:48:42 -05:00
Ryan Carsten Schmidt
d811501421 Compatibility fixes in Markdown files. 
Improve compatibility with some Markdown readers like MacDown by adding
blank lines before lists. Blank lines around headers were added for
consistency. One header level was fixed. One code block was fixed.
 2024-01-27 13:24:35 -06:00
Thomas Harte
8a1a14ba4c Switch trailing files to #pragma once. 2024-01-21 21:49:59 -05:00
Thomas Harte
31cbcb206f Commit new version number. 2024-01-21 21:25:27 -05:00
Thomas Harte
8eb38ac437 Make use of bound_shader. 2024-01-19 22:34:42 -05:00