Thomas Harte
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b63971caf7
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Took a first, incorrect, shot at TZX chunk 0x19, the generalised data block.
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2017-07-16 22:40:38 -04:00 |
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Thomas Harte
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7327da6350
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Switched the nascent TZX to use the new PulseQueuedTape.
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2017-07-16 22:06:56 -04:00 |
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Thomas Harte
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8f72fc4a44
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Factored out from the UEF implementation the concept of being a tape that has a queue of pending pulses and manages that queue.
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2017-07-16 22:04:40 -04:00 |
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Thomas Harte
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238348c885
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Performed the initial wiring to announce that this application supports TZX files and to route them to the ZX80/81 static analyser. The TZX class itself does not yet do much beyond basic validation. I think it'll be easiest if it follows in UEF's footsteps in queuing up pulses ahead of time, so some factoring out is now required.
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2017-07-16 21:33:11 -04:00 |
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Thomas Harte
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7b5f93510b
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Fixed the DigitalPhaseLockedLoopBridge bridge, once again fixing tests.
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2017-07-16 20:55:57 -04:00 |
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Thomas Harte
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b3861ff755
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Reduced copying of Pulses.
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2017-07-16 19:49:31 -04:00 |
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Thomas Harte
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5a6b7219b9
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Merge pull request #150 from TomHarte/PLLParsing
Introduces PLL-driven tape parsing of Acorn tapes
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2017-07-16 19:28:51 -04:00 |
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Thomas Harte
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c2bc34fd87
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Eliminated the PLLParser class. I think the proper abstraction if and when another machine requires PLL-esque parsing is probably to template out the Acorn wiring of a PLL to a Parser, and/or generalise the Acorn shifter. It'll be easier to decide when the time comes.
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2017-07-16 19:25:26 -04:00 |
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Thomas Harte
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1d3ae31755
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Abstracted the concept of an Acorn shifter away from being a PLLParser. The Acorn tape parser now skips using that class and uses the shifter. The actual Electron also uses the shifter. So the two are completely aligned. Net result: the Electron should successfully load exactly when static analysis was successful.
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2017-07-16 19:24:01 -04:00 |
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Thomas Harte
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8ddd686049
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Removed redundant variable.
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2017-07-16 19:04:03 -04:00 |
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Thomas Harte
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e5188a60dc
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Settled on the new average-of-length approach to a PLL window sizing, eliminating the old errors-of-phase approach. Since it anchors automatically to the original target clocks per bit, killed the explicit mention of a tolerance.
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2017-07-16 19:03:50 -04:00 |
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Thomas Harte
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e71d13c090
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With the new PLL implementation, switching to a deeper window size returns the Acorn tape parser to: working.
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2017-07-16 17:12:12 -04:00 |
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Thomas Harte
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ba83dfd454
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Merge branch 'master' into PLLParsing
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2017-07-16 17:01:00 -04:00 |
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Thomas Harte
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2fb0aea990
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Updated the C1540 test vessel to the new world.
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2017-07-16 17:00:39 -04:00 |
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Thomas Harte
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51177e4e1f
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Attempted a different implementation of the PLL, that responds to changes only once.
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2017-07-16 16:49:04 -04:00 |
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Thomas Harte
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004d6da9fb
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Merge branch 'master' into PLLParsing
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2017-07-16 15:03:13 -04:00 |
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Thomas Harte
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561373e793
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Merge pull request #149 from TomHarte/BetterVectors
Corrects some long-standing unnecessarily convoluted ways to handle semi-dynamic arrays
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2017-07-16 15:02:52 -04:00 |
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Thomas Harte
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279f4760d7
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Eliminated buffer_size_ as something explicitly stored, and reduced size of delegate call out.
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2017-07-16 15:01:39 -04:00 |
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Thomas Harte
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f931cd582d
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Switched to use of std::vector in those few remaining places where I was still using a unique_ptr to a native type and newing for myself. So, some of my earliest bits of code.
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2017-07-16 13:54:07 -04:00 |
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Thomas Harte
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ab51bc443b
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Eliminated foolish double indirection on phase history.
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2017-07-16 13:39:41 -04:00 |
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Thomas Harte
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c8575fe6e0
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Mild clean ups, and a tweak to permitted top and bottom phase.
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2017-07-16 13:39:08 -04:00 |
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Thomas Harte
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4489f120f9
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Eliminated foolish double indirection on phase history.
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2017-07-15 22:40:38 -04:00 |
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Thomas Harte
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253f9603ed
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Split the normal tape parser class into two in order to add a new option: a PLL-driven tape parser. Decided to see what happens if I attempt to use that to parse CSW Acorn data.
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2017-07-15 19:07:35 -04:00 |
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Thomas Harte
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6ca712b498
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Merge pull request #148 from TomHarte/CSW
Adds support for the CSW file format
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2017-07-15 15:33:05 -04:00 |
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Thomas Harte
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b743566339
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Corrected under-request of data: was erroneously supplying the size of input as the expected size of output.
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2017-07-15 15:19:03 -04:00 |
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Thomas Harte
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481487f084
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Oh yuck, it looks like I've repeated this same test in two different places. Must figure out where to factor it out to. But in the meantime, the emulated Electron has just loaded its first CSW.
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2017-07-13 22:39:30 -04:00 |
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Thomas Harte
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fc8313430a
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Added an early exit if what was read as a header turns out pretty much certainly not to be a header.
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2017-07-13 21:26:45 -04:00 |
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Thomas Harte
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648618d280
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Tweaked bit timing decision.
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2017-07-13 21:26:05 -04:00 |
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Thomas Harte
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ae1a130843
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Fixed: length of 0 is a special case.
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2017-07-13 20:57:27 -04:00 |
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Thomas Harte
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33d16ae0cd
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Fixes: individual static analysers reset tapes, for potential successors. The ZX81 file analyser no longer overruns its buffer upon receiving a file that is shorter than 11 bytes.
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2017-07-12 21:34:08 -04:00 |
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Thomas Harte
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f09fe30af5
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Attempted a full implementation of CSW. All in memory for now.
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2017-07-12 21:23:59 -04:00 |
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Thomas Harte
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33eadb5549
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Started taking further steps towards CSW support; reading the ZLib documentation is next.
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2017-07-11 22:41:10 -04:00 |
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Thomas Harte
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368bff1a82
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Added a shell class that will one day be able to parse CSW files, plus the logic and metadata to instantiate it when a CSW presents itself.
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2017-07-10 21:43:58 -04:00 |
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Thomas Harte
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d853841dd5
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Further lightened up my file-is-ZX81 check.
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2017-07-10 20:44:13 -04:00 |
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Thomas Harte
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eacaafeb48
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Merge pull request #147 from TomHarte/ZX8081Typer
Introduces preliminary `Typer` support for the ZX80 and ZX81
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2017-07-09 22:30:30 -04:00 |
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Thomas Harte
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ac59dd8b1d
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Added enough typing to issue a load command. No thoughts as to running yet though.
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2017-07-09 22:07:12 -04:00 |
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Thomas Harte
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353c854734
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Removed a TODO that is no longer appropriate.
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2017-07-09 22:06:50 -04:00 |
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Thomas Harte
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3e5c209039
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Added basic Typer support for the ZX80 and '81.
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2017-07-09 22:00:34 -04:00 |
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Thomas Harte
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f56d96267e
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Merge pull request #146 from TomHarte/MSCrash
Corrects accounting errors in ZX80/81 video
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2017-07-09 20:09:44 -04:00 |
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Thomas Harte
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ed28260aaf
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Hardens the ZX80/81 video routines to ensure they never try to push data into the future and don't double-count time when pixels would ostensibly run into sync. You could previously see the CRT being handed negative run lengths if sync interrupted pixels or if a run of more than 320 pixels (my arbitrary buffer size) occurred, with corresponding poor behaviour given my use of unsigned numbers.
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2017-07-09 19:33:05 -04:00 |
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Thomas Harte
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8ccec37a4b
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Eliminated a further potential cause of texture/geometry mismatch: the texture retain succeeded but then there wasn't room for geometry.
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2017-07-09 19:11:38 -04:00 |
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Thomas Harte
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646622b99e
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Merge pull request #145 from TomHarte/RandomNoise
Eliminates occasional on-screen noise
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2017-07-09 17:59:16 -04:00 |
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Thomas Harte
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a25c2fd6b5
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Got more explicit about what the thinking is here re: multiple sources of action.
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2017-07-09 17:54:26 -04:00 |
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Thomas Harte
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ee1a9a4781
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Eliminates attempts cleverly to shuffle unsubmitted runs, because no mechanism exists to stop them overwriting previously-submitted-but-not-yet-flushed runs. Which implies that the buffer must be fully circular. The cost of which is sometimes having to make two calls to glTexSubImage2D. Also added some TODOs, and a means for reporting when a retain_latest is ineffective, in which situation it would be inappropriate to attempt to generate correlated geometry
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2017-07-09 17:50:22 -04:00 |
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Thomas Harte
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a0367d6669
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Merge pull request #144 from TomHarte/HiRes
Corrects various ZX80/81 video deficiencies
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2017-07-09 17:17:16 -04:00 |
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Thomas Harte
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87658e83c1
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Moved line counter reset logic; I think this is actually correct.
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2017-07-09 00:05:30 -04:00 |
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Thomas Harte
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4509c3ce34
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By observation, it appears that disabling vsync occurs on any port output whatsoever, as long as NMI isn't blocking it.
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2017-07-08 21:01:52 -04:00 |
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Thomas Harte
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30e93979d2
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Removed data work if sync is enabled; in that case no data is output.
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2017-07-08 21:01:07 -04:00 |
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Thomas Harte
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d6b87053bf
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Introduced an explicit record of whether a video byte is latched. It's definitely incorrect to treat the latching of 0 as equivalent to no latching, as the byte that will eventually become video is not strongly implied.
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2017-07-08 20:40:19 -04:00 |
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Thomas Harte
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22389a5d2d
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Merge branch 'master' into HiRes
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2017-07-08 20:38:25 -04:00 |
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