3487 Commits

Author	SHA1	Message	Date
Thomas Harte	ce5aae3f7d	Adjust more dangling indentation changes.	2024-12-04 22:29:08 -05:00
Thomas Harte	b89ecadc3a	Improve interface.	2024-12-03 22:54:29 -05:00
Thomas Harte	6d4ff0b89a	Finally eliminate all that virtual_ nonsense.	2024-12-03 22:28:57 -05:00
Thomas Harte	d3ed485e7a	Take another big swing at indentation, some consts.	2024-12-01 21:44:14 -05:00
Thomas Harte	31c878b654	Merge pull request #1424 from TomHarte/InstructionSetFormatting ... Improve formatting, `const`ness in instruction sets.	2024-12-01 20:24:55 -05:00
Thomas Harte	3a0f4a0bfc	Improve constness, formatting.	2024-12-01 18:09:19 -05:00
Thomas Harte	8b88d1294d	Remove errant spaces.	2024-12-01 09:04:32 -05:00
Thomas Harte	7248470950	Roll formatting and const tweaks into Inputs.	2024-11-30 18:57:56 -05:00
Thomas Harte	72d7917415	Specify correct 6845; experiment with vsync.	2024-10-16 21:02:58 -04:00
Thomas Harte	08d094c786	Use appropriate std::array semantics.	2024-10-15 22:14:29 -04:00
Thomas Harte	a1634ab496	Reduce uninitialised usages.	2024-10-15 22:10:16 -04:00
Thomas Harte	b701ce9721	Shuffle construction order.	2024-10-15 21:51:23 -04:00
Thomas Harte	26d7d58a5f	Add TODO.	2024-10-15 21:16:07 -04:00
Thomas Harte	b6fff521e4	Allow new interrupts to override the end of previous.	2024-10-15 12:27:30 -04:00
Thomas Harte	23f1308231	Experiment with reads/writes earlier in the transaction.	2024-10-15 12:10:36 -04:00
Thomas Harte	947e890c59	Adjust mode latch time, timer hsync signalling.	2024-10-15 11:53:00 -04:00
Thomas Harte	9acc80260f	Eliminate phases due to lack of evidence.	2024-10-09 11:59:27 -04:00
Thomas Harte	65c1d99120	Add, disable some logging.	2024-10-05 22:30:53 -04:00
Thomas Harte	45549b5fcd	Switch CRTC type.	2024-10-03 22:07:12 -04:00
Thomas Harte	0d0e1083e6	Fix potential out-of-bounds access.	2024-09-30 13:37:44 -04:00
Thomas Harte	dfcdbe5b6a	Merge pull request #1402 from TomHarte/CPCInterruptTiming ... Pull CPC interrupt to start of hsync.	2024-09-12 21:12:02 -04:00
Thomas Harte	581454db69	Tweak mode latch time too.	2024-09-12 20:47:27 -04:00
Thomas Harte	63d501b629	Pull interrupt to start of hsync.	2024-09-12 20:45:28 -04:00
Thomas Harte	44574465c5	Extend vsync to four lines.	2024-09-10 21:06:49 -04:00
Thomas Harte	2b7382a014	Loop in vsync as a potential tape input.	2024-09-10 20:59:05 -04:00
Thomas Harte	584b6df40d	Tweak 60Hz period.	2024-09-10 20:43:01 -04:00
Thomas Harte	e55f61deb2	Add vsync getter.	2024-09-10 20:31:35 -04:00
Thomas Harte	a6c6a1c6da	Eliminate macros.	2024-09-10 20:29:34 -04:00
Thomas Harte	1c2f66e855	Fix order of if tests.	2024-09-08 21:23:58 -04:00
Thomas Harte	b7f069e1bd	Add a colour burst.	2024-09-08 21:12:45 -04:00
Thomas Harte	51c8396e32	Fix faulty centring.	2024-09-08 21:06:59 -04:00
Thomas Harte	0efe649ca5	Post pixel clock.	2024-09-08 20:57:43 -04:00
Thomas Harte	75db0018bc	Add note on provenance.	2024-09-08 20:20:03 -04:00
Thomas Harte	2a9e1ea045	Use normal member naming convention.	2024-09-08 20:16:43 -04:00
Thomas Harte	8feb8aaadc	Reintroduce cropping, even if faulty.	2024-09-06 22:12:19 -04:00
Thomas Harte	b8f4385501	Fix palette generation.	2024-09-06 21:47:13 -04:00
Thomas Harte	d8b6d87a1c	Attempt colour.	2024-09-06 21:36:05 -04:00
Thomas Harte	f10702b3ca	Edge towards proper serialisation.	2024-09-06 21:01:30 -04:00
Thomas Harte	88248d7062	Fix base address, delays.	2024-09-06 20:55:26 -04:00
Thomas Harte	5ca1659bcc	Do just enough to get 1bpp fixed-palette pixels.	2024-09-06 20:36:27 -04:00
Thomas Harte	59530a12fd	Sub in basic transliteration of hoglet's FPGA.	2024-09-06 20:21:46 -04:00
Thomas Harte	aab2dd68b6	Substitute in a real-time video generator.	2024-09-06 20:18:29 -04:00
Thomas Harte	b5932edff3	Avoid missed interrupts on wraparound.	2024-08-26 21:13:49 -04:00
Thomas Harte	12846317cb	Short-circuit non-interrupts.	2024-08-26 21:13:25 -04:00
Thomas Harte	30b1b36e63	Test digits individually; CSLs autolink.	2024-08-07 22:44:48 -04:00
Thomas Harte	0e58f7fa69	Merge branch 'master' into SSLandCSL	2024-07-05 14:54:47 -04:00
Thomas Harte	00b3007b9f	Switch byte order.	2024-07-02 21:51:00 -04:00
Thomas Harte	dbc0ecde31	Catch SSM events.	2024-06-30 21:26:16 -04:00
Thomas Harte	f742266177	Add SSM code capture to CPC.	2024-06-26 21:53:11 -04:00
Thomas Harte	7d728c37ee	Fix comment, both grammar and content.	2024-06-18 12:56:25 -04:00