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mirror of https://github.com/TomHarte/CLK.git synced 2024-12-29 13:29:46 +00:00
Commit Graph

3888 Commits

Author SHA1 Message Date
Thomas Harte
bc805a90fe Wired up joystick directions, at least, and fire button presses get as far as the C++. But there's some latching to figure out before they'll work. 2015-08-18 20:33:24 -04:00
Thomas Harte
902795d61c Switched vertical sync detection method, at least for now. They never happen automatically (I need to fix that) and just always take effect if detected in the lower half of the display. PAL/NTSC is determined just by looking at the refresh rate. 2015-08-18 00:17:03 -04:00
Thomas Harte
d21ccddeef Fixed: _vBlankExtend is now cleared at the correct moment. 2015-08-17 17:54:36 -04:00
Thomas Harte
a33d31d02a Fixed to allow loading of ROMs less than 1kb in size. 2015-08-17 00:34:01 -04:00
Thomas Harte
083b678785 Quickie: observed that the initial position is one scanline dirty, not zero. Also switched to a size_t on the write pointer, size_t being the correct C size for into-memory offsets. 2015-08-17 00:25:32 -04:00
Thomas Harte
df68aeff5a Fixed: made sure that _vBlankExtend resets itself even on non-pixel lines. 2015-08-17 00:09:28 -04:00
Thomas Harte
414849f166 Confirmed: pixel counters are not paused by programmatic vertical blank. 2015-08-16 17:34:20 -04:00
Thomas Harte
cde9bb7ebc Put common shift step into a macro. 2015-08-16 16:12:20 -04:00
Thomas Harte
a693c081f8 Switched on the appropriate compiler warnings re: signed comparisons and implicit conversions. Fixed all less-than-explicit calls. 2015-08-16 16:08:29 -04:00
Thomas Harte
1cc479affd Removed redundant GL call. 2015-08-16 15:40:03 -04:00
Thomas Harte
410c09cb35 Made attempt not to touch the _collisions registers (which are instance variables) unless the local variables imply it's potentially necessary. So that's a broad phase on collisions, I guess. 2015-08-16 15:39:40 -04:00
Thomas Harte
40cb1cf60d ... and the ball graphic. 2015-08-16 11:24:33 -04:00
Thomas Harte
afaa86a649 Minor thing: skip the internal counter stuff if we're definitely going to end up with a transparent pixel anyway for the player and missile graphics. 2015-08-16 11:23:46 -04:00
Thomas Harte
4b5aabdd54 Attempted to take even more out of the inner pixel loop. 2015-08-13 23:23:04 +01:00
Thomas Harte
391789e75c Removed stray space. 2015-08-13 23:22:51 +01:00
Thomas Harte
cbe76ea5d5 Got rid of the thread hopping in order to redraw the GL view. Which appears to help significantly with total application cost. 2015-08-13 22:01:25 +01:00
Thomas Harte
92c7d56cc3 Tiny little speed improvement. Every little helps. 2015-08-13 21:50:24 +01:00
Thomas Harte
17bbe27c9a As an experiment, performed some very basic moving of playfield composition outside of the pixel loop. 2015-08-13 21:32:22 +01:00
Thomas Harte
033655835a My understanding now is that object position counting will begin the cycle after the call is made, not that cycle, and that the timer loops just once, with the logic for counter pumping being whether the relevant flag is still set, irregardless of whether the counter is still going. 2015-08-13 18:59:23 +01:00
Thomas Harte
b440fed323 Fixed a couple of incorrect references to horizontal constants or calculations where the intention is to use vertical. 2015-08-13 18:29:07 +01:00
Thomas Harte
323aa27e13 Fixed: paging is based directly on the access, independent of the read/write line (since it isn't actually exposed to catridges). 2015-08-13 15:04:30 +01:00
Thomas Harte
59c872ada6 Attempted to reintroduce suitably noted emergency flyback. To re-enable auto-selection of PAL. 2015-08-13 14:55:53 +01:00
Thomas Harte
9838e01cc1 Made a first attempt at paging. 2015-08-13 13:24:02 +01:00
Thomas Harte
9ca57b80a7 Minor steps to help with diagnostics; all commented out or merely to benefit with breakpoint placement. 2015-08-13 08:43:10 +01:00
Thomas Harte
cc98534f94 Added test for NOP, discovering the undocumented ones to be the incorrect length. 2015-08-13 07:32:50 +01:00
Thomas Harte
6616265d93 Fixed collision tests, added a few more timing tests. 2015-08-13 03:33:45 +01:00
Thomas Harte
dd0f17130a Found and fixed some timing errors in absolute indexed and in (indirect), y addressing modes: neither is able in write or read-modify-write modes to shave a cycle as then can when reading. 2015-08-13 02:58:39 +01:00
Thomas Harte
975836c30f Added a quick snippet test, discovering that I've cut a cycle from read/modify/writes. 2015-08-13 02:18:41 +01:00
Thomas Harte
503d684af0 Added a couple of timing tests, both of which seem to pass for now. 2015-08-13 01:55:23 +01:00
Thomas Harte
e8f70398c1 Added one basic timing test, for now: implied nop should be two cycles. 2015-08-13 01:06:56 +01:00
Thomas Harte
d19f8ed507 Removed the implicit reset upon 6502 startup, adding a reset line. Hence all tests now pass again. Added an empty shell for timing tests, the all-RAM 6502 now counting bus cycles. 2015-08-13 00:51:06 +01:00
Thomas Harte
687816d470 Made some attempted simplifications, implemented collisions. 2015-08-13 00:31:57 +01:00
Thomas Harte
aebf636528 Ensured the PIA timer resumes its normal tick rate after being read; fixed those spaces that had crept in where tabs should be. 2015-08-10 16:55:16 +01:00
Thomas Harte
42677f5f83 Fixed association of motion registers and actual registers. 2015-08-10 16:43:45 +01:00
Thomas Harte
0e52b7365e Removed redundant code. 2015-08-10 16:42:25 +01:00
Thomas Harte
2dde2efff0 Attempted to standardise object counters. 2015-08-10 15:09:40 +01:00
Thomas Harte
a228969655 This should happen every fourth cycle. 2015-08-10 08:16:17 +01:00
Thomas Harte
3c27306a8e My counter was going the wrong way. 2015-08-10 00:33:37 +01:00
Thomas Harte
a4e52cc4db Made an attempt to switch to a hardware-accurate object timer model. Without yet perfect success. 2015-08-10 00:20:18 +01:00
Thomas Harte
cd67e31e64 Made a first attempt at switching a little closer to TIA's real internal counter setup. 2015-08-09 22:47:11 +01:00
Thomas Harte
987be65a59 Made a quick attempt at reimplementing skip-to-the-end logic for ready waits. 2015-08-09 02:42:01 -04:00
Thomas Harte
eb23a493e5 Switched back to one texel per colour clock, at least for now. Attempted to break _RGBA assumption within the cathode ray view. 2015-08-05 23:36:04 -04:00
Thomas Harte
fd36f13baf The cathode ray view no longer hard codes the frame size. So that's one less coupling. Doubled pixel output size to give sufficient sampling detail to capture the NTSC colour clock (ummm, hopefully). 2015-08-05 21:45:47 -04:00
Thomas Harte
67e82c713f Broke assumption that every item in a vertex description is a short, specifically turning lateral into a byte. Which buys me a byte for phase, if that's sufficient. 2015-08-05 21:12:33 -04:00
Thomas Harte
5644b3a1cc Fixed scanline sizing and fill issues, as well as shortening vsync to the correct Atari length. 2015-08-05 20:55:27 -04:00
Thomas Harte
265d1d5b24 Merge branch 'EdgeTriggeredVSync' 2015-08-05 20:30:02 -04:00
Thomas Harte
84d1c2e47d Fixed end of sync time calculation and ensured the pretend capacitor is emptied by the decision to retrace and doesn't refill during retrace. 2015-08-05 20:29:20 -04:00
Thomas Harte
04c2640b15 Made a quick attempt to allow vsync triggers only on the raising edge of a sync signal. Will need to investigate more thoroughly. 2015-08-03 08:42:05 -04:00
Thomas Harte
5313b48ebd I'm ashamed to admit, I: played with numbers until enough things looked stable such that I can investigate other things. Discovery: my PAL autodetection was way off. Fixed, hopefully. 2015-08-02 20:32:18 -04:00
Thomas Harte
55017b78a5 Made an attempt to unify my variable storage (and, technically, to get beam size correct across the frame). 2015-08-02 19:30:45 -04:00