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Author	SHA1	Message	Date
Thomas Harte	6d42c9aaf9	Start making leeway on interesting SWIs.	2024-05-06 22:40:00 -04:00
Thomas Harte	02ee3a7804	Turf out old debugging cruft.	2024-05-06 20:36:00 -04:00
Thomas Harte	bdf1dff976	Update version number.	2024-05-04 21:16:43 -04:00
Thomas Harte	e6724a701a	Merge pull request #1373 from TomHarte/DiskReady ... Further adjust RDY.	2024-04-30 22:50:17 -04:00
Thomas Harte	d90eedfc8c	Adjust bit polarity, meaning.	2024-04-30 22:49:26 -04:00
Thomas Harte	63009d00b4	Merge pull request #1372 from TomHarte/DiskReady ... Add Archimedes disk drive RDY signal.	2024-04-30 22:38:20 -04:00
Thomas Harte	6a2261d217	Merge branch 'master' into DiskReady	2024-04-30 22:38:07 -04:00
Thomas Harte	c3ad2154b5	Merge pull request #1371 from TomHarte/Interlacing ... Support Archimedes interlaced video.	2024-04-30 22:37:48 -04:00
Thomas Harte	3d61861737	Ensure switch is complete.	2024-04-30 22:26:19 -04:00
Thomas Harte	7545786436	Ensure extra line types are used.	2024-04-30 22:22:18 -04:00
Thomas Harte	a997b6c677	Wire drives for IBM-style RDY.	2024-04-30 22:18:17 -04:00
Thomas Harte	72d4f638aa	Merge branch 'master' into Interlacing	2024-04-30 22:08:57 -04:00
Thomas Harte	b15ff6d442	Support interlaced video timing.	2024-04-30 22:06:08 -04:00
Thomas Harte	cb70967971	Merge pull request #1370 from TomHarte/Zarch ... Add automatic runtime frame-rate limiter.	2024-04-30 22:02:06 -04:00
Thomas Harte	42aea2663c	Add automatic runtime frame-rate limiter.	2024-04-30 21:38:37 -04:00
Thomas Harte	a882faa7f6	Merge pull request #1369 from TomHarte/UnmaskedSubAddresses ... Mildly reduce ARM/Archimedes hot-path costs.	2024-04-29 22:58:22 -04:00
Thomas Harte	5da01e4fd8	Add potential short-circuit.	2024-04-29 22:45:30 -04:00
Thomas Harte	71c5a1d419	Avoid repeated trans comparison.	2024-04-29 22:35:01 -04:00
Thomas Harte	03c3da7338	Bifurcate Zone enum, possibly to help compiler.	2024-04-29 22:34:46 -04:00
Thomas Harte	47b276ca0b	Merge pull request #1368 from TomHarte/MinorTweaks ... Fix trans for instruction fetches.	2024-04-29 22:29:25 -04:00
Thomas Harte	c7747ec5a0	Remove a conditional from the hot path.	2024-04-29 22:16:06 -04:00
Thomas Harte	5a84e98256	Fix trans for instruction fetches.	2024-04-29 21:54:59 -04:00
Thomas Harte	b66d69b60c	Merge pull request #1367 from TomHarte/FloppyHeft ... Slightly reduce processing heft of floppy accesses.	2024-04-28 22:49:31 -04:00
Thomas Harte	dfaea5a922	Reduce floppy access cost.	2024-04-28 22:40:54 -04:00
Thomas Harte	f4da417c3a	Merge pull request #1366 from TomHarte/VIDCDelays ... Add various VIDC output latencies.	2024-04-28 22:39:29 -04:00
Thomas Harte	fa7fff86eb	Eject invalid specialisation.	2024-04-28 22:20:26 -04:00
Thomas Harte	d480f9eae2	Reinstate all missing video modes.	2024-04-28 21:49:04 -04:00
Thomas Harte	4f1aef90b8	Relocate pixel collection and cursor shifting.	2024-04-26 21:29:30 -04:00
Thomas Harte	24f4538eb7	Do faulty restoration of 4bpp mode.	2024-04-25 22:50:24 -04:00
Thomas Harte	38d096cad6	Begin new state machine, losing all non-cursor pixels.	2024-04-25 22:01:38 -04:00
Thomas Harte	b82af9c471	Fix vertical timing; don't miss border colour changes.	2024-04-24 20:47:11 -04:00
Thomas Harte	0bff2089c4	Merge pull request #1364 from TomHarte/SomeWarnings ... Resolve various warnings.	2024-04-23 19:40:43 -07:00
Thomas Harte	36d9c40d7b	Yuckily avoid warning.	2024-04-23 22:23:56 -04:00
Thomas Harte	becb6ce2e0	Fix two more not-really-an-issue warnings.	2024-04-23 22:20:13 -04:00
Thomas Harte	56b65780d2	Avoid loading nonsense value upon data abort.	2024-04-22 22:09:57 -04:00
Thomas Harte	265d151879	Fix data aborts.	2024-04-22 22:08:09 -04:00
Thomas Harte	c485097eed	Fix bool combination.	2024-04-22 22:06:09 -04:00
Thomas Harte	f86e9fe086	Eliminate impossible conditional.	2024-04-22 21:58:49 -04:00
Thomas Harte	c91ce4cfea	Ensure all routes return.	2024-04-22 21:57:20 -04:00
Thomas Harte	8e64a854fc	Ensure all routes return; mildly decrease conditionals.	2024-04-22 21:56:53 -04:00
Thomas Harte	7c9383cd6b	Update version number.	2024-04-20 14:45:21 -04:00
Thomas Harte	82d03e3980	Merge pull request #1362 from TomHarte/ThreeStepPipeline ... Introduce some degree of an ARM pipeline.	2024-04-19 19:41:46 -07:00
Thomas Harte	0775e3ad58	This is an 8-bit value.	2024-04-19 22:35:43 -04:00
Thomas Harte	ea3eef3817	Put interrupts into pipeline, without delay.	2024-04-19 22:21:23 -04:00
Thomas Harte	83eac172c9	Revoke in-pipeline interrupts. ... I'm unclear on what timing should apply here really.	2024-04-19 21:46:09 -04:00
Thomas Harte	5b13d3e893	Attempt the prefetch portion of a pipeline.	2024-04-19 21:30:15 -04:00
Thomas Harte	807835b9fe	Merge pull request #1361 from TomHarte/Pipeline ... Provide hooks for implementing pipeline prefetch.	2024-04-19 06:58:45 -07:00
Thomas Harte	4bf02122ee	Fix disassembler.	2024-04-18 23:17:44 -04:00
Thomas Harte	e6c4454059	Provide a means for SWI interception.	2024-04-18 22:13:58 -04:00
Thomas Harte	d464ce831a	Add did_set_pc.	2024-04-18 19:30:07 -04:00