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Author SHA1 Message Date
Thomas Harte
7749aef6b6 Improve const correctness. 2022-04-19 14:35:40 -04:00
Thomas Harte
5de8fb0d08 Disallow four illegal NBCD addressing modes. 2022-04-19 09:59:02 -04:00
Thomas Harte
19f7335926 Add post validation step. 2022-04-19 09:44:02 -04:00
Thomas Harte
9b61830a55 Add ADD.b as a note to self that .q decoding is also required. 2022-04-19 08:44:44 -04:00
Thomas Harte
99f4cd867d Decode the two EXTs. 2022-04-19 08:42:17 -04:00
Thomas Harte
f29fec33a2 Eliminate mismatches due to unsupported addressing modes. 2022-04-19 08:37:53 -04:00
Thomas Harte
93fe3459fd The quick value won't always fit in reg; turf the problem elsewhere. 2022-04-19 08:37:35 -04:00
Thomas Harte
1abd3bd7f3 Decode SWAP. 2022-04-19 08:37:13 -04:00
Thomas Harte
5509f20025 Fix MOVEfrom/toSR and NBCD listings. 2022-04-19 08:07:34 -04:00
Thomas Harte
fc4fd41be4 Reorder from most specific to least. 2022-04-19 08:00:52 -04:00
Thomas Harte
3ffca20001 Uncover various discrepancies with NBCD. 2022-04-19 07:15:54 -04:00
Thomas Harte
7c29305788 Test all ABCDs. 2022-04-18 20:00:39 -04:00
Thomas Harte
41fb18e573 Add 68k decoder to SDL build. 
... and therefore to automated compilation testing.
 2022-04-18 14:43:41 -04:00
Thomas Harte
e4c6251ef5 Express the BSR/Bcc.l test properly. 2022-04-18 14:42:31 -04:00
Thomas Harte
7aa250eaf7 Advances to hitting the same absent/present mapping as the old decoder. 2022-04-18 14:41:26 -04:00
Thomas Harte
ff380b686a Decode MOVEq. 2022-04-18 09:12:45 -04:00
Thomas Harte
d2452f4b68 Fix SUBQ ExtendedOperation mappings. 2022-04-18 09:08:49 -04:00
Thomas Harte
deb9c32a38 Add missing Sccs. 2022-04-18 09:04:17 -04:00
Thomas Harte
440f45b996 Attempt decoding and disambiguation of Scc, DBcc, Bcc and BSR. 2022-04-18 08:55:46 -04:00
Thomas Harte
7d64c4ec66 Add STOP. 2022-04-18 08:29:10 -04:00
Thomas Harte
7fe0d530c1 Add a decoder for TRAP. 2022-04-18 08:05:33 -04:00
Thomas Harte
c944767554 Better document decoding patterns, add LEA and CHK. 2022-04-18 08:00:43 -04:00
Thomas Harte
fde5a1c507 Ensure ADDI, SUBI, etc, provide an operation. 2022-04-18 07:42:30 -04:00
Thomas Harte
0fbfb41fa8 Expand on none-matching text. 2022-04-18 07:42:14 -04:00
Thomas Harte
1991ed0804 Introduce failing [partial-]test of new 68000 decoder. 2022-04-18 07:23:25 -04:00
Thomas Harte
e782b92a80 Add exposition. 2022-04-17 19:56:39 -04:00
Thomas Harte
07635ea2be Add register names, Q values. 2022-04-17 19:46:21 -04:00
Thomas Harte
1916bd3bd0 Import a first effort at listing all 68000 instruction specs. 2022-04-17 07:57:59 -04:00
Thomas Harte
4eb752b000 Even out tabs. 2022-04-15 20:41:39 -04:00
Thomas Harte
bfb29a58f3 Take another crack at neatness; make LEA overt. 2022-04-15 20:33:59 -04:00
Thomas Harte
f86e455a87 Advance permissively through the 4xxx page to LEA. 2022-04-15 16:01:33 -04:00
Thomas Harte
faa35fe9fc Decode MOVE and the fixed 0x4xxx set. 2022-04-15 15:40:31 -04:00
Thomas Harte
89b8b59658 Ostensibly completes the 0 line. 2022-04-15 15:33:54 -04:00
Thomas Harte
de55a1adc4 Require a model for decoding; shift a bunch of immediates into ExtendedOperation. 2022-04-15 09:40:37 -04:00
Thomas Harte
d1613025ee For now, assume the .q actions can be handled inside Preinstruction. 2022-04-13 09:29:12 -04:00
Thomas Harte
cc4431c409 Expand decode to accept a wider array of operations, and then funnel them down. 2022-04-12 16:17:30 -04:00
Thomas Harte
3d5986c55d Some minor style changes, plus I think I've talked myself into an expanded Operation-tracking enum. Probably. 2022-04-12 14:54:11 -04:00
Thomas Harte
9aeb6ee532 Formally prepare for one- and two-operand instructions. 2022-04-12 09:14:46 -04:00
Thomas Harte
e7f6cc598d Make first attempt to complete broad phase of decoding. 2022-04-12 09:08:46 -04:00
Thomas Harte
cd465dd121 Decode page E. 2022-04-12 09:04:40 -04:00
Thomas Harte
174b48a14a Populate lines 9 and D. 2022-04-12 08:57:40 -04:00
Thomas Harte
bca18e7aba Fill in line decoders for 5, 6 and 7. 
This leaves 9, D and E to go.
 2022-04-12 08:44:32 -04:00
Thomas Harte
17e761d6c6 Add enough code to pages 0–3 to shift problem to decode(). 2022-04-12 08:36:44 -04:00
Thomas Harte
c50556dde4 Create empty line decoders. 2022-04-12 08:16:29 -04:00
Thomas Harte
dd5bdd67d7 Add B page and a large chunk of 4. 2022-04-12 07:49:08 -04:00
Thomas Harte
21ac9363e9 Add page 8. 2022-04-11 16:32:57 -04:00
Thomas Harte
8e3cccf4d6 Begins a formalised 68k decoder. 2022-04-11 15:00:55 -04:00
Thomas Harte
945e935312
Merge pull request #1020 from TomHarte/RotateMask 
Improve PowerPC rotate mask generation.
 2022-04-10 15:24:17 -04:00
Thomas Harte
bb5cf570e5 Remove conditional, make generic enough for both 32- and 64-bit operation. 2022-04-10 15:18:23 -04:00
Thomas Harte
a5ed288db2
Merge pull request #1018 from TomHarte/PowerPCTests 
Import Dingusdev PowerPC tests
 2022-04-10 09:45:39 -04:00