Thomas Harte
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29288b690e
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Switched disk controllers to be instantiated explicitly in terms of cycles, created an Amstrad-specific subclass of the 8272 to record the direct programmatic availability of all disk motors bundled together, and otherwise adjusted to ensure the thing is clocked and that the motor is enabled and disabled appropriately. The 8272 is also now formally a subclass of the incoming MDM controller.
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2017-08-06 09:45:16 -04:00 |
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Thomas Harte
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4abd62e62b
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Standardises on const [Half]Cycles as the thing called and returned, rather than const [Half]Cycles & as it's explicitly defined to be only one int in size, so using a reference is overly weighty.
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2017-07-27 22:05:29 -04:00 |
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Thomas Harte
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a1e9a54765
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Eliminated redundant uses of ClockReceiver and sought to ensure that proper run_fors are inherited all the way down.
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2017-07-25 20:09:13 -04:00 |
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Thomas Harte
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b3ae920746
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Converted the DPLL and disk controller classes to be ClockReceivers.
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2017-07-24 21:04:47 -04:00 |
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Thomas Harte
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0490a47058
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Worked on the all-around framework for decoding sectors back from tracks when closing down a file. Hit the wall that the parser is more observant of CRCs than the WD. No, really. So I guess I have to stop avoiding that whole issue.
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2016-12-26 14:24:33 -05:00 |
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Thomas Harte
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742c5df367
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With lots of logging arising temporarily, fixed bug whereby conversion to a patched track would lead to holding a track with a distinct measure of time, leading to improperly-placed patches.
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2016-12-25 22:00:39 -05:00 |
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Thomas Harte
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4fca30b81f
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Made the Plus 3 less chatty, documented invalidate_track.
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2016-12-25 21:06:58 -05:00 |
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Thomas Harte
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1349e85d83
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[Mostly] fixed track write-back.
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2016-12-25 19:19:22 -05:00 |
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Thomas Harte
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aceb7e3b6b
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Started implementing write sector on the 1770, immediately deciding it would be useful to have a callback for end-of-queued-data-written from disk controller. So had a go at implementing that, naively. More investigation required.
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2016-12-25 12:31:38 -05:00 |
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Thomas Harte
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901f19f89c
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Added enough stuff that SSDs attached to a 1770 will now reach the entry point for writing.
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2016-12-25 09:46:12 -05:00 |
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Thomas Harte
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9d555c4a02
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Let's try just declining to pump the PLL while in write mode. Added documentation to explain.
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2016-12-25 09:19:18 -05:00 |
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Thomas Harte
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af69b21033
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This is almost complete, except that it doesn't act appropriately if some bits are written but not enough to cover the entire writing period.
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2016-12-24 22:51:26 -05:00 |
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Thomas Harte
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afc6f4129c
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Withdrew unused tally.
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2016-12-24 21:47:57 -05:00 |
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Thomas Harte
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1e416d4af0
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Withdrew now-unused and never-implemented API from TimedEventLoop, and the redundant track time count from DiskController.
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2016-12-24 21:02:10 -05:00 |
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Thomas Harte
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bedea48d03
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This is a much better way of dealing with being partway into an incoming event. Subject to eliminating overruns, of course.
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2016-12-24 20:54:27 -05:00 |
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Thomas Harte
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1e970a9772
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Started stepping slowly towards allowing writing on the disk controller, taking the opportunity to introduce self-simplifying behaviour to Storage::Time.
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2016-12-24 13:07:23 -05:00 |
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Thomas Harte
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c4041b06a8
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This'll do as a write interface, won't it?
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2016-12-07 22:19:20 -05:00 |
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Thomas Harte
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0dc2aa6454
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Commuted all of 'Storage' other than 'Tape' to postfix underscores.
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2016-12-03 11:59:28 -05:00 |
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Thomas Harte
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93c573bfa9
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Implemented missing status bits (other than the index hole), and a head loading delay for the Microdisc.
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2016-12-01 21:13:16 -05:00 |
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Thomas Harte
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2222cb65d6
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Split the status up into flags, assembled into a register upon demand. Attempted to implement some of the differences between the 1770/1772 and 1773/1793. Albeit with a motor fix still in place.
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2016-11-30 22:26:02 -05:00 |
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Thomas Harte
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572d5587d9
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Made a first stab at enabling multi-disk machines and thereby obeying (some of) the Plus 3's status register.
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2016-09-25 21:24:16 -04:00 |
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Thomas Harte
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9bbcbd1001
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Renamed class, intending to turn a Disk::Drive into literally just that, and have a thing with a PLL that consumes events be a Controller.
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2016-09-25 20:05:56 -04:00 |
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