6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-12-26 09:29:45 +00:00
Code Issues Projects Releases Wiki Activity
10,007 Commits 7 Branches 121 Tags 500 MiB
8665dca7f0
Commit Graph

10007 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Thomas Harte
8665dca7f0 Permit generator-based event-table generation. 2023-02-12 21:58:50 -05:00
Thomas Harte
41d57e03a6 Split out LineBuffer and Storage to make 9918Base more manageable. 2023-02-12 12:58:46 -05:00
Thomas Harte
914a9e0c84 Yamaha: don't touch address at all unless a RAM access. 2023-02-11 22:43:29 -05:00
Thomas Harte
8768ee1504 Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-11 22:40:03 -05:00
Thomas Harte
8e6c36bb15 Yamaha: don't part-modify address. 2023-02-11 10:35:42 -05:00
Thomas Harte
c6401f0444 Add TODO. 2023-02-07 22:28:18 -05:00
Thomas Harte
3c3efe3e22 Don't be so fussy. 2023-02-06 22:16:42 -05:00
Thomas Harte
7028bdd05d Limit to 14 bits in old modes. 2023-02-06 22:16:31 -05:00
Thomas Harte
7cb51c021b Observation: offset is needed only ephemerally. 2023-02-06 21:45:35 -05:00
Thomas Harte
a3df106f92 Reset write phase only upon traditional register accesses. 2023-02-06 20:32:24 -05:00
Thomas Harte
b538407386 Introduce separate state for palette entries. 2023-02-06 19:12:02 -05:00
Thomas Harte
c04d292c8e Make this more obviously correct, albeit arbitrarily. 
Comparing just a single bit would do.
 2023-02-05 22:53:08 -05:00
Thomas Harte
f9c88fd598 Fix memory mask; mildly improve commentary. 2023-02-05 22:51:16 -05:00
Thomas Harte
7fcb1b29dd Keep source within rectangle. 
This gives something vaguely recognisable, sort of, for the test program I'm using.
 2023-02-04 21:37:08 -05:00
Thomas Harte
6786e3e78c Initialise to zero, for completeness. 2023-02-04 21:32:31 -05:00
Thomas Harte
67755c3811 Attempt [H/L]MMM. 2023-02-04 21:29:44 -05:00
Thomas Harte
c6372295c5 Complete ReadSourcePixel & ReadSourceByte paths. 2023-02-04 21:23:41 -05:00
Thomas Harte
a2786e6266 Invest Colour with its own logic, including potential emptiness. 2023-02-04 21:14:20 -05:00
Thomas Harte
a892523c09 Advance to the next breaking point. 2023-02-04 11:43:06 -05:00
Thomas Harte
ab595f5e8d Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-04 11:02:10 -05:00
Thomas Harte
38950fe241 Sketch out remaining necessary @c AccessTypes. 2023-02-04 11:02:02 -05:00
Thomas Harte
46d009f27b Add logical fill. 2023-02-04 10:31:41 -05:00
Thomas Harte
34722bae89 Start pivoting to a more natural expression of TMS patterns. 2023-02-03 23:06:27 -05:00
Thomas Harte
d41081c59f Fix sections. 2023-02-02 21:55:00 -05:00
Thomas Harte
ec227ce021 Generalise rectangular operations. 2023-02-02 21:49:05 -05:00
Thomas Harte
83f6d1cda3 Prepare for source/destination operations. 2023-02-02 21:16:24 -05:00
Thomas Harte
6d315b4660 Switch to specifying number of bits, to reduce potential error. 2023-02-02 12:12:11 -05:00
Thomas Harte
debdad350d Don't allow a disabled screen to interfere with Yamaha addressing. 2023-02-02 12:03:33 -05:00
Thomas Harte
0d4dc214fb Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-02 11:38:45 -05:00
Thomas Harte
5d4c49c913 Attempt to enable high-speed fill. 2023-02-01 22:57:33 -05:00
Thomas Harte
8f5c7fcabc Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-02-01 22:25:12 -05:00
Thomas Harte
115acf835e Vertical state is actually tristate. 2023-02-01 22:25:00 -05:00
Thomas Harte
c0fec8db15 Clean up macro. 2023-02-01 15:05:21 -05:00
Thomas Harte
f0e70f18fd Fix seeding of output_pointer_. 2023-02-01 14:59:42 -05:00
Thomas Harte
9d2841bf6a Reenable full ram pointer capture. Thanks @PatrickvL ! 2023-02-01 14:55:33 -05:00
Thomas Harte
ce6dd188a4 Double up on alignas. 2023-02-01 14:31:40 -05:00
Thomas Harte
4cc34fd557 Resolve GCC complaint. 2023-02-01 14:28:19 -05:00
Thomas Harte
3636383b1f Silence abstract/non-virtual-destructor warning. 2023-02-01 14:20:11 -05:00
Thomas Harte
1264600bab Shorten long lines. 2023-02-01 14:18:36 -05:00
Thomas Harte
002d27d9c2 Resolve various type conversion errors, and reduce duplication. 2023-02-01 14:17:49 -05:00
Thomas Harte
90e8ce3253 Fix lines. 
TODO: determine whether I really need `location` as distinct from `.destination`.
 2023-01-31 21:33:57 -05:00
Thomas Harte
a315384e30 Provide context for byte-by-byte commands. 2023-01-31 21:29:55 -05:00
Thomas Harte
c5c722ae56 Generalise axis steps; begin HMMV. 2023-01-31 13:35:39 -05:00
Thomas Harte
872b9e5021 Predict Yamaha horizontal retrace interrupts. 2023-01-30 21:33:47 -05:00
Thomas Harte
492a170b20 Implement much of Yamaha line interrupts. 2023-01-30 21:24:53 -05:00
Thomas Harte
30a2b1611f Merge branch 'MSX2' of github.com:TomHarte/CLK into MSX2 2023-01-30 21:06:23 -05:00
Thomas Harte
29af5542f8 Make an effort at doing _something_ for G4. 2023-01-30 21:06:04 -05:00
Thomas Harte
bc4c54800e Type out just a little of status register 1. 2023-01-30 20:20:33 -05:00
Thomas Harte
4c93d01fe2 Reduce logging. 2023-01-29 21:30:57 -05:00
Thomas Harte
8f20cb93e9 Note missed status accesses. 2023-01-29 21:20:50 -05:00