Thomas Harte
9ca2d8f9f2
Tried to be less lazy with lambda captures.
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This is primarily defensive.
2020-02-14 23:39:08 -05:00
Thomas Harte
91a3d42919
Ensures no DMA clocking whatsoever when asleep.
2020-02-12 23:23:42 -05:00
Thomas Harte
05bcd73f82
Attempts to pull drive ownership into DiskController.
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For the sake of being more intelligent as to drive clocking, hopefully. And, eventually, to support multiple drive selection.
2020-02-11 21:59:13 -05:00
Thomas Harte
24340d1d4f
Resolves fetch errors.
2020-02-09 17:04:49 -05:00
Thomas Harte
085529ed72
Makes the shifter behaviour conform to its documentation.
2020-02-02 17:26:39 -05:00
Thomas Harte
019474300d
Centralises responsibility for picking irrelevant numbers for a computer-style monitor.
2020-01-30 23:26:02 -05:00
Thomas Harte
af976b8b3d
Eliminates modulus operation per ROM access.
2020-01-30 23:09:24 -05:00
Thomas Harte
f3db1a0c60
Eliminates ad hoc scheduling for delayed DE -> LOAD.
2020-01-29 22:50:22 -05:00
Thomas Harte
ce28213a5e
[Mostly] unifies deferral process.
2020-01-29 22:46:08 -05:00
Thomas Harte
f9ce50d2bb
Adds some debugging `asserts.
2020-01-29 22:45:44 -05:00
Thomas Harte
f0a6e0f3d5
Splits out the queue management stuff from queue+action.
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Temporarily breaks ST video in the endeavour.
2020-01-29 22:18:41 -05:00
Thomas Harte
0e29c6b0ab
On further reflection, I think events should occur after the running period.
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I'm testing this now for sanity in 2/4bpp mode.
2020-01-28 23:26:37 -05:00
Thomas Harte
c5edc879b6
Switches back to testing the monochrome monitor.
2020-01-28 22:12:57 -05:00
Thomas Harte
65309e60c4
Corrects sequence point generation by allowing for hsync_end != end of line.
2020-01-28 20:38:20 -05:00
Thomas Harte
2c0cab9e4d
Adds line length latching as a line event.
2020-01-28 20:22:37 -05:00
Thomas Harte
b1ff031b54
Fixes runtime test.
2020-01-27 23:41:08 -05:00
Thomas Harte
7e8405e68a
Makes 72Hz horizontal sync independently relocatable.
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... and moves and shortens it, based on my guesswork as to requirements.
2020-01-27 23:40:01 -05:00
Thomas Harte
c8fd00217d
Resolves loss of horizontal resolution in 1bpp mode.
2020-01-27 23:08:28 -05:00
Thomas Harte
9d340599a6
Towards ST 1bpp support: puts vsync in an appropriate location, starts experimenting with proper CRT timings.
2020-01-27 23:00:30 -05:00
Thomas Harte
294e09f275
All these 'override's can be 'final's.
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At least for the purpose of being communicative. I doubt there's much to gain in terms of compiler output — the DiskImageHolder can avoid some virtual lookups but nothing else leaps out.
2020-01-23 22:57:51 -05:00
Thomas Harte
6802318784
Removes audio_queue_.flush() calls; I don't think I really need to block. At least, not usually.
2020-01-23 20:13:16 -05:00
Thomas Harte
428d141bc9
Factors out the logic behind the Atari 2600's frequency switching.
2020-01-23 20:12:44 -05:00
Thomas Harte
8404409c0d
Causes the Atari 2600 to obey normal flush semantics.
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This stuff is going to become more important with run_until.
2020-01-22 22:05:51 -05:00
Thomas Harte
a71c5946f0
Ensures proper manipulation of scan_statuses, leading to the correct result out of a CRTMachine.
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Possibly with the exception of the TMS, as I appear to have uncovered an unrelated issue there.
2020-01-21 22:28:25 -05:00
Thomas Harte
d97a073d1b
Adds the necessary routine for all machines to be able to respond to get_scan_status.
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They all just as the CRT, as all are currently based on the CRT. Which doesn't currently know the total clock rate it would need to in order properly to scale the answer to the question. Further thought coming.
2020-01-20 21:45:10 -05:00
Thomas Harte
c1bae49a92
Standardises on read and write for bus accesses.
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Logic being: name these things for the bus action they model, not the effect they have.
2020-01-05 13:40:02 -05:00
Thomas Harte
e4349f5e05
Slightly clarifies logic.
2020-01-04 21:32:34 -05:00
Thomas Harte
7b2777ac08
Sorts cases into order; adds copious audio mirrors.
2020-01-04 21:06:21 -05:00
Thomas Harte
0fbcbfc61b
Switches to more idiomatic address listing.
2020-01-04 20:35:47 -05:00
Thomas Harte
3ab4fb8c79
Enables an assumption of partial address decoding at the ACIA and PSG.
2020-01-04 17:27:55 -05:00
Thomas Harte
19ddfae6d6
Adds Joystick key code mode, ensures events aren't posted in interrogation mode.
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This should fix Turrican due to the latter change; I'm not aware of software that uses the former.
2020-01-04 09:45:59 -05:00
Thomas Harte
414b0cc234
Reintroduces sync write delay.
2020-01-02 23:36:11 -05:00
Thomas Harte
134e828336
Updates note to self.
2020-01-02 23:33:35 -05:00
Thomas Harte
455e831b87
Corrects bug whereby changing pixel mode mid-line will produce an improper amount of data.
2020-01-02 23:18:21 -05:00
Thomas Harte
42ccf48966
Judging by Pompey Pirates Menu 88, vsync should occur a line earlier, ending during line 0.
2020-01-02 20:16:28 -05:00
Thomas Harte
2f8078db22
Switches to should_log as a global when I'm hacking about.
2020-01-02 20:15:48 -05:00
Thomas Harte
23ed9ad2de
Corrects application of negative relative scale.
2020-01-01 13:22:21 -05:00
Thomas Harte
017681a97c
Now honours permitted mouse range.
2020-01-01 12:48:38 -05:00
Thomas Harte
90b899c00e
Attempts to implement absolute mouse positioning mode.
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Along with mouse direction.
2020-01-01 12:29:33 -05:00
Thomas Harte
c11fe25537
Merge branch 'master' into EnchantedWoods
2019-12-30 23:32:45 -05:00
Thomas Harte
0a12893d63
Shunts vsync back down to top of frame.
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It's guess after guess, basically.
2019-12-30 23:01:31 -05:00
Thomas Harte
8e777c299f
Switches to latching video interrupts until acknowledged.
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Seems to fix Cisco Heat, at least. I have no idea whether I'm latching the correct thing, whether IACK should clear both or only one, etc.
2019-12-30 23:00:55 -05:00
Thomas Harte
e23d1a2958
Restores vsync active.
2019-12-29 22:03:36 -05:00
Thomas Harte
6449403f6a
Corrects pending_events_ test for sequence points.
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Simplifies around as possible.
2019-12-29 21:53:45 -05:00
Thomas Harte
c8fe66092b
Attempts to correct insertion logic (and mostly bypasses it).
2019-12-29 21:42:41 -05:00
Thomas Harte
b33218c61e
Fixes reload test, which really needs to sense the CRT-headed vsync output.
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i.e. not the one heading back to the CPU.
2019-12-29 20:55:34 -05:00
Thomas Harte
8ce26e7182
Adds a delay on vsync visibility (i.e. as to generating an interrupt).
2019-12-29 19:03:08 -05:00
Thomas Harte
47068ee081
Ensures visible hsync end generates a sequence point.
2019-12-29 17:51:50 -05:00
Thomas Harte
214b6a254a
Adds a delay on visibility of the hsync signal, and a test on address reload.
2019-12-29 17:37:09 -05:00
Thomas Harte
93f6964d8a
Introduces some preliminary line length unit tests.
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Thereby fixes one potential issue with load_ toggling.
2019-12-28 22:50:34 -05:00
