121 Commits

Author	SHA1	Message	Date
Thomas Harte	5a48c15e46	Add scheduler side of PC writeback.	2024-02-28 10:15:23 -05:00
Thomas Harte	d6bf1808f9	Take a swing at PC-as-input.	2024-02-28 09:33:05 -05:00
Thomas Harte	b676153d21	State intention to merge status with other registers.	2024-02-27 15:36:34 -05:00
Thomas Harte	a3339cf882	Fix indentation.	2024-02-27 15:30:51 -05:00
Thomas Harte	4255283e33	Deal with conditionality up front.	2024-02-26 21:36:23 -05:00
Thomas Harte	16e827bb2c	Add basic arithmetics.	2024-02-26 21:27:58 -05:00
Thomas Harte	580f402bb6	Muddle further towards data processing.	2024-02-26 14:50:45 -05:00
Thomas Harte	030dda34f0	Start poking at implementation.	2024-02-26 14:30:26 -05:00
Thomas Harte	481b6d0e69	Sketch out some status flags.	2024-02-25 22:01:51 -05:00
Thomas Harte	a88d41bf00	List the flags.	2024-02-25 15:21:54 -05:00
Thomas Harte	73d2acca12	Moderately improve comments.	2024-02-22 11:20:22 -05:00
Thomas Harte	d205e538e1	Accept the C++ I'm in; clarify and simplify interface.	2024-02-22 10:16:54 -05:00
Thomas Harte	6577f68efc	Complete instruction set; consolidate mapper.	2024-02-21 15:32:27 -05:00
Thomas Harte	e986ae2878	Add coprocessor data operations and register transfers.	2024-02-21 15:25:57 -05:00
Thomas Harte	b2696450d5	Bring forwards single data transfers.	2024-02-21 14:51:51 -05:00
Thomas Harte	2bbaf73aa2	Delete was is now duplicated.	2024-02-21 14:18:41 -05:00
Thomas Harte	0fe2c1406b	Start mutating towards a form that owns the switch.	2024-02-21 14:17:01 -05:00
Thomas Harte	954d920b9e	Extend what's held in the operation enum.	2024-02-20 14:14:18 -05:00
Thomas Harte	57b45076c5	Start dealing with per-instruction fields.	2024-02-17 22:13:51 -05:00
Thomas Harte	9a74ab6a8e	Switch to actual mnenomics, temporarily(?) shrink table.	2024-02-17 15:41:57 -05:00
Thomas Harte	bd0a15c054	Start working on ARM2 decoding.	2024-02-16 21:36:07 -05:00