6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-26 23:52:26 +00:00
Code Issues Projects Releases Wiki Activity
4,066 Commits 8 Branches 121 Tags 496 MiB
b63e0cff72
Commit Graph

263 Commits

Author SHA1 Message Date
Thomas Harte
b63e0cff72 Improves has-completed test. 2018-08-10 22:27:01 -04:00
Thomas Harte
5d6e479338 Implements RMB and SMB, and fixes SBC (zero). 2018-08-10 22:13:51 -04:00
Thomas Harte
90094529a5 Implements TSB and TRB, and adds the extra BIT instructions. 2018-08-10 22:04:45 -04:00
Thomas Harte
aed4c0539e Implements STZ. 2018-08-10 21:17:02 -04:00
Thomas Harte
95164b79c9 Attempted implementation of (zp) addressing mode. 2018-08-09 21:51:14 -04:00
Thomas Harte
bb680b40d8 Implements the 65C02's JMPs. 2018-08-08 22:26:57 -04:00
Thomas Harte
e3f6da6994 Implements the 65C02 NOPs. 2018-08-08 20:00:14 -04:00
Thomas Harte
32338bea4d Implements BRA. 2018-08-06 22:37:30 -04:00
Thomas Harte
1a44ef0469 Introduces Klaus Dorman's 65C02 tests. All failing. 2018-08-06 21:48:43 -04:00
Thomas Harte
ebce9a2e51 Fixes test target. 2018-08-06 21:15:13 -04:00
Thomas Harte
abca38a548 Makes an initial removal of PCMPatchedTrack. Farewell, old friend. 2018-07-01 22:49:57 -04:00
Thomas Harte
853261364e Generalised CRC generation and created specific subclasses for the CCITT CRC16 and CRC32. 2018-05-23 22:21:57 -04:00
Thomas Harte
0b771ce61a Removes all instances of the copyright symbol. 2018-05-13 15:19:52 -04:00
Thomas Harte
05e31d7594 Mutates testComplicatedTrackSeek into an actual test. 
Which frustratingly passes.
 2018-05-01 19:52:12 -04:00
Thomas Harte
f4097290c2 Made various corrections following a quick for-loop constness audit. 2018-04-30 22:23:57 -04:00
Thomas Harte
b32538f3c8 Adds an additional test. 2018-04-30 22:05:44 -04:00
Thomas Harte
e7618bb32e Corrects types (/chickens out). 2018-04-30 22:04:05 -04:00
Thomas Harte
e599e65087 Switches to use of the TargetList typedef wherever possible. 2018-04-14 19:46:38 -04:00
Thomas Harte
389979923e Performs update to and satisfaction of Xcode 9.3's preferred warnings. 2018-03-30 10:25:01 -04:00
Thomas Harte
f0f9d5a6af Corrects memptr leakage via BIT, and ld (de/bc/nn), A behaviour. 2018-03-08 20:30:22 -05:00
Thomas Harte
fdef914137 Corrects test target regression. 2018-03-06 18:32:21 -05:00
Thomas Harte
66faed4008 Gives MachineForTargets complete responsibility for initial machine state. 2018-01-25 18:28:19 -05:00
Thomas Harte
21efb32b6f Integrates the static and nascent dynamic analyser namespaces. 2018-01-24 21:48:44 -05:00
Thomas Harte
ed564cb810 Implements the main four cartridge banking schemes. 
Slightly proof of concept for now.
 2018-01-04 22:18:18 -05:00
Thomas Harte
c8367a017f Cleans up test and makes attempt to factor in cartridge type popularity. 2018-01-01 21:21:05 -05:00
Thomas Harte
344a12566b Tweaks a couple of expected cartridge types. 2018-01-01 20:14:56 -05:00
Thomas Harte
c07113ea95 Ensures no illegal accesses while testing MSX ROM type detection. 
Specifically: the static analyser doesn't even correctly identify everything that is an MSX ROM yet, let alone then properly determine type.
 2018-01-01 17:38:26 -05:00
Thomas Harte
bc2879c412 Corrects the MSX ROM unit test. 
I.e. the test is correct now, for those SHAs I could find. The static analyser is still wrong just slightly less than half the time.
 2018-01-01 17:35:13 -05:00
Thomas Harte
db25b4554b Introduces failing tests of the MSX static analyser. 2018-01-01 16:38:26 -05:00
Thomas Harte
05b95ea2e0 Corrects Xcode tests. 2018-01-01 16:04:13 -05:00
Thomas Harte
6e1d69581c Eliminates a variety of end-of-line spaces. 2017-11-07 22:54:22 -05:00
Thomas Harte
f95515ae81 Eliminates a large number of instance of end-of-line tabs. 2017-11-07 22:51:06 -05:00
Thomas Harte
064f1dfdbc Removes usages of deprecated initialiser. 2017-10-05 18:10:47 -04:00
Thomas Harte
ff24e1de31 Corrects 6522 bridge per has-a-not-is-a template switch. 2017-09-04 21:56:21 -04:00
Thomas Harte
7af3de010e Suspected my mode 1 interrupt timing might be off. Reminded myself of the sources. Persuaded myself that it wasn't. Added appropriate comments. 2017-08-23 22:25:31 -04:00
Thomas Harte
ee71be0e7e Added the option not to include ready line support in the 6502 core, and took advantage of it in the Electron, Oric and Vic-20 implementations. Also tagged those as forceinline and/or override final where applicable. 2017-08-21 21:56:42 -04:00
Thomas Harte
761afad118 Corrected timestamp return, and its testing by the 6502 timing tests. 2017-07-27 21:19:16 -04:00
Thomas Harte
37950143fc Attempted to nudge wait timing onto half-cycle boundaries, which expands the number of partial machine cycles the Z80 can post but pleasingly also regularises them. Switched the AllRAMProcessor to reporting half cycles by default and corrected all Z80 tests. 2017-07-27 20:17:13 -04:00
Thomas Harte
9257a3f6d7 Added test for 16-bit arithmetic, and fixed implementation. 2017-07-26 19:04:52 -04:00
Thomas Harte
728143247d Added a test for RLD and RRD. Which already passes. 2017-07-26 18:56:35 -04:00
Thomas Harte
6ec4e4e3d7 Merge branch 'master' into Memptr 2017-07-25 23:01:34 -04:00
Thomas Harte
37ccb9d3b6 Fixed 6502 timing tests. 2017-07-25 23:00:39 -04:00
Thomas Harte
3c254360ba Completed fixture of the 6502 BCD test. 2017-07-25 22:55:45 -04:00
Thomas Harte
3ca51bedc6 Discovered legitimate uses of the jam opcode so reinstated it. Corrected illegitimate uses. 2017-07-25 22:48:44 -04:00
Thomas Harte
36076b7ea5 Eliminated final vestige of professed jam handling. This should make it clear which tests still think they can capture jams. 2017-07-25 22:38:26 -04:00
Thomas Harte
df4732be2e Corrected test. 2017-07-24 22:33:49 -04:00
Thomas Harte
9435c1e12a The 1540 is now a ClockReceiver. 2017-07-24 22:32:41 -04:00
Thomas Harte
2912d7055b The 6532 is now a ClockReceiver. 2017-07-24 21:57:24 -04:00
Thomas Harte
13f7aa4063 The TIA is now a ClockReceiver. 2017-07-24 21:48:34 -04:00
Thomas Harte
b3ae920746 Converted the DPLL and disk controller classes to be ClockReceivers. 2017-07-24 21:04:47 -04:00