6502/CLK
1
0
Fork 0
mirror of https://github.com/TomHarte/CLK.git synced 2024-11-30 04:50:08 +00:00
Code Issues Projects Releases Wiki Activity
6,953 Commits 8 Branches 121 Tags 497 MiB
cc5ec78156
Commit Graph

6953 Commits

This Branch
This Branch
All Branches
Author SHA1 Message Date
Thomas Harte
7479dc74ed Removes printf. It's no longer telling me anything. 2020-10-12 21:52:58 -04:00
Thomas Harte
28da1a724a Introduces Jeek816 test case. 2020-10-12 21:43:44 -04:00
Thomas Harte
f529eadbec Corrects 16-bit read-modify-write. 
Subject to the TODO proviso on 'correct'; has my 6502 prejudice pushed me into unrealistic bus signalling?
 2020-10-12 18:36:09 -04:00
Thomas Harte
5dc3cd3a2f Starts using Jeek816 for a basic native-mode audit. Fixes absolute long addressing. 2020-10-11 22:02:46 -04:00
Thomas Harte
3039a445f0 Ups the 65816 test machine to a full 16mb RAM. 2020-10-11 21:18:01 -04:00
Thomas Harte
82797fd395 Attempts to do the proper thing for interrupts. 2020-10-11 21:10:44 -04:00
Thomas Harte
a0885ab7d0 Implements STP and WAI. 
Albeit still without fully-implemented reactions to exceptions in general.
 2020-10-11 17:56:55 -04:00
Thomas Harte
8eaf1303a3 Attempts proactively to ensure proper RTI behaviour on the 65816. 2020-10-11 15:25:13 -04:00
Thomas Harte
20cbe72985 Ties to 8- or 16-bit those instructions that aren't M/X-dependent. 
This is technically redundant for PEI, PEA and PER since they have dedicated bus programs anyway, but it's good to be explicit.
 2020-10-11 14:38:35 -04:00
Thomas Harte
071ad6b767 I don't think RTL is needed; JML looks like it covers it. 2020-10-10 22:16:35 -04:00
Thomas Harte
0619e49eac Takes a short at TSB and TRB. 
Three to go.
 2020-10-10 22:00:17 -04:00
Thomas Harte
b8848d8580 Implements TCD, TDC, TCS, TSC. 2020-10-10 21:43:05 -04:00
Thomas Harte
aface1f8be Implements XBA and XCE. 2020-10-10 21:34:22 -04:00
Thomas Harte
ae87728770 Ensures M and X are exposed to the public interface. 2020-10-10 21:33:56 -04:00
Thomas Harte
28c8ba70c1 Implements REP and SEP and exposes the MX flags generally. 2020-10-10 21:23:59 -04:00
Thomas Harte
486324ecab This test isn't actually 65816-compatible. 2020-10-10 18:19:48 -04:00
Thomas Harte
6892ac13e8 Corrects BIT. All 65816-applicable Wolfgang Lorenz tests now pass. 2020-10-10 17:47:33 -04:00
Thomas Harte
340ad093a6 Adds 65816 runs of the final tranche of applicable tests. 2020-10-10 17:26:41 -04:00
Thomas Harte
0fe09cd1e4 Knocks SBC into producing likely results; disables Lorenz testing. 2020-10-10 17:13:16 -04:00
Thomas Harte
da4702851f Fixes ADC. 2020-10-10 16:29:48 -04:00
Thomas Harte
09fba72d58 Adds flag manipulation, ADC and SBC 65816 tests. 
The latter two fail.
 2020-10-10 11:30:15 -04:00
Thomas Harte
d17c90edf7 Corrects ROL d, x. 2020-10-10 11:25:14 -04:00
Thomas Harte
7966592fae Corrects ROL d. 2020-10-10 11:22:23 -04:00
Thomas Harte
6efe4e1753 Fixes AND, EOR, ORA. Takes an unsuccessful shot at ROL. 2020-10-10 10:53:17 -04:00
Thomas Harte
536c4d45c1 Adds additional 65816 tests, some failing; seeks to improve carry behaviour in ASL and ROL. 2020-10-10 10:11:57 -04:00
Thomas Harte
a02f88fe7c Confirms a couple more of the easy sets. 2020-10-10 09:34:29 -04:00
Thomas Harte
d9be6ab806 Confirms that a few other simple tests work immediately on the 65816. 2020-10-09 23:26:35 -04:00
Thomas Harte
290598429a Applies indirect page zero emulation mode addressing constraint to ix addressing. 
Lorenz's LDA tests now pass in emulation mode.
 2020-10-09 23:22:48 -04:00
Thomas Harte
92e72959c3 Makes corrections to ix addressing mode and shift/roll flags. 2020-10-09 23:12:20 -04:00
Thomas Harte
776f014dbe Attempts LDA tests against the 65816. 
Result: ix is faulty. Which we already knew.
 2020-10-09 22:23:54 -04:00
Thomas Harte
c01bc784b9 Slightly reduces branching. 2020-10-09 22:21:55 -04:00
Thomas Harte
abcd86a294 Fixes accumulator instructions. 2020-10-09 22:18:22 -04:00
Thomas Harte
451f83ba51 Corrects emulation-mode read-modify-writes not to empty the data buffer. 2020-10-09 22:14:42 -04:00
Thomas Harte
b439f40fe2 Corrects INC and DEC. 2020-10-09 22:04:25 -04:00
Thomas Harte
968166b06d Resolves incorrectly flow after setting up an absolute address. 2020-10-09 21:48:35 -04:00
Thomas Harte
88293909f4 Enables running of a first test on the 65816. 2020-10-09 21:44:47 -04:00
Thomas Harte
9b6c48631d Removes usage of a JAM instruction to spot end-of-tests. 2020-10-09 21:39:34 -04:00
Thomas Harte
0ed98cbfac Attempts to fix direct indirect indexed; not yet successful I think. 2020-10-08 22:15:19 -04:00
Thomas Harte
7dde7cc743 Implements altered direct indexed addressing in emulation mode. 2020-10-08 22:02:14 -04:00
Thomas Harte
755627f12d Corrects direct addressing. 2020-10-08 20:00:01 -04:00
Thomas Harte
f8004d7096 Implements RTI, corrects TAY. 2020-10-08 18:06:11 -04:00
Thomas Harte
0418f51ef2 Takes a shot at emulation-mode 'exceptions'. 
It's just RTI and correct decimal SBC left of the official 6502s now, I think.
 2020-10-08 17:52:13 -04:00
Thomas Harte
054e0af071 Corrects RTS behaviour: the return address on the stack is off by one. 
Dormann's tests now proceed to a BRK.
 2020-10-08 16:55:45 -04:00
Thomas Harte
907c3374c3 Attempts to clean up my JMP/JSR mess. 
Also takes a step forwards in decimal SBC, but it's not right yet.
 2020-10-08 16:48:46 -04:00
Thomas Harte
b578240993 Adds a further error. 
Clearly I've severely overloaded 'JMP' and not fully thought through where it gets its addresses from.
 2020-10-07 21:47:58 -04:00
Thomas Harte
f83ee97439 PHP pushes with the BRK flag set in emulation mode. 2020-10-07 21:37:50 -04:00
Thomas Harte
19aea85184 Corrects CMP, CPX, CPY carry flags. 2020-10-07 21:23:29 -04:00
Thomas Harte
1ba0a117e7 Corrects PLB, PLD, PLP. 2020-10-07 20:23:53 -04:00
Thomas Harte
b510b9d337 Adds PHD, PHK and 8-bit PHP and PLP. 2020-10-07 20:13:12 -04:00
Thomas Harte
b608e11965 Realises that not all non-incrementing PC fetches should be thrown away. 2020-10-07 20:06:27 -04:00