Thomas Harte
d326886852
Completes BSET tests.
2019-06-24 14:04:08 -04:00
Thomas Harte
faef917cbd
Improves resizeable microcycle test.
2019-06-24 10:55:22 -04:00
Thomas Harte
d27ba90c07
Attempts to introduce more rigour to variable-length instruction handling.
2019-06-24 10:43:28 -04:00
Thomas Harte
db4ca746e3
Introduces BSET tests, fixes BSET timing.
2019-06-23 22:53:37 -04:00
Thomas Harte
d50fbfb506
Imports EXG and PEA tests, and fixes EXG timing.
2019-06-23 22:21:25 -04:00
Thomas Harte
5d283a9f1f
Imports LEA tests.
2019-06-23 21:48:47 -04:00
Thomas Harte
86fdc75feb
Incorporates RTR test, adding a ProcessorState helper.
2019-06-23 18:37:32 -04:00
Thomas Harte
b63231523a
Completes import of ROL tests.
2019-06-23 17:33:12 -04:00
Thomas Harte
70e296674d
Starts import of ROL tests.
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Including time tests, this time.
2019-06-22 22:42:57 -04:00
Thomas Harte
5089fcd2f6
Makes a slightly futile attempt to resolve Heisen-failures.
2019-06-22 18:52:06 -04:00
Thomas Harte
df2ce8ca6f
Imports MOVE tests.
2019-06-21 22:03:27 -04:00
Thomas Harte
7e209353bb
Imports UNLINK and NOP tests.
2019-06-21 21:29:02 -04:00
Thomas Harte
c2806a94e2
Imports further MOVEM tests.
2019-06-21 21:20:13 -04:00
Thomas Harte
d428120776
Completes import of LINK tests.
2019-06-21 18:33:44 -04:00
Thomas Harte
6b996ae57d
Improves test machine and incorporates a first test of LINK.
2019-06-21 18:20:13 -04:00
Thomas Harte
ccfe1b13cb
Imports DIVS, MULS and MOVE from SR tests.
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Not all passing.
2019-06-21 16:03:11 -04:00
Thomas Harte
0c1c10bc66
Introduces a test that proves that DIVS' attempt to set proper timing isn't working.
2019-06-20 19:29:02 -04:00
Thomas Harte
fafd1801fe
Introduces first DIVS test, and associated fixes.
2019-06-20 19:02:03 -04:00
Thomas Harte
bcf6f665b8
Simplifies and completes DBcc tests.
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Subject to omitting a few that look to me like duplicates.
2019-06-20 17:19:25 -04:00
Thomas Harte
bd069490b5
Incorporates approximately half of the DBcc tests.
2019-06-20 16:29:32 -04:00
Thomas Harte
624b0b6372
Adds Scc tests. No implementation fixes required.
2019-06-19 21:42:54 -04:00
Thomas Harte
7976cf5b3c
Adds ADDA tests. All passing without 68000 changes.
2019-06-19 21:31:14 -04:00
Thomas Harte
440f52c943
Incorporates TRAP test.
2019-06-19 21:18:30 -04:00
Thomas Harte
47b1218a68
Adds a couple of the one-shots: SWAP, MOVE USP.
2019-06-19 19:10:36 -04:00
Thomas Harte
91ced056d2
Adds tests for ADD. No failures.
2019-06-19 18:56:21 -04:00
Thomas Harte
8dace34e63
Imports third-party tests for ABCD, and thereby fixes ABCD.
2019-06-19 18:13:06 -04:00
Thomas Harte
b98f10cb45
Substitutes working GCR test.
2019-06-18 14:24:55 -04:00
Thomas Harte
df56e6fe53
Fixed: the sector number also goes into sector bodies.
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Also the checksum is written in the other order, and the final byte of data isn't output.
2019-06-18 10:34:10 -04:00
Thomas Harte
5c8aacdc17
Fixes the more obvious issues with GCR encoding: byte order, top bit selection.
2019-06-16 17:17:24 -04:00
Thomas Harte
745a5ab749
Introduces failing test of Macintosh GCR data encoding.
2019-06-16 16:53:03 -04:00
Thomas Harte
fe0dc4df88
Starts building out some tests for Apple GCR encoding.
2019-06-15 22:48:24 -04:00
Thomas Harte
5e2496d59c
Simplifies and corrects MOVE logic.
2019-05-28 15:17:03 -04:00
Thomas Harte
c52da9d802
Adds some logging preparatory to a MOVE change.
2019-05-28 15:05:42 -04:00
Thomas Harte
4f9f73ca81
Corrects tests affected by change in run_for_instructions semantics and new program base address.
2019-05-03 15:05:14 -04:00
Thomas Harte
93616a4903
Completes test of a vectored interrupt.
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Correcting issues uncovered.
2019-05-02 00:00:09 -04:00
Thomas Harte
bb07206c55
Corrects internet response to work as currently implemented.
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Also makes corrections to the bus error and address error exceptions.
2019-05-01 21:59:06 -04:00
Thomas Harte
e430f2658f
Adds a test and by that means fixes divide-by-zero exception return addresses.
2019-04-29 23:09:50 -04:00
Thomas Harte
7332c64964
Improves testing of function as distinct from timing.
2019-04-29 22:08:37 -04:00
Thomas Harte
d6e16d0042
Adds a test of TOS 1.00, as far as it goes without meaningful hardware.
2019-04-29 18:04:57 -04:00
Thomas Harte
8e02d29ae6
Trims test to length of trace capture.
2019-04-29 17:56:49 -04:00
Thomas Harte
c0e9c37cc7
Improves memory map model, as far as it goes.
2019-04-29 17:27:44 -04:00
Thomas Harte
5b5bfc8445
Applies trace testing to EmuTOS.
2019-04-29 16:55:21 -04:00
Thomas Harte
c466b6f9e7
Factors out the [unit testing] stuff of being a trace-checking 68000 bus handler.
2019-04-29 16:11:01 -04:00
Thomas Harte
407643c575
Tweaks test length slightly to ensure this doesn't run beyond the final line's end.
2019-04-29 15:40:17 -04:00
Thomas Harte
d9071ee9f1
Starts sketching out the asynchronous bus.
2019-04-29 13:45:53 -04:00
Thomas Harte
d9278e9827
Attempts to complete the list of things I can't disassemble.
...
Mysteries to be solved here, definitely. But: 13 missing opcodes remaining.
2019-04-28 23:11:49 -04:00
Thomas Harte
0298b1b3b7
Implements LINK and UNLINK.
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Also starts excluding opcodes that I can't determine the mapping of from the list of those tested against.
Due to those two things together, the latter incomplete: 627 opcodes outstanding. But only STOP and MOVEP remain on my list of things to implement prior to exceptions.
2019-04-28 17:12:31 -04:00
Thomas Harte
cf547ef569
Improves semantic communications and temporarily omits A- and F-line instructions.
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So it looks like 2773 instructions left to go.
2019-04-27 15:15:03 -04:00
Thomas Harte
40f68b70c1
Adds quantification of reports.
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Depressingly; 11,841 opcodes are still missing. Better get on with it!
2019-04-26 13:25:34 -04:00
Thomas Harte
a3b6d2d16e
Corrects test and resolves all instances of opcodes that are valid but shouldn't be.
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The converse case will require implementation of the remaining instructions.
2019-04-25 22:54:58 -04:00
