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Author SHA1 Message Date
Thomas Harte
d791facc87
Update README.md 
Promoted my estimation of the Apple IIs.
 2018-09-10 17:57:40 -04:00
Thomas Harte
21a9bd927a
Merge pull request #545 from TomHarte/LeftBorder 
Adds a left gutter to complement the right.
 2018-09-09 21:53:25 -04:00
Thomas Harte
d73d3b4480 Adds a left border to complement the right. 2018-09-09 21:52:48 -04:00
Thomas Harte
7b9c1bb69c Makes minor layout improvements. 2018-09-09 21:02:31 -04:00
Thomas Harte
224b3163f2
Merge pull request #544 from TomHarte/MSXColours 
Corrects composition-time over-saturation.
 2018-09-09 20:39:13 -04:00
Thomas Harte
fc84ae611e Resolves various instances of spaces in place of tabs. 2018-09-09 20:33:56 -04:00
Thomas Harte
22a52bdca2 Merge branch 'master' into MSXColours 2018-09-09 20:31:24 -04:00
Thomas Harte
6e9cd5cb21 Resolves over-brightness created by over-composition. 2018-09-09 20:30:43 -04:00
Thomas Harte
c73445199c Eliminates a couple of instances of manual memory management. 2018-09-09 20:29:58 -04:00
Thomas Harte
ab02f82470
Merge pull request #543 from TomHarte/CFBundleTypeOSTypes 
Removes `LSItemContentTypes` so as not to reject files.
 2018-09-09 17:49:16 -04:00
Thomas Harte
1e3318816c Removes LSItemContentTypes so as not to reject files. 2018-09-09 17:47:03 -04:00
Thomas Harte
4c8781c762 Increases documentation slightly. 2018-09-09 17:17:38 -04:00
Thomas Harte
3a3dec92c7
Merge pull request #540 from MaddTheSane/plistFix 
Remove LSItemContentTypes
 2018-09-09 10:07:19 -04:00
Thomas Harte
5a5fc1ae1a
Merge pull request #541 from TomHarte/Annunciator3 
Implements the two undocumented annunciator 3 graphics modes
 2018-09-09 10:06:52 -04:00
Thomas Harte
8d79a1e381 Corrected fat low-res implementation. 
As per comment of awanderin that "the odd addresses don't get their pixels auto-shifted by the hardware as with normal lo-res".
 2018-09-09 10:06:21 -04:00
Thomas Harte
d70f5da94e Attempts an implementation of the undocumented low res + annunciator 3 graphics mode. 2018-09-08 20:51:15 -04:00
C.W. Betts
05d4274019 Remove LSItemContentTypes: they should be unique identifiers, not generic types like public.item or public.data. 
This can result in strange icons showing up in the wrong places.

Also added a category type.
 2018-09-07 16:39:52 -06:00
Thomas Harte
afeec09902 Gets explicit about DHIRES being annunciator 3; implements four-colour high res mode. 2018-09-06 23:23:19 -04:00
Thomas Harte
0526ac2ee2 Slightly increases const correctness. 
The converters from source data to output pixels do not modify the source data. It's a shame there's no `restrict` in C++.
 2018-09-05 11:36:40 -04:00
Thomas Harte
6725ee2190
Merge pull request #539 from TomHarte/40ColumnTextCorruption 
Corrects 40-column alternative text mode corruption
 2018-09-05 10:27:09 -04:00
Thomas Harte
8b661fb90f Introduces an extra level of indirection for text mapping. 2018-09-05 10:26:08 -04:00
Thomas Harte
dab7d3db1b Merge branch 'master' into 40ColumnTextCorruption 2018-08-30 20:24:47 -04:00
Thomas Harte
1cba3d48d9
Merge pull request #538 from TomHarte/AppleDecodingAgain 
Correction: 0xc011 et al get the keyboard value in bits 0 to 6...
 2018-08-30 20:19:48 -04:00
Thomas Harte
d53b38ec7e Correction: 0xc011 et al get the keyboard value in bits 0 to 6 and the switch value in bit 7. 2018-08-30 20:18:36 -04:00
Thomas Harte
5d0f47eda2
Merge pull request #536 from TomHarte/AppleDecoding 
Adds mirrors for keyboard input and the audio toggle.
 2018-08-27 21:14:48 -04:00
Thomas Harte
2e04c4442c Adds mirrors for keyboard input and the audio toggle. 2018-08-27 21:14:21 -04:00
Thomas Harte
f639cdc8ad
Merge pull request #535 from TomHarte/DSKFixes 
Corrects Apple DSK track length, inter-track skew, and Pro-DOS volume number.
 2018-08-27 21:07:11 -04:00
Thomas Harte
71ec7624ca Corrects Apple DSK track length, inter-track skew, and Pro-DOS volume number. 2018-08-27 20:56:25 -04:00
Thomas Harte
0599d9602e Ensures no out-of-bounds accesses to inverses on a IIe. 2018-08-26 23:02:31 -04:00
Thomas Harte
234bef2a88 Adds default to make it explicit that fetch_address is initialised. 2018-08-24 22:26:03 -04:00
Thomas Harte
adb574e1cd
Merge pull request #529 from TomHarte/AppleDelay 
Corrects Apple II video defects
 2018-08-24 22:11:41 -04:00
Thomas Harte
1f491e764e Nudges visible area slightly to the right. 2018-08-24 22:08:11 -04:00
Thomas Harte
114a43a662 Corrects improper indexing for byte shift. 2018-08-24 21:58:43 -04:00
Thomas Harte
5547c39c91 Corrects documentation. 2018-08-24 20:06:40 -04:00
Thomas Harte
97a89aaf4d Factors out the stuff of deferred action interleaving, as I suspect it'll come in handy. 2018-08-24 20:04:26 -04:00
Thomas Harte
61e46399dc About face! There should be no delay on serialisation, but a delay on interpretation-affecting soft switches. 2018-08-22 21:56:45 -04:00
Thomas Harte
e802f6ecc2 Rearranges draw loop around a fixed-size 568-sample line buffer. 2018-08-19 22:31:04 -04:00
Thomas Harte
4209f0e044 Moves memory collection into a separate loop. 2018-08-18 21:54:24 -04:00
Thomas Harte
33576aa2c4 Uses const to ensure output_* are properly constrained. 2018-08-18 21:36:48 -04:00
Thomas Harte
17bf1a64bf Moves the stuff of generating pixels out of the main loop. 2018-08-18 18:44:31 -04:00
Thomas Harte
f8d46f8f3d Merge branch 'master' into AppleDelay 2018-08-18 14:11:21 -04:00
Thomas Harte
8787d85e64 Eliminates #undefs as being (i) unnecessary, now this is a source file; and (ii) incomplete in any case. 2018-08-17 22:24:42 -04:00
Thomas Harte
7f0f17f435
Merge pull request #523 from TomHarte/Further65C02 
Further corrects 65C02 behaviour
 2018-08-17 21:58:38 -04:00
Thomas Harte
0e7f54f375 Implements STP and WAI, and ensures all unimplemented 65C02 instructions are NOP for all 65C02s. 2018-08-17 21:49:06 -04:00
Thomas Harte
b3bdfa9f46 Corrected: it's three-cycle 65C02 branches that ignore interrupts, not two. 2018-08-16 20:47:49 -04:00
Thomas Harte
592ec69d36 Causes the 65C02 not to accept interrupts immediately after untaken branches. 2018-08-15 22:42:04 -04:00
Thomas Harte
60e00ddd02 Correction: the test for not skipping an operand fetch requires a 65C02. 2018-08-15 22:07:17 -04:00
Thomas Harte
6806193dc2 Ensures that "Read/Modify/Write instructions absolute indexed in same page" take only six cycles on a 65C02. 2018-08-15 19:17:37 -04:00
Thomas Harte
c35dca783f Ensures that page-crossing indexing no longer causes an extra read of an invalid address on the 65C02. 
It rereads the last byte of the instruction stream instead.
 2018-08-15 18:47:53 -04:00
Thomas Harte
901e0d65b9 Documents all 6502 micro-operations. 
Also makes sure 1-cycle NOPs really, definitely are one cycle only on a 65C02 and eliminates OperationCopyOperandFromA as a redundant copy of OperationSTA.
 2018-08-14 22:17:53 -04:00