22 Commits

Author	SHA1	Message	Date
Thomas Harte	fdef8901ab	Double down on uint32_t.	2024-03-08 14:13:34 -05:00
Thomas Harte	a46ec4cffb	Up clock rate to 24Mhz.	2024-03-07 22:16:58 -05:00
Thomas Harte	9bb5dc3c2b	Fix inclusive range.	2024-03-07 19:40:34 -05:00
Thomas Harte	f6ea442606	Include various debugging detritus.	2024-03-07 14:28:39 -05:00
Thomas Harte	15ee84b2eb	Fix MUL ambiguity.	2024-03-07 11:45:39 -05:00
Thomas Harte	d380cecdb7	Add timers that count.	2024-03-07 11:39:26 -05:00
Thomas Harte	ae3cd924e8	Add a 2Mhz tick for timers.	2024-03-07 11:12:40 -05:00
Thomas Harte	a0f0f73bde	Fix MOV as unconditional branch.	2024-03-07 10:31:26 -05:00
Thomas Harte	7cdceb7b4f	Add a specific shout-out on prefetch abort, for debugging.	2024-03-07 10:23:46 -05:00
Thomas Harte	38b5624639	Add a little more VIDC detail.	2024-03-07 10:05:22 -05:00
Thomas Harte	3405b3b287	Add power-on bit, moving problems forward.	2024-03-06 22:14:56 -05:00
Thomas Harte	173fc9329a	Add a little protection logic.	2024-03-06 22:00:34 -05:00
Thomas Harte	691a42d81e	Attempt some logical mapping.	2024-03-06 21:51:19 -05:00
Thomas Harte	4059905f85	Slightly reorder messaging.	2024-03-06 16:45:17 -05:00
Thomas Harte	bbb520fd12	Transcribe some notes.	2024-03-06 15:31:07 -05:00
Thomas Harte	108a056f1c	Execution now runs into a prefetch abort loop.	2024-03-06 15:05:24 -05:00
Thomas Harte	ed92e98ca2	Start looking at address translation.	2024-03-06 14:56:06 -05:00
Thomas Harte	0d666f9935	Get a bit more rigorous about reporting.	2024-03-06 09:54:39 -05:00
Thomas Harte	387791635e	Start to establish a memory map.	2024-03-04 21:43:06 -05:00
Thomas Harte	b7a1363add	Add an incorrect execution loop.	2024-03-04 21:09:24 -05:00
Thomas Harte	1f43047de8	Loop the ARM executor into the build.	2024-03-04 12:08:46 -05:00
Thomas Harte	6f0ad0ab71	Add an empty Archimedes shell.	2024-03-04 12:06:43 -05:00