a38639d099
Eliminates the concept of an iCoordinate.
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Real-life precision appears not to support the idea of sub-sample pixel storage.
2018-09-12 20:05:39 -04:00
31b048f966
Ensures all bools start in a valid state.
2018-09-10 22:21:03 -04:00
7b9c1bb69c
Makes minor layout improvements.
2018-09-09 21:02:31 -04:00
70c4d6b9b3
Adds a one second delay between controller and drive motor off.
2018-08-03 21:13:18 -04:00
98bb5bd9f1
Ensures flux bits are observable for two cycles rather than one; it should be 1us.
2018-07-31 23:01:11 -04:00
92065813ef
Ensures only the first 8px of sprites is output in 8x8 mode.
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Also adds a little extra documentation.
2018-07-15 22:21:29 -04:00
cd464fc7de
Corrects status logging.
2018-06-26 20:53:08 -04:00
df8c896193
Removes unused state and implements AND output readback.
2018-06-26 19:31:16 -04:00
59f8eeb05a
Ensures the AY goes high impedance when not in read mode.
2018-06-25 20:48:24 -04:00
5ab4cfee84
Factors out repeated hex-size setting.
2018-06-21 19:27:54 -04:00
a9eb0d02c6
Returns sanity to 8272 logging.
2018-06-20 23:02:32 -04:00
adca862166
Finally makes an initial pass at logging macros.
2018-06-18 22:37:19 -04:00
dde9b73a22
Creates the through-path that will be necessary for RWTS acceleration.
2018-06-09 12:51:53 -04:00
076fa55651
Corrects: flux set is no-flux incoming.
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This restores good sleeping behaviour.
2018-06-03 08:11:17 -04:00
1a9cea050e
Minor: ensure AY registers *read* as 0 from reset, as well as being 0.
2018-06-01 19:48:42 -04:00
35e84ff1a8
Corrects NTSC quadrature phase.
2018-05-31 21:40:46 -04:00
75f9e3caeb
Resolves incorrect bracketing.
2018-05-28 17:48:35 -04:00
928aab13dc
Introduces more granular clocking announcements to the Disk II.
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As well as making it accept the clock rate it'll actually receive, to supply to the drives, so that they spin at the proper speed.
2018-05-28 17:19:29 -04:00
db8d8d8404
Commutes Sleeper to ClockingHint::Source, making state more granular.
2018-05-27 23:17:06 -04:00
086b801c29
Mildly rearranges to avoid unnecessary call.
2018-05-22 21:50:07 -04:00
e482929da8
Enhances the Disk II's ability to sleep.
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Also enables Disk II sleep observation in the Oric.
2018-05-19 23:15:28 -04:00
ed06533e60
Implements write support out of the Disk II.
2018-05-18 22:07:58 -04:00
7b7beb13a3
Eliminates the fiction of setting and getting registers.
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The Disk II seems lower level than that; it will read the data bus whenever it likes, it is the programmer's responsibility to keep up with that. It also reserves the right not to load the bus regardless of whether it receives a read or write access.
2018-05-17 21:39:11 -04:00
c46007332a
Switches to returning the shift register contents on every even read.
2018-05-17 20:18:34 -04:00
908d3b0ee5
Slightly wrong as to the details, but gets the controller trying to output.
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At an initial look, I think the shift register should end up on the data bus for all odd accesses. Need to investigate more thoroughly.
2018-05-16 22:37:22 -04:00
8a031b1137
Eliminates 'data' register as it doesn't exist; rejigs state machine command set.
2018-05-16 22:09:59 -04:00
1aba9f807e
Ensures proper upward propagation of sleeping from first start.
2018-05-16 22:07:54 -04:00
4c49963988
Switches to proper handling of the motor control and write protection.
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Per Understanding the Apple II the drive looks write protected while phase 1 is enabled.
2018-05-16 21:44:09 -04:00
ad9b0cd4e3
Eliminates all endashes.
2018-05-13 15:43:03 -04:00
5d6b5d9f10
Eliminates all emdashes in cross-platform code.
2018-05-13 15:34:31 -04:00
0b771ce61a
Removes all instances of the copyright symbol.
2018-05-13 15:19:52 -04:00
d703328114
Adds missing #include for memcpy.
2018-05-12 17:54:13 -04:00
bc464e247f
The 1540 and, by extension, the Vic-20 are now activity sources.
2018-05-11 22:24:33 -04:00
a43ca0db35
Makes the Apple II an activity source.
2018-05-10 22:17:13 -04:00
c3144382c5
Shuffles the Disk II ROM at load time into B.A.P. form.
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Only if required. In order to support various potential forms of supplied ROM.
2018-05-09 22:03:59 -04:00
c3a2f7717b
Makes attempt to implement support for the Pravetz 8D + 8DOS.
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i.e. the Disk II wired up to the Oric, with some ROM swaps.
2018-05-08 22:05:43 -04:00
f65c65569a
Makes disk head position explicitly something with sub-integral precision.
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Also as a drive-by fix, corrects accidental assumption of 10 sectors for all MFMSectorDump descendants.
2018-05-06 23:17:36 -04:00
aacf26f05d
Removed logged comment.
2018-04-30 22:03:09 -04:00
10c0e687f5
Attempts to introduce sleeping for the Disk II.
2018-04-29 17:51:10 -04:00
41075356e2
Makes a first attempt at NIB support.
2018-04-26 22:49:07 -04:00
d59db504a3
Adjusted stepper logic; some disks load now.
2018-04-25 21:59:18 -04:00
4c6dc597f4
Converts Time::get into a template, introduces a via-a-double fallback for the timed event loop.
2018-04-25 19:54:39 -04:00
7061537ff5
Makes joined-up attempt to run data through the Disk II.
2018-04-24 19:44:45 -07:00
99de8f1c5c
Inverts the pulse strobe.
2018-04-24 09:03:03 -07:00
af61bbc3e2
Attempts actual performance of the state machine.
2018-04-24 08:29:05 -07:00
56d88f23ef
Teeters closer and closer to trying actually to run the Disk II state machine.
2018-04-23 22:29:36 -07:00
4bff44377a
Attempts to route Disk II requests to the thing itself.
2018-04-23 22:11:31 -07:00
e87a3cffd4
Merge branch 'master' into DiskII
2018-04-21 15:02:18 -07:00
5968c9a391
Corrects Apple II output audio.
2018-04-21 14:56:50 -07:00
72bc5f8d7b
Adds a class to contain the Disk II and begins Apple GCR conversion routines.
2018-04-21 14:33:42 -07:00
Thomas Harte