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c2890b6d00c28acda0c3fbd0cb23302e8a2249e6
Commit Graph
133 Commits
Author SHA1 Message Date
Adrian Conlon c2890b6d00 Bring z80 implementation closer to .net 2026-02-24 11:39:33 +00:00
Adrian Conlon abcb245655 Synch with .net version of emulator (work-in-progress) 2026-02-23 10:24:49 +00:00
Adrian Conlon abe918e264 Commit in-flight changes. Look reasonable 2025-03-27 20:05:51 +00:00
Adrian Conlon d838ad7946 Sync to the .Net version of the Z80 code 2025-01-28 21:44:22 +00:00
Adrian Conlon b22d7e47e5 Addressing mode simplifications 2024-03-14 14:54:52 +00:00
Adrian Conlon 8e0092ec9d Tidy up noexcept specification 2022-01-17 19:10:15 +00:00
Adrian Conlon 1f5dc54c40 Copy constructor and equality operations added. 2021-12-27 22:07:30 +00:00
Adrian Conlon 945fcefb36 Start adding comparison operations to EightBit classes 2021-12-27 14:24:38 +00:00
Adrian Conlon 22506ea56c Extensive change warning: lots of "noexcept" and "constexpr" changes. Not sure if I'll keep all of them, but interesting... 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-07-18 14:28:40 +01:00
Adrian Conlon 2f76e901f9 More tidying of include files for VS2019 compatibility (plus more correct!) 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-05-29 12:18:13 +01:00
Adrian Conlon 4d2d1d214a Tidy up some C++ code (concentrating on the Z80 at the moment). 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-09 08:41:48 +00:00
Adrian Conlon 26cc613c66 Add a slightly simplified variant on signal firing. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-08 09:06:46 +00:00
Adrian Conlon 6261807344 More C++17 tidying up. Should be no user visible changes. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-06 15:30:26 +00:00
Adrian Conlon 4ec462e79a Z80: Tidy the M1 activation sequence a little (start moving towards ZX Spectrum memory contention model) 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2021-01-02 11:04:38 +00:00
Adrian Conlon 778aacaef6 Z80: Better interrupt timing response. 2020-12-27 15:45:14 +00:00
Adrian Conlon 28ae32b8a2 Z80: Whoops: Correct broken CPDR implementation. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-11-16 17:09:19 +00:00
Adrian Conlon f7da03d46b Bring the LR35902 code to be more like the Z80 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-11-09 11:48:59 +00:00
Adrian Conlon 17edcee715 Add a pin activator class to correctly handle "wrapped" pin transitions. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-05-03 20:45:01 +01:00
Adrian Conlon dcb809d8f9 Add finer control of memory and IO events in the Z80 implementation. Allows small tidy of the halt condition. 
Signed-off-by: Adrian Conlon <adrian.conlon@gmail.com>
 2020-03-23 21:56:23 +00:00
Adrian Conlon 99f0712801 Simplify Z80 instruction timing a little. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-23 09:37:03 +00:00
Adrian Conlon e6b26e631c Fix more Z80 instruction timings. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-22 08:32:29 +00:00
Adrian Conlon b89d2cf15c Start correcting Z80 T-cycle counts (DJNZ, JR cc, ADD HL,rp, INC/DEC rp, INC/DEC (HL)) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-16 09:18:34 +00:00
Adrian Conlon c8bdabf34f Reflect that the I/O for Intel style processors isn't part of the CPU, but attached to the Bus and access controlled by the CPU. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2020-02-09 11:51:58 +00:00
Adrian Conlon dc37d61797 Tidy up some shared code for the Z80 pushWord vs call timing. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 13:03:44 +00:00
Adrian Conlon d9466082ec M-Cycle accurate Z80 modifications. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-12-29 01:18:54 +00:00
Adrian Conlon 98d9199f19 Whoops: missed power on state of the "RFRSH" pin. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-19 23:06:08 +00:00
Adrian Conlon acf6cf6c71 Sync with .Net version 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-16 23:37:57 +00:00
Adrian Conlon 5e347b9414 Sync C++ Z80 implementation with C# 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-10 11:15:07 +00:00
Adrian Conlon d0467421ff Improve compatibility with .net emulator code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-09 18:58:23 +00:00
Adrian Conlon 20ebbd4048 Start added more .net compatibility methods 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-03 09:23:28 +00:00
Adrian Conlon 6d90ea6237 Add MREQ (to go along with IORQ) to the Z80 implementation. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:38:20 +00:00
Adrian Conlon 238ee30b3c Correct a couple of small Z80 power on issues. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-11-02 17:30:03 +00:00
Adrian Conlon 1ba238bfc7 Add support for RD and WR lines to the Z80 emulator. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-15 01:35:57 +01:00
Adrian Conlon 6d6c95f695 Fix up INT and NMI pin (M1 and IORQ) response a little (still working on ZX81 emulator!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-14 23:38:47 +01:00
Adrian Conlon 4be4a0603e Refactor the Z80 implementation to: 
a) Simplify M1 handling
b) Reuse subtract/add implementations
c) Simplify conditional code blocks.

Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-14 15:04:46 +01:00
Adrian Conlon 74f70af758 Correct more Z80 disassembler problems (the ZX81 seems to use every instruction available!) 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-08 21:27:35 +01:00
Adrian Conlon 3e12ba6200 Sigh: Another Z80 interrupt related bug fix. Avoid a loop when an INT occurs, but interrupts are disabled. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-08 16:28:19 +01:00
Adrian Conlon 254cfbe342 Tidied up pin management to be synchronised with the .Net code. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-09-06 23:55:57 +01:00
Adrian Conlon e1f22f6903 Make it slightly easier to call individual opcodes from external control. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-31 08:45:04 +01:00
Adrian Conlon 4f47f3fc4d Simplifying the Z80 halt implementation looks better. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-29 08:51:15 +01:00
Adrian Conlon 2efd53d33a Correct problematic continuation from "halt" on Z80. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-28 23:06:56 +01:00
Adrian Conlon 5ed01b61d1 Backport fixes from .Net EightBit library to C++ 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-08-16 21:56:48 +01:00
Adrian Conlon 934a1f7025 Use the virtual methods, busRead and busWrite for all processor bus actions. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-03-02 21:58:34 +00:00
Adrian Conlon f0376fa81e Use macros to define our device pins. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 23:17:54 +00:00
Adrian Conlon 92d23d82d6 Start big refactor of device/CPU pin usage (to allow pin events throughout). 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-14 02:10:17 +00:00
Adrian Conlon 68030610d8 Move to an event driven clock tick event for all CPUs 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-09 23:24:33 +00:00
Adrian Conlon a13ad5042a Correct constructions of register16_t: the structure is "#ifdef"ed for different endian arrangements. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2019-01-06 11:27:43 +00:00
Adrian Conlon f38d326ca7 Improve the flexibility of the BUS mapping/read/write architecture. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-29 19:17:36 +00:00
Adrian Conlon cf0828c595 Tidy the Z80 BIT implementation for better code resuse. No functional change 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-12-01 13:01:33 +00:00
Adrian Conlon 9960ad6012 Tidy return parameter usage a little within the EightBit library. 
Signed-off-by: Adrian Conlon <Adrian.conlon@gmail.com>
 2018-11-29 00:09:40 +00:00