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Author	SHA1	Message	Date
Adrian Conlon	c8e69424db	8080 tests speedup	2026-05-25 13:14:20 +01:00
Adrian Conlon	04f798fba9	Bus readonly write tests/changes	2026-05-25 13:13:52 +01:00
Adrian Conlon	932bcfd54e	Some small consistency tidyups.	2026-05-24 22:48:34 +01:00
Adrian Conlon	ec59b422b9	Simplify PC increment/decrement a little	2026-05-21 16:35:20 +01:00
Adrian Conlon	37fc258d47	Some simplifications	2026-05-21 11:57:52 +01:00
Adrian Conlon	291266e4fc	Assert that which needs to be checked, but not thrown	2026-05-21 10:00:57 +01:00
Adrian Conlon	2999db5c5a	Simplify interrupt implementations	2026-05-20 21:31:42 +01:00
Adrian Conlon	8041c04883	Fix ARR: hurrah 2A03 fixed as well	2026-05-20 20:56:40 +01:00
Adrian Conlon	9d8f2ceb81	Add a Ricoh2A03 implmentation + tests. one test failing...	2026-05-20 20:45:25 +01:00
Adrian Conlon	d5f2137f54	Cover WDC65C02 tests as well	2026-05-20 14:15:10 +01:00
Adrian Conlon	5c2095b872	Gameboy single step tests converted to unit tests	2026-05-19 20:23:38 +01:00
Adrian Conlon	d8181f5101	6502 single step tests converted to unit tests	2026-05-19 20:15:10 +01:00
Adrian Conlon	7beef7569b	Move Z80 single step tests to be proper unit tests	2026-05-19 19:37:52 +01:00
Adrian Conlon	67d96d82c9	Simplify some calls	2026-05-19 15:04:09 +01:00
Adrian Conlon	608fbb55fb	Couple of small tidy ups	2026-05-18 20:46:42 +01:00
Adrian Conlon	98169fd6b8	Fix Z80 halt implementation	2026-05-18 20:06:57 +01:00
Adrian Conlon	dfd4d1928f	Make "Pop" more like "Read". i.e. don't return a result, just use the value placed on the "bus"	2026-05-18 18:24:32 +01:00
Adrian Conlon	741feb4342	Performance change: avoid dropping Bus.Data return values	2026-05-18 17:28:41 +01:00
Adrian Conlon	bc39c230d1	Add an extra Z80 interrupt test	2026-05-17 21:31:01 +01:00
Adrian Conlon	e9603b0e08	Add Z80 interrupt and pin tests	2026-05-17 20:48:22 +01:00
Adrian Conlon	1876a0d1f0	Fix IM2 again!	2026-05-17 19:24:55 +01:00
Adrian Conlon	b8e95f52b3	Inline clock ticking mechanism	2026-05-17 10:27:34 +01:00
Adrian Conlon	072a8dd984	Blargg tests run again. Corrected speed issue of MemoryMappings being created too often and bus data being trashed by a write to ROM.	2026-05-17 09:50:12 +01:00
Adrian Conlon	9a011b3c57	Start implementing HD6309. Introduction of 32-bit operations has forced me to rename some of "Word" methods to better indicate size	2026-05-16 21:10:23 +01:00
Adrian Conlon	ab835297fd	Couple of small tidy ups	2026-05-16 13:50:14 +01:00
Adrian Conlon	e0fffdaa5e	Some performance improvements. About 50Mhz for Z80 emulator. 275Mhz to 325Mhz. Interesting.	2026-05-16 11:09:03 +01:00
Adrian Conlon	b5f646c641	Better arrangement of decimal SBC/ADC implementations	2026-05-15 22:50:11 +01:00
Adrian Conlon	6d4d2f22e2	Needs tidying a little by full cycle accuracy for 6502 / 65c02	2026-05-15 22:02:03 +01:00
Adrian Conlon	8f59e79959	Add explicit NOPs to the MOS 6502 implementation	2026-05-14 15:17:41 +01:00
Adrian Conlon	ac200d7f76	Simplify ignored return value handling	2026-05-12 22:21:13 +01:00
Adrian Conlon	a98b904207	Whoops: missed one more test	2026-05-12 22:19:11 +01:00
Adrian Conlon	f1fb442f08	Add 6809 Schwotzer tests	2026-05-12 22:18:51 +01:00
Adrian Conlon	b228332e27	Tidy up old debugging changes	2026-05-12 20:23:42 +01:00
Adrian Conlon	96eaf1b22f	Update interrupt timing	2026-05-12 15:23:45 +01:00
Adrian Conlon	75a07ceea0	Add a little more documentation	2026-05-12 11:45:41 +01:00
Adrian Conlon	83ee80edcf	Make addressing mode handling more consistent on 6502 implementation	2026-05-12 11:44:42 +01:00
Adrian Conlon	d7e3ea0ef3	Use underscored private member variables	2026-05-11 23:07:34 +01:00
Adrian Conlon	fc1ad39a8d	Add half-carry tests	2026-05-11 22:27:30 +01:00
Adrian Conlon	37ed8b4d11	Increment shouldn't affect the half-carry flag	2026-05-11 22:20:10 +01:00
Adrian Conlon	9f62175e06	Enhance "TST" tests	2026-05-11 22:04:39 +01:00
Adrian Conlon	f6ee25c5f9	Fix "TST" implementation	2026-05-11 21:59:13 +01:00
Adrian Conlon	e1470a13fa	Simplify 6809 boolean flag handling	2026-05-11 19:18:11 +01:00
Adrian Conlon	f01762b9de	Fix a small effective address problem	2026-05-11 17:30:38 +01:00
Adrian Conlon	f1c02dd012	Simplify long/short branch	2026-05-11 14:59:06 +01:00
Adrian Conlon	0e48e86edf	Correct LBSR implementation	2026-05-11 14:53:22 +01:00
Adrian Conlon	1dfa94daf2	Small tidy ups	2026-05-11 14:37:54 +01:00
Adrian Conlon	ad97013127	Isolate effecitive address usage away from "intermediate" usage	2026-05-11 13:59:46 +01:00
Adrian Conlon	71d7832e91	Sort out inherent addressing to be a little more consistent	2026-05-11 13:10:56 +01:00
Adrian Conlon	fa61bd4854	Update documentation links, including some wayback machinem for unavailable	2026-05-10 09:57:02 +01:00
Adrian Conlon	5026c27582	Correct performance issue in "board" by fixing uncontrolled MemoryMapping allocations.	2026-05-09 18:23:13 +01:00