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Commit Graph

351 Commits

Author SHA1 Message Date
Bob Andrews ba6f9f5d3f Merge pull request #2381 from colinleroy/asm-fgets
Rewrite fgets in asm
2024-01-26 19:36:57 +01:00
Colin Leroy-Mira f0b5b02966 Swap in LC before destructors, ROM after 2024-01-24 12:28:57 +01:00
Colin Leroy-Mira 1f820d0ae8 Rewrite fgets in asm
-104 bytes, -1% cycles
2024-01-24 10:16:26 +01:00
Colin Leroy-Mira 2ba176372e Add beep for apple2 2024-01-23 23:04:50 +01:00
Colin Leroy-Mira 166a4b25f7 Apple2: implement sleep using MONWAIT
Also publish detect_iigs(), set_iigs_speed() and get_iigs_speed(). Refactor to only store one ostype variable.
2024-01-18 16:17:10 +01:00
Colin Leroy-Mira 75461e1319 Apple2: implement stat(2) and statvfs(3) 2024-01-01 19:12:51 +01:00
Colin Leroy-Mira 1093d169ad Fix BSS obliteration by mliparam during exec().
Using mliparam at this time could lead to corruption at the
start of the new executed program if BSS is real full and
mliparam is over $BB00.
The fix is to open the file from the loader stub instead of doing
it before the C library shutdown.
2023-12-14 16:47:33 +01:00
Colin Leroy-Mira f1b0fbebd5 Remove all indexed accesses to SCC registers
Some IIgs models had issues sending bytes out.
Also make channel tests clearer.
2023-11-24 18:37:43 +01:00
Colin Leroy-Mira 86d498b7b3 Implement SER_HS_NONE on Apple IIgs serial driver 2023-11-10 21:56:43 +01:00
Colin Leroy-Mira fe115fb621 Revert "Apple 2 SSC: Handle SER_HS_NONE with no performance impact"
This reverts commit 0eafb6d1d5.
This was buggy, as we sta Stopped when asserting flow, and this stops
SER_GET.
2023-11-05 11:34:51 +01:00
Colin Leroy-Mira 8a797095c1 Apple 2 SSC: Handle SER_HS_NONE with no performance impact 2023-11-05 11:34:51 +01:00
Colin Leroy-Mira 94239525ca Apple2 SSC: Implement no flow control 2023-11-05 11:34:51 +01:00
Oliver Schmidt 3c864fc7d8 Minimal style adjustment 2023-10-15 17:00:15 +02:00
Colin Leroy-Mira 882f6fd103 Fix ACIA check so we don't enable RX/TX with IRQs on 2023-10-15 16:58:59 +02:00
Colin Leroy-Mira 3107f34ec9 Put back 6551 test as a last verification 2023-10-15 16:58:59 +02:00
Colin Leroy-Mira 6e035c864e Apple2 SSC: on IIgs, verify slot mode
If the slot is not in "Your Card" mode, there's no way it is an SSC
2023-10-15 16:58:59 +02:00
Colin Leroy-Mira 96e893795b Better check for 6551 2023-10-15 16:58:59 +02:00
Colin Leroy-Mira e138403727 Move cli in common out path 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira 6e0bbb00ee Fix logic error on parameters checks 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira c7db08b4e3 Move hardware check to ser_install 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira e90a8f3123 Address code review comments 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira 39d6080945 Do the IIgs check as documented 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira e3759a3ead Spare cycles on IRQ path 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira 65ce3a6792 Don't check firmware at $C200, as we don't use it
Just check that we're on a IIgs instead.
2023-10-14 14:36:09 +02:00
Colin Leroy-Mira 9e87e558d2 Fix register r/w timing 2023-10-14 14:36:09 +02:00
Colin Leroy-Mira 9667a5f991 Re-introduce necessary comments, wit a clearer wording 2023-10-03 18:35:23 +02:00
Colin Leroy-Mira 3c17c13357 Address latest comments 2023-10-03 18:34:22 +02:00
Colin Leroy-Mira 996a2659d5 Address code review comments 2023-10-03 18:34:22 +02:00
Colin Leroy-Mira e16a5e0dbe Add Apple IIgs serial driver 2023-10-03 18:34:22 +02:00
Colin Leroy-Mira 330b1ab3f9 Remove useless comments 2023-10-03 13:55:10 +02:00
Colin Leroy-Mira df4902157a Cleanup coding style a bit 2023-10-03 13:55:10 +02:00
Colin Leroy-Mira 4ff917816e Apple2: Always copy cmdline
Otherwise, the last exec() cmdline lingers around for the next exec("file", NULL).
2023-09-29 10:51:53 +02:00
Colin Leroy-Mira e3bc143f27 Another two bytes saved 2023-09-22 11:51:29 +02:00
Colin Leroy-Mira aa5ee8423a Clearer wording for the firmware check 2023-09-11 08:31:15 +02:00
Colin Leroy-Mira 38f7daf40e Make sure not to load ACIA driver on IIgs' Z8530
The Pascal Firmware Protocol Bytes ID are not enough to differentiate an SSC card from a IIgs serial firmware:
http://www.1000bit.it/support/manuali/apple/technotes/misc/tn.misc.08.html

Loading a2(e).ssc.ser on a IIgs succeeds, then goes to limbo when one tries to use the serial port.

Check first byte on the slot's firmware in addition to the four existing ones, as it's supposed to be $2C (BIT instruction) on an SSC card, and $EF (65C816 SEP instruction) on the IIgs' serial firmware (ROM revisions 0, 1, 3).
2023-09-11 08:31:15 +02:00
Colin Leroy-Mira 734541ee05 Serial: Optimize SER_GET
There is no need to TryToSend before getting the character. We
send bytes during SER_PUT, and if interrupted during sending, we
still try to do it at the beginning of the next SER_PUT.
2023-09-07 07:14:01 +02:00
Colin Leroy-Mira a89a311abf Serial: Micro-optimisation for apple2enh
On 65C02 we can spare one cycle on sta (abs); we also
not have to care about the 6502 false reads
2023-09-07 07:13:59 +02:00
Colin Leroy-Mira e8f5ad2471 Serial: Optimize SER_PUT
We don't need to reload SendFreeCnt if we don't jsr TryToSend.
2023-09-07 07:13:57 +02:00
Colin Leroy-Mira 89af42e5cb Serial: Optimize SER_IRQ
Apple2 and Atmos have Index in X, but can still use it for the
best-case path as long as we reload it in the worst-case part
(when we assert flow control).
Also, standardize the free space to trigger flow control to 32
characters left (compare with RecvFreeCnt before decrement)
2023-09-07 07:13:54 +02:00
Colin Leroy-Mira 3f3b6123b9 Serial: Optimize TryToSend
We don't need to reload SendFreeCnt each time we loop to wait
for the ACIA to be ready.
2023-09-07 07:13:48 +02:00
Colin Leroy-Mira 8a140e6503 Conio: 65c02 optimisations
cputc: -2 cycles per char, -2 cycles per carriage return
cputs: -5 cycles per char, -3 cycles on cputsxy
vcprintf: -6 cycles per char
2023-09-02 12:44:53 +02:00
Colin Leroy-Mira 148be69f97 Optimize and fix comments (thanks to Oliver Schmidt) 2023-08-19 14:11:36 +02:00
Colin Leroy-Mira 1f68846116 Avoid using mli.s to initcwd 2023-08-19 14:11:36 +02:00
mrdudz ffa83c32a4 clean-up of driver return codes 2023-02-26 20:03:41 +01:00
Oliver Schmidt 1daa445310 Fixed recently introduced addressing mode bug. 2022-12-22 22:09:23 +01:00
Oliver Schmidt d90c7e9853 Introduced the notion of a standard serial driver.
There's no target with more than one serial driver (and I don't see that change anytime soon) so it's a no-brainer to apply the standard driver concept to serial drivers.
2022-12-22 18:13:24 +01:00
mrdudz d6c37a757d Merge branch 'master' into underscores 2022-11-19 17:11:11 +01:00
Oliver Schmidt 5493c9e7c2 Don't empty the Receive Data Register on filling the Transmit Data Register
The Receive Data Register and the Transmit Data Register share share a single address. Accessing that address with STA abs,X in order to fill the Transmit Data Register causes a 6502 false read which causes the Receive Data Register to be emptied.

The simplest way to work around that issue - which I chose here - is to move the base address for all ACIA accesses from page $C0 to page $BF. However, that adds an additional cycle to all read accesses. An alternative approach would be to only modify the single line `sta ACIA_DATA,x`.
2022-09-08 17:11:30 +02:00
mrdudz 89c08dc6d4 extra underscores for _randomize and _swap 2022-08-29 20:52:35 +02:00
mrdudz df4b6f9d14 remove extra spaces 2022-08-28 22:37:33 +02:00