2003-09-30 18:37:50 +00:00
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//===-- llvm/Target/TargetMachine.h - Target Information --------*- C++ -*-===//
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2005-04-21 20:59:05 +00:00
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//
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2003-10-20 20:19:47 +00:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 19:59:42 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-21 20:59:05 +00:00
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//
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2003-10-20 20:19:47 +00:00
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//===----------------------------------------------------------------------===//
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2001-09-18 12:38:31 +00:00
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//
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2006-09-04 04:14:57 +00:00
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// This file defines the TargetMachine and LLVMTargetMachine classes.
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2001-09-18 12:38:31 +00:00
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TARGET_TARGETMACHINE_H
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#define LLVM_TARGET_TARGETMACHINE_H
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2005-11-01 20:06:59 +00:00
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#include "llvm/Target/TargetInstrItineraries.h"
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2003-10-20 15:14:33 +00:00
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#include <cassert>
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2009-08-11 20:42:37 +00:00
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#include <string>
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2001-09-18 12:38:31 +00:00
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2003-11-11 22:41:34 +00:00
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namespace llvm {
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2009-07-15 20:24:03 +00:00
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class Target;
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class MCAsmInfo;
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2006-05-12 06:33:49 +00:00
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class TargetData;
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class TargetSubtarget;
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class TargetInstrInfo;
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class TargetIntrinsicInfo;
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class TargetJITInfo;
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2006-03-13 23:17:42 +00:00
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class TargetLowering;
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class TargetSelectionDAGInfo;
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class TargetFrameInfo;
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class JITCodeEmitter;
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class MCContext;
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class TargetRegisterInfo;
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class PassManagerBase;
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2002-04-28 20:40:25 +00:00
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class PassManager;
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class Pass;
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2007-01-27 02:55:04 +00:00
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class TargetELFWriterInfo;
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2009-07-14 20:18:05 +00:00
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class formatted_raw_ostream;
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2001-09-18 12:38:31 +00:00
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2006-02-22 20:19:42 +00:00
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// Relocation model types.
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namespace Reloc {
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enum Model {
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Default,
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Static,
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PIC_, // Cannot be named PIC due to collision with -DPIC
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DynamicNoPIC
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};
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}
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2006-07-06 01:53:36 +00:00
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// Code model types.
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namespace CodeModel {
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enum Model {
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Default,
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Small,
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Kernel,
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Medium,
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Large
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};
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}
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2009-04-29 23:29:43 +00:00
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// Code generation optimization level.
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namespace CodeGenOpt {
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enum Level {
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2009-10-16 21:02:20 +00:00
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None, // -O0
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Less, // -O1
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Default, // -O2, -Os
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Aggressive // -O3
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};
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}
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2010-05-19 20:19:50 +00:00
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namespace Sched {
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enum Preference {
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None, // No preference
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Latency, // Scheduling for shortest total latency.
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RegPressure, // Scheduling for lowest register pressure.
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2010-07-24 00:39:05 +00:00
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Hybrid, // Scheduling for both latency and register pressure.
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ILP // Scheduling for ILP in low register pressure mode.
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2010-05-19 20:19:50 +00:00
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};
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}
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2002-12-28 20:13:29 +00:00
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//===----------------------------------------------------------------------===//
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///
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/// TargetMachine - Primary interface to the complete machine description for
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/// the target machine. All target-specific information should be accessible
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/// through this interface.
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///
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2003-06-03 15:28:40 +00:00
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class TargetMachine {
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TargetMachine(const TargetMachine &); // DO NOT IMPLEMENT
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void operator=(const TargetMachine &); // DO NOT IMPLEMENT
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2006-09-03 18:44:26 +00:00
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protected: // Can only create subclasses.
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TargetMachine(const Target &);
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/// getSubtargetImpl - virtual method implemented by subclasses that returns
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/// a reference to that target's TargetSubtarget-derived member variable.
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virtual const TargetSubtarget *getSubtargetImpl() const { return 0; }
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2009-07-15 20:24:03 +00:00
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/// TheTarget - The Target that this machine was created for.
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const Target &TheTarget;
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2006-09-07 22:06:40 +00:00
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/// AsmInfo - Contains target specific asm information.
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///
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const MCAsmInfo *AsmInfo;
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2010-05-26 21:48:55 +00:00
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unsigned MCRelaxAll : 1;
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2001-09-18 12:38:31 +00:00
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public:
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2003-12-28 21:23:38 +00:00
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virtual ~TargetMachine();
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2009-07-15 20:24:03 +00:00
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const Target &getTarget() const { return TheTarget; }
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2009-07-15 12:11:05 +00:00
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2001-09-18 12:38:31 +00:00
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// Interfaces to the major aspects of target machine information:
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// -- Instruction opcode and operand information
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// -- Pipelines and scheduling information
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2002-09-20 00:52:09 +00:00
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// -- Stack frame information
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2006-03-13 23:17:42 +00:00
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// -- Selection DAG lowering information
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2005-04-21 20:59:05 +00:00
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//
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2004-06-02 05:53:25 +00:00
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virtual const TargetInstrInfo *getInstrInfo() const { return 0; }
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virtual const TargetFrameInfo *getFrameInfo() const { return 0; }
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2010-04-17 15:26:15 +00:00
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virtual const TargetLowering *getTargetLowering() const { return 0; }
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virtual const TargetSelectionDAGInfo *getSelectionDAGInfo() const{ return 0; }
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2006-05-03 01:29:57 +00:00
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virtual const TargetData *getTargetData() const { return 0; }
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2006-09-07 22:06:40 +00:00
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2009-08-22 20:48:53 +00:00
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/// getMCAsmInfo - Return target specific asm information.
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2006-09-07 22:06:40 +00:00
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///
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const MCAsmInfo *getMCAsmInfo() const { return AsmInfo; }
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2006-09-07 22:06:40 +00:00
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2005-07-27 05:53:44 +00:00
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/// getSubtarget - This method returns a pointer to the specified type of
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2005-07-12 03:04:49 +00:00
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/// TargetSubtarget. In debug builds, it verifies that the object being
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/// returned is of the correct type.
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template<typename STC> const STC &getSubtarget() const {
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return *static_cast<const STC*>(getSubtargetImpl());
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}
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2002-10-30 00:53:02 +00:00
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/// getRegisterInfo - If register information is available, return it. If
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2002-12-28 20:13:29 +00:00
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/// not, return null. This is kept separate from RegInfo until RegInfo has
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/// details of graph coloring register allocation removed from it.
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2002-10-30 00:53:02 +00:00
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///
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virtual const TargetRegisterInfo *getRegisterInfo() const { return 0; }
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2009-02-05 01:49:45 +00:00
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/// getIntrinsicInfo - If intrinsic information is available, return it. If
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/// not, return null.
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///
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virtual const TargetIntrinsicInfo *getIntrinsicInfo() const { return 0; }
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2002-10-30 00:53:02 +00:00
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2003-12-20 01:22:19 +00:00
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/// getJITInfo - If this target supports a JIT, return information for it,
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/// otherwise return null.
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///
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virtual TargetJITInfo *getJITInfo() { return 0; }
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2005-11-01 20:06:59 +00:00
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/// getInstrItineraryData - Returns instruction itinerary data for the target
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/// or specific subtarget.
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///
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2010-09-10 01:29:16 +00:00
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virtual const InstrItineraryData *getInstrItineraryData() const {
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return 0;
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2005-11-01 20:06:59 +00:00
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}
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2003-12-20 01:22:19 +00:00
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2007-01-27 02:55:04 +00:00
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/// getELFWriterInfo - If this target supports an ELF writer, return
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/// information for it, otherwise return null.
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///
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virtual const TargetELFWriterInfo *getELFWriterInfo() const { return 0; }
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2010-05-26 21:48:55 +00:00
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/// hasMCRelaxAll - Check whether all machine code instructions should be
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/// relaxed.
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bool hasMCRelaxAll() const { return MCRelaxAll; }
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/// setMCRelaxAll - Set whether all machine code instructions should be
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/// relaxed.
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void setMCRelaxAll(bool Value) { MCRelaxAll = Value; }
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2006-02-22 20:19:42 +00:00
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/// getRelocationModel - Returns the code generation relocation model. The
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/// choices are static, PIC, and dynamic-no-pic, and target default.
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static Reloc::Model getRelocationModel();
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/// setRelocationModel - Sets the code generation relocation model.
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2009-03-25 01:47:28 +00:00
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///
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2006-02-22 20:19:42 +00:00
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static void setRelocationModel(Reloc::Model Model);
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2006-07-06 01:53:36 +00:00
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/// getCodeModel - Returns the code model. The choices are small, kernel,
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/// medium, large, and target default.
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static CodeModel::Model getCodeModel();
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/// setCodeModel - Sets the code model.
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2009-03-25 01:47:28 +00:00
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///
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2006-07-06 01:53:36 +00:00
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static void setCodeModel(CodeModel::Model Model);
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2009-03-25 01:47:28 +00:00
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/// getAsmVerbosityDefault - Returns the default value of asm verbosity.
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///
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static bool getAsmVerbosityDefault();
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/// setAsmVerbosityDefault - Set the default value of asm verbosity. Default
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/// is false.
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static void setAsmVerbosityDefault(bool);
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2010-04-13 00:36:43 +00:00
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/// getDataSections - Return true if data objects should be emitted into their
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/// own section, corresponds to -fdata-sections.
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static bool getDataSections();
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/// getFunctionSections - Return true if functions should be emitted into
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/// their own section, corresponding to -ffunction-sections.
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static bool getFunctionSections();
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/// setDataSections - Set if the data are emit into separate sections.
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static void setDataSections(bool);
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/// setFunctionSections - Set if the functions are emit into separate
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/// sections.
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static void setFunctionSections(bool);
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2005-06-25 02:47:50 +00:00
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/// CodeGenFileType - These enums are meant to be passed into
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2010-02-02 21:06:45 +00:00
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/// addPassesToEmitFile to indicate what type of file to emit, and returned by
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/// it to indicate what type of file could actually be made.
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2005-06-25 02:47:50 +00:00
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enum CodeGenFileType {
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2010-02-02 21:06:45 +00:00
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CGFT_AssemblyFile,
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CGFT_ObjectFile,
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2010-02-03 05:55:08 +00:00
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CGFT_Null // Do not emit any output.
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2005-06-25 02:47:50 +00:00
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};
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2007-05-22 18:31:04 +00:00
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/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
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2007-05-22 17:14:46 +00:00
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/// on this target. User flag overrides.
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2007-11-19 20:46:23 +00:00
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virtual bool getEnableTailMergeDefault() const { return true; }
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2007-05-22 17:14:46 +00:00
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2007-02-08 01:34:45 +00:00
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// specified file emitted. Typically this will involve several steps of code
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2010-02-03 05:55:08 +00:00
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/// generation. This method should return true if emission of this file type
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/// is not supported, or false on success.
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virtual bool addPassesToEmitFile(PassManagerBase &,
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formatted_raw_ostream &,
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2010-02-17 23:55:26 +00:00
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CodeGenFileType,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level,
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2010-03-25 00:59:51 +00:00
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bool = true) {
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2010-02-03 05:55:08 +00:00
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return true;
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2007-02-08 01:34:45 +00:00
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}
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2009-05-30 20:51:52 +00:00
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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2010-02-02 22:31:11 +00:00
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/// get machine code emitted. This uses a JITCodeEmitter object to handle
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2009-05-30 20:51:52 +00:00
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(PassManagerBase &,
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JITCodeEmitter &,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level,
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2010-03-25 00:59:51 +00:00
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bool = true) {
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2009-05-30 20:51:52 +00:00
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return true;
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}
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2010-07-22 05:58:53 +00:00
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/// addPassesToEmitMC - Add passes to the specified pass manager to get
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/// machine code emitted with the MCJIT. This method returns true if machine
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/// code is not supported. It fills the MCContext Ctx pointer which can be
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/// used to build custom MCStreamer.
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///
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2010-07-22 21:51:30 +00:00
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virtual bool addPassesToEmitMC(PassManagerBase &,
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MCContext *&,
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CodeGenOpt::Level,
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bool = true) {
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2010-07-22 05:58:53 +00:00
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return true;
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}
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2006-09-04 04:14:57 +00:00
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};
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/// LLVMTargetMachine - This class describes a target machine that is
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/// implemented with the LLVM target-independent code generator.
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///
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class LLVMTargetMachine : public TargetMachine {
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2010-03-11 01:34:27 +00:00
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std::string TargetTriple;
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2006-09-04 04:14:57 +00:00
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protected: // Can only create subclasses.
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2009-08-12 07:22:17 +00:00
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LLVMTargetMachine(const Target &T, const std::string &TargetTriple);
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2010-03-13 20:55:24 +00:00
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private:
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2008-09-25 00:37:07 +00:00
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/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for
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/// both emitting to assembly files or machine code output.
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///
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2010-02-28 00:41:59 +00:00
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bool addCommonCodeGenPasses(PassManagerBase &, CodeGenOpt::Level,
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2010-03-13 20:55:24 +00:00
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bool DisableVerify, MCContext *&OutCtx);
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2008-09-25 00:37:07 +00:00
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2009-12-21 08:15:29 +00:00
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virtual void setCodeModelForJIT();
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virtual void setCodeModelForStatic();
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2006-09-04 04:14:57 +00:00
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public:
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2010-09-27 06:44:54 +00:00
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const std::string &getTargetTriple() const { return TargetTriple; }
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2007-02-08 01:34:45 +00:00
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/// addPassesToEmitFile - Add passes to the specified pass manager to get the
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/// specified file emitted. Typically this will involve several steps of code
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2010-02-02 21:06:45 +00:00
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/// generation. If OptLevel is None, the code generator should emit code as
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2010-02-03 05:55:08 +00:00
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/// fast as possible, though the generated code may be less efficient.
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virtual bool addPassesToEmitFile(PassManagerBase &PM,
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formatted_raw_ostream &Out,
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CodeGenFileType FileType,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level,
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bool DisableVerify = true);
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2006-09-04 04:14:57 +00:00
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2009-05-30 20:51:52 +00:00
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/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
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2010-02-02 22:31:11 +00:00
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/// get machine code emitted. This uses a JITCodeEmitter object to handle
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2009-05-30 20:51:52 +00:00
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/// actually outputting the machine code and resolving things like the address
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/// of functions. This method returns true if machine code emission is
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/// not supported.
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///
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virtual bool addPassesToEmitMachineCode(PassManagerBase &PM,
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JITCodeEmitter &MCE,
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2010-02-28 00:41:59 +00:00
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CodeGenOpt::Level,
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bool DisableVerify = true);
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2010-07-22 05:58:53 +00:00
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/// addPassesToEmitMC - Add passes to the specified pass manager to get
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/// machine code emitted with the MCJIT. This method returns true if machine
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/// code is not supported. It fills the MCContext Ctx pointer which can be
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|
|
/// used to build custom MCStreamer.
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///
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virtual bool addPassesToEmitMC(PassManagerBase &PM,
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MCContext *&Ctx,
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CodeGenOpt::Level OptLevel,
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|
|
bool DisableVerify = true);
|
2009-05-30 20:51:52 +00:00
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|
2006-09-04 04:14:57 +00:00
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/// Target-Independent Code Generator Pass Configuration Options.
|
2010-07-24 20:48:54 +00:00
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|
/// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
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|
/// passes (which are run just before instruction selector).
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virtual bool addPreISel(PassManagerBase &, CodeGenOpt::Level) {
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|
return true;
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|
}
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|
/// addInstSelector - This method should install an instruction selector pass,
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|
/// which converts from LLVM code to machine instructions.
|
2009-04-29 23:29:43 +00:00
|
|
|
virtual bool addInstSelector(PassManagerBase &, CodeGenOpt::Level) {
|
2006-09-04 04:14:57 +00:00
|
|
|
return true;
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|
|
|
}
|
2008-04-23 18:22:28 +00:00
|
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|
|
2009-09-30 08:49:50 +00:00
|
|
|
/// addPreRegAlloc - This method may be implemented by targets that want to
|
|
|
|
/// run passes immediately before register allocation. This should return
|
2008-04-23 18:22:28 +00:00
|
|
|
/// true if -print-machineinstrs should print after these passes.
|
2009-04-29 23:29:43 +00:00
|
|
|
virtual bool addPreRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
|
2008-04-23 18:22:28 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
2009-09-30 08:49:50 +00:00
|
|
|
/// addPostRegAlloc - This method may be implemented by targets that want
|
|
|
|
/// to run passes after register allocation but before prolog-epilog
|
2006-09-04 04:14:57 +00:00
|
|
|
/// insertion. This should return true if -print-machineinstrs should print
|
|
|
|
/// after these passes.
|
2009-04-29 23:29:43 +00:00
|
|
|
virtual bool addPostRegAlloc(PassManagerBase &, CodeGenOpt::Level) {
|
2006-09-04 04:14:57 +00:00
|
|
|
return false;
|
|
|
|
}
|
2009-09-30 08:49:50 +00:00
|
|
|
|
|
|
|
/// addPreSched2 - This method may be implemented by targets that want to
|
|
|
|
/// run passes after prolog-epilog insertion and before the second instruction
|
|
|
|
/// scheduling pass. This should return true if -print-machineinstrs should
|
|
|
|
/// print after these passes.
|
|
|
|
virtual bool addPreSched2(PassManagerBase &, CodeGenOpt::Level) {
|
|
|
|
return false;
|
|
|
|
}
|
2006-09-04 04:14:57 +00:00
|
|
|
|
|
|
|
/// addPreEmitPass - This pass may be implemented by targets that want to run
|
|
|
|
/// passes immediately before machine code is emitted. This should return
|
|
|
|
/// true if -print-machineinstrs should print out the code after the passes.
|
2009-04-29 23:29:43 +00:00
|
|
|
virtual bool addPreEmitPass(PassManagerBase &, CodeGenOpt::Level) {
|
2006-09-04 04:14:57 +00:00
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2009-05-30 20:51:52 +00:00
|
|
|
/// addCodeEmitter - This pass should be overridden by the target to add a
|
|
|
|
/// code emitter, if supported. If this is not supported, 'true' should be
|
2009-07-15 22:33:19 +00:00
|
|
|
/// returned.
|
2009-05-30 20:51:52 +00:00
|
|
|
virtual bool addCodeEmitter(PassManagerBase &, CodeGenOpt::Level,
|
2009-07-15 22:33:19 +00:00
|
|
|
JITCodeEmitter &) {
|
2009-05-30 20:51:52 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2007-05-22 18:31:04 +00:00
|
|
|
/// getEnableTailMergeDefault - the default setting for -enable-tail-merge
|
2007-05-22 17:14:46 +00:00
|
|
|
/// on this target. User flag overrides.
|
2007-11-19 20:46:23 +00:00
|
|
|
virtual bool getEnableTailMergeDefault() const { return true; }
|
2001-09-18 12:38:31 +00:00
|
|
|
};
|
|
|
|
|
2003-11-11 22:41:34 +00:00
|
|
|
} // End llvm namespace
|
|
|
|
|
2001-09-18 12:38:31 +00:00
|
|
|
#endif
|