2005-03-17 18:17:03 +00:00
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//===-- IA64AsmPrinter.cpp - Print out IA64 LLVM as assembly --------------===//
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2005-04-21 23:13:11 +00:00
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//
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2005-03-17 18:17:03 +00:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 20:36:04 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-21 23:13:11 +00:00
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//
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2005-03-17 18:17:03 +00:00
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to assembly accepted by the GNU binutils 'gas'
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// assembler. The Intel 'ias' and HP-UX 'as' assemblers *may* choke on this
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// output, but if so that's a bug I'd like to hear about: please file a bug
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2005-10-28 17:46:35 +00:00
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// report in bugzilla. FYI, the not too bad 'ias' assembler is bundled with
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2005-03-17 18:17:03 +00:00
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// the Intel C/C++ compiler for Itanium Linux.
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//
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//===----------------------------------------------------------------------===//
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2006-12-19 22:59:26 +00:00
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#define DEBUG_TYPE "asm-printer"
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2005-03-17 18:17:03 +00:00
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#include "IA64.h"
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#include "IA64TargetMachine.h"
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#include "llvm/Module.h"
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2005-03-24 05:12:48 +00:00
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#include "llvm/Type.h"
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2005-03-17 18:17:03 +00:00
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#include "llvm/CodeGen/AsmPrinter.h"
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2009-02-18 23:12:06 +00:00
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#include "llvm/CodeGen/DwarfWriter.h"
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2005-03-17 18:17:03 +00:00
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#include "llvm/CodeGen/MachineFunctionPass.h"
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2006-09-06 18:34:40 +00:00
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#include "llvm/Target/TargetAsmInfo.h"
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2006-09-07 22:06:40 +00:00
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#include "llvm/Target/TargetMachine.h"
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2005-03-17 18:17:03 +00:00
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#include "llvm/Support/Mangler.h"
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2008-08-21 00:14:44 +00:00
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#include "llvm/Support/raw_ostream.h"
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2005-03-17 18:17:03 +00:00
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#include "llvm/ADT/Statistic.h"
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using namespace llvm;
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2006-12-19 22:59:26 +00:00
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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2005-03-17 18:17:03 +00:00
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namespace {
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2009-02-24 08:30:20 +00:00
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class IA64AsmPrinter : public AsmPrinter {
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2006-09-06 18:34:40 +00:00
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std::set<std::string> ExternalFunctionNames, ExternalObjectNames;
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2009-02-24 08:30:20 +00:00
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public:
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IA64AsmPrinter(raw_ostream &O, TargetMachine &TM,
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const TargetAsmInfo *T, bool F)
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: AsmPrinter(O, TM, T, F) {}
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2005-03-17 18:17:03 +00:00
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virtual const char *getPassName() const {
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return "IA64 Assembly Printer";
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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// This method is used by the tablegen'erated instruction printer.
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2005-11-30 18:54:35 +00:00
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void printOperand(const MachineInstr *MI, unsigned OpNo){
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2005-03-17 18:17:03 +00:00
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const MachineOperand &MO = MI->getOperand(OpNo);
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2006-05-04 18:05:43 +00:00
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if (MO.getType() == MachineOperand::MO_Register) {
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2008-02-10 18:45:23 +00:00
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg()) &&
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"Not physref??");
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2005-03-17 18:17:03 +00:00
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//XXX Bug Workaround: See note in Printer::doInitialization about %.
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2008-02-26 21:11:01 +00:00
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O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
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2005-03-17 18:17:03 +00:00
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} else {
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printOp(MO);
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}
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}
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2005-04-21 23:13:11 +00:00
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2005-11-30 18:54:35 +00:00
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void printS8ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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2007-12-30 20:49:49 +00:00
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int val=(unsigned int)MI->getOperand(OpNo).getImm();
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2005-04-07 12:34:36 +00:00
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if(val>=128) val=val-256; // if negative, flip sign
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O << val;
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}
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2005-11-30 18:54:35 +00:00
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void printS14ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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2007-12-30 20:49:49 +00:00
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int val=(unsigned int)MI->getOperand(OpNo).getImm();
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2005-04-07 12:34:36 +00:00
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if(val>=8192) val=val-16384; // if negative, flip sign
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O << val;
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}
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2005-11-30 18:54:35 +00:00
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void printS22ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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2007-12-30 20:49:49 +00:00
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int val=(unsigned int)MI->getOperand(OpNo).getImm();
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2005-04-11 05:55:56 +00:00
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if(val>=2097152) val=val-4194304; // if negative, flip sign
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O << val;
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2005-03-17 18:17:03 +00:00
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}
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2005-11-30 18:54:35 +00:00
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void printU64ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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2007-12-30 20:49:49 +00:00
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O << (uint64_t)MI->getOperand(OpNo).getImm();
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2005-03-17 18:17:03 +00:00
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}
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2005-11-30 18:54:35 +00:00
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void printS64ImmOperand(const MachineInstr *MI, unsigned OpNo) {
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2005-10-28 17:46:35 +00:00
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// XXX : nasty hack to avoid GPREL22 "relocation truncated to fit" linker
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// errors - instead of add rX = @gprel(CPI<whatever>), r1;; we now
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// emit movl rX = @gprel(CPI<whatever);;
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2008-08-07 09:52:13 +00:00
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// add rX = rX, r1;
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2005-10-28 17:46:35 +00:00
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// this gives us 64 bits instead of 22 (for the add long imm) to play
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// with, which shuts up the linker. The problem is that the constant
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2008-08-07 09:52:13 +00:00
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// pool entries aren't immediates at this stage, so we check here.
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2005-10-28 17:46:35 +00:00
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// If it's an immediate, print it the old fashioned way. If it's
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2008-08-07 09:52:13 +00:00
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// not, we print it as a constant pool index.
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2008-10-03 15:45:36 +00:00
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if (MI->getOperand(OpNo).isImm()) {
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2007-12-30 20:49:49 +00:00
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O << (int64_t)MI->getOperand(OpNo).getImm();
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2005-10-28 17:46:35 +00:00
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} else { // this is a constant pool reference: FIXME: assert this
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printOp(MI->getOperand(OpNo));
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}
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}
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2005-11-30 18:54:35 +00:00
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void printGlobalOperand(const MachineInstr *MI, unsigned OpNo) {
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2005-10-28 17:46:35 +00:00
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printOp(MI->getOperand(OpNo), false); // this is NOT a br.call instruction
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2005-04-14 10:08:01 +00:00
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}
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2005-04-21 23:13:11 +00:00
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2005-11-30 18:54:35 +00:00
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void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
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2005-04-21 23:13:11 +00:00
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printOp(MI->getOperand(OpNo), true); // this is a br.call instruction
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2005-03-17 18:17:03 +00:00
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}
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO, bool isBRCALLinsn= false);
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2008-08-07 09:52:35 +00:00
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void printModuleLevelGV(const GlobalVariable* GVar);
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2005-04-21 23:13:11 +00:00
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bool runOnMachineFunction(MachineFunction &F);
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2005-03-17 18:17:03 +00:00
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bool doInitialization(Module &M);
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2005-11-21 08:40:17 +00:00
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bool doFinalization(Module &M);
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2005-03-17 18:17:03 +00:00
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};
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} // end of anonymous namespace
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// Include the auto-generated portion of the assembly writer.
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#include "IA64GenAsmWriter.inc"
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool IA64AsmPrinter::runOnMachineFunction(MachineFunction &MF) {
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2009-02-24 08:30:20 +00:00
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this->MF = &MF;
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2005-11-21 07:51:23 +00:00
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SetupMachineFunction(MF);
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2005-03-17 18:17:03 +00:00
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O << "\n\n";
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// Print out constants referenced by the function
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2005-11-21 08:38:26 +00:00
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EmitConstantPool(MF.getConstantPool());
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2005-03-17 18:17:03 +00:00
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2006-10-05 02:51:36 +00:00
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const Function *F = MF.getFunction();
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2008-09-24 22:14:23 +00:00
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SwitchToSection(TAI->SectionForGlobal(F));
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2006-10-05 02:51:36 +00:00
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2005-03-17 18:17:03 +00:00
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// Print out labels for the function.
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2005-11-21 07:51:23 +00:00
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EmitAlignment(5);
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2008-08-07 09:52:54 +00:00
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O << "\t.global\t" << CurrentFnName << '\n';
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2008-08-08 18:25:07 +00:00
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printVisibility(CurrentFnName, F->getVisibility());
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2005-03-17 18:17:03 +00:00
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O << "\t.type\t" << CurrentFnName << ", @function\n";
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O << CurrentFnName << ":\n";
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block if there are any predecessors.
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2007-10-03 19:26:29 +00:00
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if (!I->pred_empty()) {
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2008-02-28 00:43:03 +00:00
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printBasicBlockLabel(I, true, true);
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2006-05-02 05:37:32 +00:00
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O << '\n';
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}
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2005-03-17 18:17:03 +00:00
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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printMachineInstruction(II);
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}
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}
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// We didn't modify anything.
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return false;
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}
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void IA64AsmPrinter::printOp(const MachineOperand &MO,
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2006-05-04 17:21:20 +00:00
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bool isBRCALLinsn /* = false */) {
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2008-02-10 18:45:23 +00:00
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const TargetRegisterInfo &RI = *TM.getRegisterInfo();
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2005-03-17 18:17:03 +00:00
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switch (MO.getType()) {
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2006-05-04 18:05:43 +00:00
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case MachineOperand::MO_Register:
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2008-02-26 21:11:01 +00:00
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O << RI.get(MO.getReg()).AsmName;
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2005-03-17 18:17:03 +00:00
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return;
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2006-05-04 17:21:20 +00:00
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case MachineOperand::MO_Immediate:
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2007-12-30 20:49:49 +00:00
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O << MO.getImm();
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2005-03-17 18:17:03 +00:00
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return;
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2006-04-22 18:53:45 +00:00
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case MachineOperand::MO_MachineBasicBlock:
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2007-12-30 23:10:15 +00:00
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printBasicBlockLabel(MO.getMBB());
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2005-03-17 18:17:03 +00:00
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return;
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case MachineOperand::MO_ConstantPoolIndex: {
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2006-09-06 18:34:40 +00:00
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O << "@gprel(" << TAI->getPrivateGlobalPrefix()
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2007-12-30 23:10:15 +00:00
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<< "CPI" << getFunctionNumber() << "_" << MO.getIndex() << ")";
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2005-03-17 18:17:03 +00:00
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return;
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}
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case MachineOperand::MO_GlobalAddress: {
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// functions need @ltoff(@fptr(fn_name)) form
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GlobalValue *GV = MO.getGlobal();
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Function *F = dyn_cast<Function>(GV);
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bool Needfptr=false; // if we're computing an address @ltoff(X), do
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// we need to decorate it so it becomes
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2005-04-22 17:54:37 +00:00
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// @ltoff(@fptr(X)) ?
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2007-01-30 20:08:39 +00:00
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if (F && !isBRCALLinsn /*&& F->isDeclaration()*/)
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2005-03-17 18:17:03 +00:00
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Needfptr=true;
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2005-04-21 23:13:11 +00:00
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2005-03-17 18:17:03 +00:00
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// if this is the target of a call instruction, we should define
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// the function somewhere (GNU gas has no problem without this, but
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// Intel ias rightly complains of an 'undefined symbol')
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2005-04-21 23:13:11 +00:00
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2007-01-30 20:08:39 +00:00
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if (F /*&& isBRCALLinsn*/ && F->isDeclaration())
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2005-03-17 18:17:03 +00:00
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ExternalFunctionNames.insert(Mang->getValueName(MO.getGlobal()));
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2005-03-28 15:21:43 +00:00
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else
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2007-01-30 20:08:39 +00:00
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if (GV->isDeclaration()) // e.g. stuff like 'stdin'
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2005-04-22 17:54:37 +00:00
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ExternalObjectNames.insert(Mang->getValueName(MO.getGlobal()));
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2005-03-28 15:21:43 +00:00
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2005-03-17 18:17:03 +00:00
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if (!isBRCALLinsn)
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O << "@ltoff(";
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if (Needfptr)
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O << "@fptr(";
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O << Mang->getValueName(MO.getGlobal());
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2008-08-07 09:52:13 +00:00
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2006-02-16 13:12:57 +00:00
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if (Needfptr && !isBRCALLinsn)
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O << "#))"; // close both fptr( and ltoff(
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else {
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if (Needfptr)
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O << "#)"; // close only fptr(
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if (!isBRCALLinsn)
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O << "#)"; // close only ltoff(
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}
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2008-08-07 09:52:13 +00:00
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2005-03-17 18:17:03 +00:00
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int Offset = MO.getOffset();
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if (Offset > 0)
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O << " + " << Offset;
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else if (Offset < 0)
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O << " - " << -Offset;
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return;
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}
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case MachineOperand::MO_ExternalSymbol:
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O << MO.getSymbolName();
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2005-03-28 15:21:43 +00:00
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ExternalFunctionNames.insert(MO.getSymbolName());
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2005-03-17 18:17:03 +00:00
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return;
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default:
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2005-04-21 23:13:11 +00:00
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O << "<AsmPrinter: unknown operand type: " << MO.getType() << " >"; return;
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2005-03-17 18:17:03 +00:00
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}
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}
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/// printMachineInstruction -- Print out a single IA64 LLVM instruction
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/// MI to the current output stream.
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///
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void IA64AsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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2005-04-21 23:13:11 +00:00
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2005-03-17 18:17:03 +00:00
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// Call the autogenerated instruction printer routines.
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printInstruction(MI);
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}
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bool IA64AsmPrinter::doInitialization(Module &M) {
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2007-07-25 19:33:14 +00:00
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bool Result = AsmPrinter::doInitialization(M);
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2005-04-21 23:13:11 +00:00
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2005-03-28 15:21:43 +00:00
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O << "\n.ident \"LLVM-ia64\"\n\n"
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2005-04-22 17:54:37 +00:00
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<< "\t.psr lsb\n" // should be "msb" on HP-UX, for starters
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2005-03-17 18:17:03 +00:00
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<< "\t.radix C\n"
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2005-04-22 17:54:37 +00:00
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<< "\t.psr abi64\n"; // we only support 64 bits for now
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2007-07-25 19:33:14 +00:00
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return Result;
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2005-03-17 18:17:03 +00:00
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}
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2008-08-07 09:52:35 +00:00
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void IA64AsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
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2006-05-03 01:29:57 +00:00
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const TargetData *TD = TM.getTargetData();
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2008-08-07 09:52:13 +00:00
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2008-08-07 09:52:35 +00:00
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if (!GVar->hasInitializer())
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return; // External global require no code
|
|
|
|
|
|
|
|
// Check to see if this is a special global used by LLVM, if so, emit it.
|
|
|
|
if (EmitSpecialLLVMGlobal(GVar))
|
|
|
|
return;
|
|
|
|
|
|
|
|
O << "\n\n";
|
|
|
|
std::string name = Mang->getValueName(GVar);
|
|
|
|
Constant *C = GVar->getInitializer();
|
2009-01-12 20:38:59 +00:00
|
|
|
unsigned Size = TD->getTypePaddedSize(C->getType());
|
2008-08-07 09:52:35 +00:00
|
|
|
unsigned Align = TD->getPreferredAlignmentLog(GVar);
|
|
|
|
|
2008-08-08 18:25:07 +00:00
|
|
|
printVisibility(name, GVar->getVisibility());
|
2008-08-07 09:52:35 +00:00
|
|
|
|
2008-09-24 22:14:23 +00:00
|
|
|
SwitchToSection(TAI->SectionForGlobal(GVar));
|
2008-08-07 09:52:35 +00:00
|
|
|
|
|
|
|
if (C->isNullValue() && !GVar->hasSection()) {
|
|
|
|
if (!GVar->isThreadLocal() &&
|
Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-07 15:45:40 +00:00
|
|
|
(GVar->hasLocalLinkage() || GVar->isWeakForLinker())) {
|
2008-08-07 09:52:35 +00:00
|
|
|
if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
|
|
|
|
|
2009-01-15 20:18:42 +00:00
|
|
|
if (GVar->hasLocalLinkage()) {
|
2008-08-07 09:52:35 +00:00
|
|
|
O << "\t.lcomm " << name << "#," << Size
|
2008-08-07 09:52:54 +00:00
|
|
|
<< ',' << (1 << Align);
|
|
|
|
O << '\n';
|
2005-11-21 08:40:17 +00:00
|
|
|
} else {
|
2008-08-07 09:52:35 +00:00
|
|
|
O << "\t.common " << name << "#," << Size
|
2008-08-07 09:52:54 +00:00
|
|
|
<< ',' << (1 << Align);
|
|
|
|
O << '\n';
|
2005-11-21 08:40:17 +00:00
|
|
|
}
|
2008-08-07 09:52:35 +00:00
|
|
|
|
|
|
|
return;
|
2005-11-21 08:40:17 +00:00
|
|
|
}
|
2008-08-07 09:52:35 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
switch (GVar->getLinkage()) {
|
Introduce new linkage types linkonce_odr, weak_odr, common_odr
and extern_weak_odr. These are the same as the non-odr versions,
except that they indicate that the global will only be overridden
by an *equivalent* global. In C, a function with weak linkage can
be overridden by a function which behaves completely differently.
This means that IP passes have to skip weak functions, since any
deductions made from the function definition might be wrong, since
the definition could be replaced by something completely different
at link time. This is not allowed in C++, thanks to the ODR
(One-Definition-Rule): if a function is replaced by another at
link-time, then the new function must be the same as the original
function. If a language knows that a function or other global can
only be overridden by an equivalent global, it can give it the
weak_odr linkage type, and the optimizers will understand that it
is alright to make deductions based on the function body. The
code generators on the other hand map weak and weak_odr linkage
to the same thing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66339 91177308-0d34-0410-b5e6-96231b3b80d8
2009-03-07 15:45:40 +00:00
|
|
|
case GlobalValue::LinkOnceAnyLinkage:
|
|
|
|
case GlobalValue::LinkOnceODRLinkage:
|
|
|
|
case GlobalValue::CommonAnyLinkage:
|
|
|
|
case GlobalValue::CommonODRLinkage:
|
|
|
|
case GlobalValue::WeakAnyLinkage:
|
|
|
|
case GlobalValue::WeakODRLinkage:
|
2008-08-07 09:52:35 +00:00
|
|
|
// Nonnull linkonce -> weak
|
2008-08-07 09:52:54 +00:00
|
|
|
O << "\t.weak " << name << '\n';
|
2008-08-07 09:52:35 +00:00
|
|
|
break;
|
|
|
|
case GlobalValue::AppendingLinkage:
|
|
|
|
// FIXME: appending linkage variables should go into a section of
|
|
|
|
// their name or something. For now, just emit them as external.
|
|
|
|
case GlobalValue::ExternalLinkage:
|
|
|
|
// If external or appending, declare as a global symbol
|
2008-08-07 09:52:54 +00:00
|
|
|
O << TAI->getGlobalDirective() << name << '\n';
|
2008-08-07 09:52:35 +00:00
|
|
|
// FALL THROUGH
|
|
|
|
case GlobalValue::InternalLinkage:
|
2009-01-15 20:18:42 +00:00
|
|
|
case GlobalValue::PrivateLinkage:
|
2008-08-07 09:52:35 +00:00
|
|
|
break;
|
|
|
|
case GlobalValue::GhostLinkage:
|
|
|
|
cerr << "GhostLinkage cannot appear in IA64AsmPrinter!\n";
|
|
|
|
abort();
|
|
|
|
case GlobalValue::DLLImportLinkage:
|
|
|
|
cerr << "DLLImport linkage is not supported by this target!\n";
|
|
|
|
abort();
|
|
|
|
case GlobalValue::DLLExportLinkage:
|
|
|
|
cerr << "DLLExport linkage is not supported by this target!\n";
|
|
|
|
abort();
|
|
|
|
default:
|
|
|
|
assert(0 && "Unknown linkage type!");
|
|
|
|
}
|
|
|
|
|
2008-08-07 09:53:38 +00:00
|
|
|
EmitAlignment(Align, GVar);
|
2008-08-07 09:52:35 +00:00
|
|
|
|
|
|
|
if (TAI->hasDotTypeDotSizeDirective()) {
|
|
|
|
O << "\t.type " << name << ",@object\n";
|
2008-08-07 09:52:54 +00:00
|
|
|
O << "\t.size " << name << ',' << Size << '\n';
|
2008-08-07 09:52:35 +00:00
|
|
|
}
|
|
|
|
|
2008-08-21 00:14:44 +00:00
|
|
|
O << name << ":\n";
|
2008-08-07 09:52:35 +00:00
|
|
|
EmitGlobalConstant(C);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
bool IA64AsmPrinter::doFinalization(Module &M) {
|
|
|
|
// Print out module-level global variables here.
|
|
|
|
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
|
|
|
|
I != E; ++I)
|
|
|
|
printModuleLevelGV(I);
|
2008-08-07 09:52:13 +00:00
|
|
|
|
|
|
|
// we print out ".global X \n .type X, @function" for each external function
|
|
|
|
O << "\n\n// br.call targets referenced (and not defined) above: \n";
|
2005-11-21 08:40:17 +00:00
|
|
|
for (std::set<std::string>::iterator i = ExternalFunctionNames.begin(),
|
|
|
|
e = ExternalFunctionNames.end(); i!=e; ++i) {
|
|
|
|
O << "\t.global " << *i << "\n\t.type " << *i << ", @function\n";
|
|
|
|
}
|
|
|
|
O << "\n\n";
|
2008-08-07 09:52:13 +00:00
|
|
|
|
2005-11-21 08:40:17 +00:00
|
|
|
// we print out ".global X \n .type X, @object" for each external object
|
|
|
|
O << "\n\n// (external) symbols referenced (and not defined) above: \n";
|
|
|
|
for (std::set<std::string>::iterator i = ExternalObjectNames.begin(),
|
|
|
|
e = ExternalObjectNames.end(); i!=e; ++i) {
|
|
|
|
O << "\t.global " << *i << "\n\t.type " << *i << ", @object\n";
|
|
|
|
}
|
|
|
|
O << "\n\n";
|
2008-08-07 09:52:13 +00:00
|
|
|
|
2007-07-25 19:33:14 +00:00
|
|
|
return AsmPrinter::doFinalization(M);
|
2005-11-21 08:40:17 +00:00
|
|
|
}
|
|
|
|
|
2005-03-17 18:17:03 +00:00
|
|
|
/// createIA64CodePrinterPass - Returns a pass that prints the IA64
|
|
|
|
/// assembly code for a MachineFunction to the given output stream, using
|
|
|
|
/// the given target machine description.
|
|
|
|
///
|
2008-08-21 00:14:44 +00:00
|
|
|
FunctionPass *llvm::createIA64CodePrinterPass(raw_ostream &o,
|
2009-02-24 08:30:20 +00:00
|
|
|
IA64TargetMachine &tm,
|
|
|
|
bool fast) {
|
|
|
|
return new IA64AsmPrinter(o, tm, tm.getTargetAsmInfo(), fast);
|
2005-03-17 18:17:03 +00:00
|
|
|
}
|