2005-09-01 23:24:04 +00:00
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//===-- DAGCombiner.cpp - Implement a DAG node combiner -------------------===//
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2005-09-01 00:19:25 +00:00
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by Nate Begeman and is distributed under the
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// University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass combines dag nodes to form fewer, simpler DAG nodes. It can be run
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// both before and after the DAG is legalized.
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//
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// FIXME: Missing folds
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// sdiv, udiv, srem, urem (X, const) where X is an integer can be expanded into
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// a sequence of multiplies, shifts, and adds. This should be controlled by
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// some kind of hint from the target that int div is expensive.
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// various folds of mulh[s,u] by constants such as -1, powers of 2, etc.
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//
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// FIXME: Should add a corresponding version of fold AND with
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// ZERO_EXTEND/SIGN_EXTEND by converting them to an ANY_EXTEND node which
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// we don't have yet.
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//
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2005-09-19 22:34:01 +00:00
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// FIXME: select C, 16, 0 -> shr C, 4
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// FIXME: select C, pow2, pow2 -> something smart
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// FIXME: trunc(select X, Y, Z) -> select X, trunc(Y), trunc(Z)
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// FIXME: (select C, load A, load B) -> load (select C, A, B)
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// FIXME: store -> load -> forward substitute
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// FIXME: Dead stores -> nuke
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// FIXME: shr X, (and Y,31) -> shr X, Y
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// FIXME: TRUNC (LOAD) -> EXT_LOAD/LOAD(smaller)
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2005-09-01 00:19:25 +00:00
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// FIXME: mul (x, const) -> shifts + adds
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// FIXME: undef values
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// FIXME: zero extend when top bits are 0 -> drop it ?
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2005-09-01 23:24:04 +00:00
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// FIXME: make truncate see through SIGN_EXTEND and AND
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// FIXME: sext_in_reg(setcc) on targets that return zero or one, and where
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// EVT != MVT::i1 can drop the sext.
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// FIXME: (sra (sra x, c1), c2) -> (sra x, c1+c2)
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2005-09-02 21:18:40 +00:00
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// FIXME: verify that getNode can't return extends with an operand whose type
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// is >= to that of the extend.
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// FIXME: divide by zero is currently left unfolded. do we want to turn this
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// into an undef?
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2005-09-01 00:19:25 +00:00
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "dagcombine"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/CodeGen/SelectionDAG.h"
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2005-09-07 00:15:36 +00:00
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#include "llvm/Support/Debug.h"
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2005-09-01 00:19:25 +00:00
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Target/TargetLowering.h"
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2005-09-09 23:53:39 +00:00
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#include <algorithm>
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2005-09-01 00:19:25 +00:00
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#include <cmath>
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using namespace llvm;
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namespace {
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Statistic<> NodesCombined ("dagcombiner", "Number of dag nodes combined");
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class DAGCombiner {
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SelectionDAG &DAG;
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TargetLowering &TLI;
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2005-09-01 23:24:04 +00:00
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bool AfterLegalize;
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2005-09-01 00:19:25 +00:00
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// Worklist of all of the nodes that need to be simplified.
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std::vector<SDNode*> WorkList;
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/// AddUsersToWorkList - When an instruction is simplified, add all users of
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/// the instruction to the work lists because they might get more simplified
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/// now.
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///
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void AddUsersToWorkList(SDNode *N) {
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for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
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2005-09-01 23:24:04 +00:00
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UI != UE; ++UI)
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WorkList.push_back(*UI);
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2005-09-01 00:19:25 +00:00
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}
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/// removeFromWorkList - remove all instances of N from the worklist.
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void removeFromWorkList(SDNode *N) {
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WorkList.erase(std::remove(WorkList.begin(), WorkList.end(), N),
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WorkList.end());
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}
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/// visit - call the node-specific routine that knows how to fold each
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/// particular type of node.
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2005-09-06 04:43:02 +00:00
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SDOperand visit(SDNode *N);
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2005-09-01 00:19:25 +00:00
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// Visitation implementation - Implement dag node combining for different
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// node types. The semantics are as follows:
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// Return Value:
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2005-09-07 00:15:36 +00:00
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// SDOperand.Val == 0 - No change was made
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// otherwise - N should be replaced by the returned Operand.
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2005-09-01 00:19:25 +00:00
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//
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2005-09-06 04:43:02 +00:00
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SDOperand visitTokenFactor(SDNode *N);
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SDOperand visitADD(SDNode *N);
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SDOperand visitSUB(SDNode *N);
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SDOperand visitMUL(SDNode *N);
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SDOperand visitSDIV(SDNode *N);
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SDOperand visitUDIV(SDNode *N);
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SDOperand visitSREM(SDNode *N);
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SDOperand visitUREM(SDNode *N);
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SDOperand visitMULHU(SDNode *N);
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SDOperand visitMULHS(SDNode *N);
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SDOperand visitAND(SDNode *N);
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SDOperand visitOR(SDNode *N);
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SDOperand visitXOR(SDNode *N);
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SDOperand visitSHL(SDNode *N);
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SDOperand visitSRA(SDNode *N);
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SDOperand visitSRL(SDNode *N);
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SDOperand visitCTLZ(SDNode *N);
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SDOperand visitCTTZ(SDNode *N);
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SDOperand visitCTPOP(SDNode *N);
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2005-09-16 00:54:12 +00:00
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SDOperand visitSELECT(SDNode *N);
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SDOperand visitSELECT_CC(SDNode *N);
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SDOperand visitSETCC(SDNode *N);
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2005-09-06 04:43:02 +00:00
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SDOperand visitSIGN_EXTEND(SDNode *N);
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SDOperand visitZERO_EXTEND(SDNode *N);
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SDOperand visitSIGN_EXTEND_INREG(SDNode *N);
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SDOperand visitTRUNCATE(SDNode *N);
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2005-09-28 22:28:18 +00:00
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SDOperand visitFADD(SDNode *N);
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SDOperand visitFSUB(SDNode *N);
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SDOperand visitFMUL(SDNode *N);
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SDOperand visitFDIV(SDNode *N);
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SDOperand visitFREM(SDNode *N);
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2005-09-06 04:43:02 +00:00
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SDOperand visitSINT_TO_FP(SDNode *N);
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SDOperand visitUINT_TO_FP(SDNode *N);
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SDOperand visitFP_TO_SINT(SDNode *N);
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SDOperand visitFP_TO_UINT(SDNode *N);
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SDOperand visitFP_ROUND(SDNode *N);
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SDOperand visitFP_ROUND_INREG(SDNode *N);
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SDOperand visitFP_EXTEND(SDNode *N);
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SDOperand visitFNEG(SDNode *N);
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SDOperand visitFABS(SDNode *N);
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2005-09-16 00:54:12 +00:00
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SDOperand visitBRCOND(SDNode *N);
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2005-09-19 22:34:01 +00:00
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SDOperand visitBRCONDTWOWAY(SDNode *N);
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SDOperand visitBR_CC(SDNode *N);
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SDOperand visitBRTWOWAY_CC(SDNode *N);
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2005-09-16 00:54:12 +00:00
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2005-09-19 22:34:01 +00:00
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SDOperand SimplifySelect(SDOperand N0, SDOperand N1, SDOperand N2);
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SDOperand SimplifySelectCC(SDOperand N0, SDOperand N1, SDOperand N2,
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SDOperand N3, ISD::CondCode CC);
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2005-09-16 00:54:12 +00:00
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SDOperand SimplifySetCC(MVT::ValueType VT, SDOperand N0, SDOperand N1,
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2005-10-05 21:43:42 +00:00
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ISD::CondCode Cond, bool foldBooleans = true);
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2005-09-01 00:19:25 +00:00
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public:
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DAGCombiner(SelectionDAG &D)
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2005-09-02 21:18:40 +00:00
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: DAG(D), TLI(D.getTargetLoweringInfo()), AfterLegalize(false) {}
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2005-09-01 00:19:25 +00:00
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/// Run - runs the dag combiner on all nodes in the work list
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2005-09-01 23:24:04 +00:00
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void Run(bool RunningAfterLegalize);
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2005-09-01 00:19:25 +00:00
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};
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}
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/// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
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/// this predicate to simplify operations downstream. V and Mask are known to
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/// be the same type.
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static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
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const TargetLowering &TLI) {
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unsigned SrcBits;
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if (Mask == 0) return true;
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// If we know the result of a setcc has the top bits zero, use this info.
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switch (Op.getOpcode()) {
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2005-09-01 23:24:04 +00:00
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case ISD::Constant:
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return (cast<ConstantSDNode>(Op)->getValue() & Mask) == 0;
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case ISD::SETCC:
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2005-09-02 21:18:40 +00:00
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// FIXME: teach this about non ZeroOrOne values, such as 0 or -1
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2005-09-01 23:24:04 +00:00
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return ((Mask & 1) == 0) &&
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TLI.getSetCCResultContents() == TargetLowering::ZeroOrOneSetCCResult;
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case ISD::ZEXTLOAD:
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SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(3))->getVT());
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return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
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case ISD::ZERO_EXTEND:
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SrcBits = MVT::getSizeInBits(Op.getOperand(0).getValueType());
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return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
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case ISD::AssertZext:
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SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
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return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
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case ISD::AND:
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// (X & C1) & C2 == 0 iff C1 & C2 == 0.
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if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
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return MaskedValueIsZero(Op.getOperand(0),AndRHS->getValue() & Mask, TLI);
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// FALL THROUGH
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case ISD::OR:
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case ISD::XOR:
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return MaskedValueIsZero(Op.getOperand(0), Mask, TLI) &&
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MaskedValueIsZero(Op.getOperand(1), Mask, TLI);
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case ISD::SELECT:
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return MaskedValueIsZero(Op.getOperand(1), Mask, TLI) &&
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MaskedValueIsZero(Op.getOperand(2), Mask, TLI);
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case ISD::SELECT_CC:
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return MaskedValueIsZero(Op.getOperand(2), Mask, TLI) &&
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MaskedValueIsZero(Op.getOperand(3), Mask, TLI);
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case ISD::SRL:
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// (ushr X, C1) & C2 == 0 iff X & (C2 << C1) == 0
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if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
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uint64_t NewVal = Mask << ShAmt->getValue();
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SrcBits = MVT::getSizeInBits(Op.getValueType());
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if (SrcBits != 64) NewVal &= (1ULL << SrcBits)-1;
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return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
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}
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return false;
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case ISD::SHL:
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// (ushl X, C1) & C2 == 0 iff X & (C2 >> C1) == 0
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if (ConstantSDNode *ShAmt = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
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uint64_t NewVal = Mask >> ShAmt->getValue();
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return MaskedValueIsZero(Op.getOperand(0), NewVal, TLI);
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}
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return false;
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case ISD::CTTZ:
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case ISD::CTLZ:
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case ISD::CTPOP:
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// Bit counting instructions can not set the high bits of the result
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// register. The max number of bits sets depends on the input.
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return (Mask & (MVT::getSizeInBits(Op.getValueType())*2-1)) == 0;
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// TODO we could handle some SRA cases here.
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default: break;
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2005-09-01 00:19:25 +00:00
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}
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return false;
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}
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2005-09-01 23:24:04 +00:00
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// isSetCCEquivalent - Return true if this node is a setcc, or is a select_cc
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// that selects between the values 1 and 0, making it equivalent to a setcc.
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2005-09-02 21:18:40 +00:00
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// Also, set the incoming LHS, RHS, and CC references to the appropriate
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// nodes based on the type of node we are checking. This simplifies life a
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// bit for the callers.
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static bool isSetCCEquivalent(SDOperand N, SDOperand &LHS, SDOperand &RHS,
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SDOperand &CC) {
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if (N.getOpcode() == ISD::SETCC) {
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LHS = N.getOperand(0);
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RHS = N.getOperand(1);
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CC = N.getOperand(2);
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2005-09-01 23:24:04 +00:00
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return true;
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2005-09-02 21:18:40 +00:00
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}
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2005-09-01 00:19:25 +00:00
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if (N.getOpcode() == ISD::SELECT_CC &&
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N.getOperand(2).getOpcode() == ISD::Constant &&
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N.getOperand(3).getOpcode() == ISD::Constant &&
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cast<ConstantSDNode>(N.getOperand(2))->getValue() == 1 &&
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2005-09-02 21:18:40 +00:00
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cast<ConstantSDNode>(N.getOperand(3))->isNullValue()) {
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LHS = N.getOperand(0);
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RHS = N.getOperand(1);
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CC = N.getOperand(4);
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2005-09-01 00:19:25 +00:00
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return true;
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2005-09-02 21:18:40 +00:00
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}
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2005-09-01 00:19:25 +00:00
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return false;
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}
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2005-09-07 23:25:52 +00:00
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// isOneUseSetCC - Return true if this is a SetCC-equivalent operation with only
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// one use. If this is true, it allows the users to invert the operation for
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// free when it is profitable to do so.
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static bool isOneUseSetCC(SDOperand N) {
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2005-09-02 21:18:40 +00:00
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SDOperand N0, N1, N2;
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if (isSetCCEquivalent(N, N0, N1, N2) && N.Val->hasOneUse())
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2005-09-01 23:24:04 +00:00
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return true;
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return false;
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}
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2005-09-16 00:54:12 +00:00
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// FIXME: This should probably go in the ISD class rather than being duplicated
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// in several files.
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static bool isCommutativeBinOp(unsigned Opcode) {
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switch (Opcode) {
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case ISD::ADD:
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case ISD::MUL:
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case ISD::AND:
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case ISD::OR:
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case ISD::XOR: return true;
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default: return false; // FIXME: Need commutative info for user ops!
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}
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}
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2005-09-01 23:24:04 +00:00
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void DAGCombiner::Run(bool RunningAfterLegalize) {
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// set the instance variable, so that the various visit routines may use it.
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AfterLegalize = RunningAfterLegalize;
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2005-09-02 21:18:40 +00:00
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// Add all the dag nodes to the worklist.
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WorkList.insert(WorkList.end(), DAG.allnodes_begin(), DAG.allnodes_end());
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2005-09-06 04:43:02 +00:00
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2005-10-05 06:35:28 +00:00
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// Create a dummy node (which is not added to allnodes), that adds a reference
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// to the root node, preventing it from being deleted, and tracking any
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// changes of the root.
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HandleSDNode Dummy(DAG.getRoot());
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2005-09-01 00:19:25 +00:00
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// while the worklist isn't empty, inspect the node on the end of it and
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// try and combine it.
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while (!WorkList.empty()) {
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SDNode *N = WorkList.back();
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WorkList.pop_back();
|
|
|
|
|
|
|
|
// If N has no uses, it is dead. Make sure to revisit all N's operands once
|
2005-10-05 06:35:28 +00:00
|
|
|
// N is deleted from the DAG, since they too may now be dead or may have a
|
|
|
|
// reduced number of uses, allowing other xforms.
|
|
|
|
if (N->use_empty() && N != &Dummy) {
|
2005-09-01 00:19:25 +00:00
|
|
|
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
|
|
|
|
WorkList.push_back(N->getOperand(i).Val);
|
|
|
|
|
|
|
|
removeFromWorkList(N);
|
2005-10-05 06:35:28 +00:00
|
|
|
DAG.DeleteNode(N);
|
2005-09-01 00:19:25 +00:00
|
|
|
continue;
|
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand RV = visit(N);
|
|
|
|
if (RV.Val) {
|
2005-09-01 00:19:25 +00:00
|
|
|
++NodesCombined;
|
2005-09-02 21:18:40 +00:00
|
|
|
// If we get back the same node we passed in, rather than a new node or
|
|
|
|
// zero, we know that the node must have defined multiple values and
|
|
|
|
// CombineTo was used. Since CombineTo takes care of the worklist
|
|
|
|
// mechanics for us, we have no work to do in this case.
|
2005-09-06 04:43:02 +00:00
|
|
|
if (RV.Val != N) {
|
2005-09-07 00:15:36 +00:00
|
|
|
DEBUG(std::cerr << "\nReplacing "; N->dump();
|
|
|
|
std::cerr << "\nWith: "; RV.Val->dump();
|
|
|
|
std::cerr << '\n');
|
2005-09-07 23:25:52 +00:00
|
|
|
DAG.ReplaceAllUsesWith(N, std::vector<SDOperand>(1, RV));
|
2005-09-02 21:18:40 +00:00
|
|
|
|
|
|
|
// Push the new node and any users onto the worklist
|
2005-09-06 04:43:02 +00:00
|
|
|
WorkList.push_back(RV.Val);
|
|
|
|
AddUsersToWorkList(RV.Val);
|
2005-09-02 21:18:40 +00:00
|
|
|
|
|
|
|
// Nodes can end up on the worklist more than once. Make sure we do
|
|
|
|
// not process a node that has been replaced.
|
|
|
|
removeFromWorkList(N);
|
2005-10-05 06:11:08 +00:00
|
|
|
|
|
|
|
// Finally, since the node is now dead, remove it from the graph.
|
|
|
|
DAG.DeleteNode(N);
|
2005-09-02 21:18:40 +00:00
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
}
|
2005-10-05 06:35:28 +00:00
|
|
|
|
|
|
|
// If the root changed (e.g. it was a dead load, update the root).
|
|
|
|
DAG.setRoot(Dummy.getValue());
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visit(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
switch(N->getOpcode()) {
|
|
|
|
default: break;
|
2005-09-01 00:33:32 +00:00
|
|
|
case ISD::TokenFactor: return visitTokenFactor(N);
|
2005-09-02 21:18:40 +00:00
|
|
|
case ISD::ADD: return visitADD(N);
|
|
|
|
case ISD::SUB: return visitSUB(N);
|
|
|
|
case ISD::MUL: return visitMUL(N);
|
|
|
|
case ISD::SDIV: return visitSDIV(N);
|
|
|
|
case ISD::UDIV: return visitUDIV(N);
|
|
|
|
case ISD::SREM: return visitSREM(N);
|
|
|
|
case ISD::UREM: return visitUREM(N);
|
|
|
|
case ISD::MULHU: return visitMULHU(N);
|
|
|
|
case ISD::MULHS: return visitMULHS(N);
|
|
|
|
case ISD::AND: return visitAND(N);
|
|
|
|
case ISD::OR: return visitOR(N);
|
|
|
|
case ISD::XOR: return visitXOR(N);
|
|
|
|
case ISD::SHL: return visitSHL(N);
|
|
|
|
case ISD::SRA: return visitSRA(N);
|
|
|
|
case ISD::SRL: return visitSRL(N);
|
|
|
|
case ISD::CTLZ: return visitCTLZ(N);
|
|
|
|
case ISD::CTTZ: return visitCTTZ(N);
|
|
|
|
case ISD::CTPOP: return visitCTPOP(N);
|
2005-09-16 00:54:12 +00:00
|
|
|
case ISD::SELECT: return visitSELECT(N);
|
|
|
|
case ISD::SELECT_CC: return visitSELECT_CC(N);
|
|
|
|
case ISD::SETCC: return visitSETCC(N);
|
2005-09-02 21:18:40 +00:00
|
|
|
case ISD::SIGN_EXTEND: return visitSIGN_EXTEND(N);
|
|
|
|
case ISD::ZERO_EXTEND: return visitZERO_EXTEND(N);
|
|
|
|
case ISD::SIGN_EXTEND_INREG: return visitSIGN_EXTEND_INREG(N);
|
|
|
|
case ISD::TRUNCATE: return visitTRUNCATE(N);
|
2005-09-28 22:28:18 +00:00
|
|
|
case ISD::FADD: return visitFADD(N);
|
|
|
|
case ISD::FSUB: return visitFSUB(N);
|
|
|
|
case ISD::FMUL: return visitFMUL(N);
|
|
|
|
case ISD::FDIV: return visitFDIV(N);
|
|
|
|
case ISD::FREM: return visitFREM(N);
|
2005-09-02 21:18:40 +00:00
|
|
|
case ISD::SINT_TO_FP: return visitSINT_TO_FP(N);
|
|
|
|
case ISD::UINT_TO_FP: return visitUINT_TO_FP(N);
|
|
|
|
case ISD::FP_TO_SINT: return visitFP_TO_SINT(N);
|
|
|
|
case ISD::FP_TO_UINT: return visitFP_TO_UINT(N);
|
|
|
|
case ISD::FP_ROUND: return visitFP_ROUND(N);
|
|
|
|
case ISD::FP_ROUND_INREG: return visitFP_ROUND_INREG(N);
|
|
|
|
case ISD::FP_EXTEND: return visitFP_EXTEND(N);
|
|
|
|
case ISD::FNEG: return visitFNEG(N);
|
|
|
|
case ISD::FABS: return visitFABS(N);
|
2005-09-19 22:34:01 +00:00
|
|
|
case ISD::BRCOND: return visitBRCOND(N);
|
|
|
|
case ISD::BRCONDTWOWAY: return visitBRCONDTWOWAY(N);
|
|
|
|
case ISD::BR_CC: return visitBR_CC(N);
|
|
|
|
case ISD::BRTWOWAY_CC: return visitBRTWOWAY_CC(N);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitTokenFactor(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
// If the token factor has two operands and one is the entry token, replace
|
|
|
|
// the token factor with the other operand.
|
|
|
|
if (N->getNumOperands() == 2) {
|
|
|
|
if (N->getOperand(0).getOpcode() == ISD::EntryToken)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N->getOperand(1);
|
2005-09-01 00:19:25 +00:00
|
|
|
if (N->getOperand(1).getOpcode() == ISD::EntryToken)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N->getOperand(0);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitADD(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-07 16:09:19 +00:00
|
|
|
MVT::ValueType VT = N0.getValueType();
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (add c1, c2) -> c1+c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
2005-09-07 16:09:19 +00:00
|
|
|
return DAG.getConstant(N0C->getValue() + N1C->getValue(), VT);
|
2005-09-07 23:25:52 +00:00
|
|
|
// canonicalize constant to RHS
|
|
|
|
if (N0C && !N1C) {
|
|
|
|
std::swap(N0, N1);
|
|
|
|
std::swap(N0C, N1C);
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (add x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-08 20:18:10 +00:00
|
|
|
// fold (add (add x, c1), c2) -> (add x, c1+c2)
|
|
|
|
if (N1C && N0.getOpcode() == ISD::ADD) {
|
|
|
|
ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));
|
|
|
|
ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
|
|
|
|
if (N00C)
|
|
|
|
return DAG.getNode(ISD::ADD, VT, N0.getOperand(1),
|
|
|
|
DAG.getConstant(N1C->getValue()+N00C->getValue(), VT));
|
|
|
|
if (N01C)
|
|
|
|
return DAG.getNode(ISD::ADD, VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(N1C->getValue()+N01C->getValue(), VT));
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold ((0-A) + B) -> B-A
|
|
|
|
if (N0.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N0.getOperand(0)) &&
|
|
|
|
cast<ConstantSDNode>(N0.getOperand(0))->isNullValue())
|
2005-09-07 16:09:19 +00:00
|
|
|
return DAG.getNode(ISD::SUB, VT, N1, N0.getOperand(1));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (A + (0-B)) -> A-B
|
|
|
|
if (N1.getOpcode() == ISD::SUB && isa<ConstantSDNode>(N1.getOperand(0)) &&
|
|
|
|
cast<ConstantSDNode>(N1.getOperand(0))->isNullValue())
|
2005-09-07 16:09:19 +00:00
|
|
|
return DAG.getNode(ISD::SUB, VT, N0, N1.getOperand(1));
|
2005-09-28 22:28:18 +00:00
|
|
|
// fold (A+(B-A)) -> B
|
|
|
|
if (N1.getOpcode() == ISD::SUB && N0 == N1.getOperand(1))
|
2005-09-06 04:43:02 +00:00
|
|
|
return N1.getOperand(0);
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSUB(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (sub c1, c2) -> c1-c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
|
|
|
return DAG.getConstant(N0C->getValue() - N1C->getValue(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sub x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (A+B)-A -> B
|
2005-09-28 22:28:18 +00:00
|
|
|
if (N0.getOpcode() == ISD::ADD && N0.getOperand(0) == N1)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0.getOperand(1);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (A+B)-B -> A
|
2005-09-28 22:28:18 +00:00
|
|
|
if (N0.getOpcode() == ISD::ADD && N0.getOperand(1) == N1)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0.getOperand(0);
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitMUL(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-08 20:18:10 +00:00
|
|
|
MVT::ValueType VT = N0.getValueType();
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (mul c1, c2) -> c1*c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
|
|
|
return DAG.getConstant(N0C->getValue() * N1C->getValue(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
2005-09-07 23:25:52 +00:00
|
|
|
// canonicalize constant to RHS
|
|
|
|
if (N0C && !N1C) {
|
|
|
|
std::swap(N0, N1);
|
|
|
|
std::swap(N0C, N1C);
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (mul x, 0) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N1;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (mul x, -1) -> 0-x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isAllOnesValue())
|
2005-09-01 00:19:25 +00:00
|
|
|
return DAG.getNode(ISD::SUB, N->getValueType(0),
|
2005-09-06 04:43:02 +00:00
|
|
|
DAG.getConstant(0, N->getValueType(0)), N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (mul x, (1 << c)) -> x << c
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && isPowerOf2_64(N1C->getValue()))
|
2005-09-01 00:19:25 +00:00
|
|
|
return DAG.getNode(ISD::SHL, N->getValueType(0), N0,
|
2005-09-02 21:18:40 +00:00
|
|
|
DAG.getConstant(Log2_64(N1C->getValue()),
|
2005-09-06 04:43:02 +00:00
|
|
|
TLI.getShiftAmountTy()));
|
2005-09-08 20:18:10 +00:00
|
|
|
// fold (mul (mul x, c1), c2) -> (mul x, c1*c2)
|
|
|
|
if (N1C && N0.getOpcode() == ISD::MUL) {
|
|
|
|
ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));
|
|
|
|
ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
|
|
|
|
if (N00C)
|
|
|
|
return DAG.getNode(ISD::MUL, VT, N0.getOperand(1),
|
|
|
|
DAG.getConstant(N1C->getValue()*N00C->getValue(), VT));
|
|
|
|
if (N01C)
|
|
|
|
return DAG.getNode(ISD::MUL, VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(N1C->getValue()*N01C->getValue(), VT));
|
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSDIV(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-10-07 06:10:46 +00:00
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (sdiv c1, c2) -> c1/c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C && !N1C->isNullValue())
|
|
|
|
return DAG.getConstant(N0C->getSignExtended() / N1C->getSignExtended(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
2005-10-07 06:10:46 +00:00
|
|
|
|
|
|
|
// If we know the sign bits of both operands are zero, strength reduce to a
|
|
|
|
// udiv instead. Handles (X&15) /s 4 -> X&15 >> 2
|
|
|
|
uint64_t SignBit = 1ULL << (MVT::getSizeInBits(VT)-1);
|
|
|
|
if (MaskedValueIsZero(N1, SignBit, TLI) &&
|
|
|
|
MaskedValueIsZero(N0, SignBit, TLI))
|
|
|
|
return DAG.getNode(ISD::UDIV, N1.getValueType(), N0, N1);
|
|
|
|
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitUDIV(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (udiv c1, c2) -> c1/c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C && !N1C->isNullValue())
|
|
|
|
return DAG.getConstant(N0C->getValue() / N1C->getValue(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (udiv x, (1 << c)) -> x >>u c
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && isPowerOf2_64(N1C->getValue()))
|
2005-09-01 00:19:25 +00:00
|
|
|
return DAG.getNode(ISD::SRL, N->getValueType(0), N0,
|
2005-09-02 21:18:40 +00:00
|
|
|
DAG.getConstant(Log2_64(N1C->getValue()),
|
2005-09-06 04:43:02 +00:00
|
|
|
TLI.getShiftAmountTy()));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSREM(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (srem c1, c2) -> c1%c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C && !N1C->isNullValue())
|
|
|
|
return DAG.getConstant(N0C->getSignExtended() % N1C->getSignExtended(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitUREM(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (urem c1, c2) -> c1%c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C && !N1C->isNullValue())
|
|
|
|
return DAG.getConstant(N0C->getValue() % N1C->getValue(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
2005-09-02 21:18:40 +00:00
|
|
|
// FIXME: c2 power of 2 -> mask?
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitMULHS(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (mulhs x, 0) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N1;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (mulhs x, 1) -> (sra x, size(x)-1)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->getValue() == 1)
|
2005-09-01 00:19:25 +00:00
|
|
|
return DAG.getNode(ISD::SRA, N0.getValueType(), N0,
|
|
|
|
DAG.getConstant(MVT::getSizeInBits(N0.getValueType())-1,
|
2005-09-06 04:43:02 +00:00
|
|
|
TLI.getShiftAmountTy()));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitMULHU(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (mulhu x, 0) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N1;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (mulhu x, 1) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->getValue() == 1)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(0, N0.getValueType());
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitAND(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-09 19:49:52 +00:00
|
|
|
SDOperand LL, LR, RL, RR, CC0, CC1;
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N1.getValueType();
|
2005-09-06 04:43:02 +00:00
|
|
|
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (and c1, c2) -> c1&c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getValue() & N1C->getValue(), VT);
|
2005-09-07 23:25:52 +00:00
|
|
|
// canonicalize constant to RHS
|
|
|
|
if (N0C && !N1C) {
|
|
|
|
std::swap(N0, N1);
|
|
|
|
std::swap(N0C, N1C);
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (and x, -1) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isAllOnesValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
|
|
|
// if (and x, c) is known to be zero, return 0
|
|
|
|
if (N1C && MaskedValueIsZero(SDOperand(N, 0), ~0ULL >> (64-OpSizeInBits),TLI))
|
|
|
|
return DAG.getConstant(0, VT);
|
|
|
|
// fold (and x, c) -> x iff (x & ~c) == 0
|
|
|
|
if (N1C && MaskedValueIsZero(N0,~N1C->getValue() & (~0ULL>>(64-OpSizeInBits)),
|
|
|
|
TLI))
|
|
|
|
return N0;
|
2005-09-08 20:18:10 +00:00
|
|
|
// fold (and (and x, c1), c2) -> (and x, c1^c2)
|
|
|
|
if (N1C && N0.getOpcode() == ISD::AND) {
|
|
|
|
ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));
|
|
|
|
ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
|
|
|
|
if (N00C)
|
|
|
|
return DAG.getNode(ISD::AND, VT, N0.getOperand(1),
|
|
|
|
DAG.getConstant(N1C->getValue()&N00C->getValue(), VT));
|
|
|
|
if (N01C)
|
|
|
|
return DAG.getNode(ISD::AND, VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(N1C->getValue()&N01C->getValue(), VT));
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (and (sign_extend_inreg x, i16 to i32), 1) -> (and x, 1)
|
|
|
|
if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG) {
|
|
|
|
unsigned ExtendBits =
|
|
|
|
MVT::getSizeInBits(cast<VTSDNode>(N0.getOperand(1))->getVT());
|
2005-09-02 21:18:40 +00:00
|
|
|
if ((N1C->getValue() & (~0ULL << ExtendBits)) == 0)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::AND, VT, N0.getOperand(0), N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
// fold (and (or x, 0xFFFF), 0xFF) -> 0xFF
|
|
|
|
if (N0.getOpcode() == ISD::OR)
|
|
|
|
if (ConstantSDNode *ORI = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
|
2005-09-02 21:18:40 +00:00
|
|
|
if ((ORI->getValue() & N1C->getValue()) == N1C->getValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N1;
|
2005-09-09 19:49:52 +00:00
|
|
|
// fold (and (setcc x), (setcc y)) -> (setcc (and x, y))
|
|
|
|
if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
|
|
|
|
ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
|
|
|
|
ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
|
|
|
|
|
|
|
|
if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
|
|
|
|
MVT::isInteger(LL.getValueType())) {
|
|
|
|
// fold (X == 0) & (Y == 0) -> (X|Y == 0)
|
|
|
|
if (cast<ConstantSDNode>(LR)->getValue() == 0 && Op1 == ISD::SETEQ) {
|
|
|
|
SDOperand ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL);
|
|
|
|
WorkList.push_back(ORNode.Val);
|
|
|
|
return DAG.getSetCC(VT, ORNode, LR, Op1);
|
|
|
|
}
|
|
|
|
// fold (X == -1) & (Y == -1) -> (X&Y == -1)
|
|
|
|
if (cast<ConstantSDNode>(LR)->isAllOnesValue() && Op1 == ISD::SETEQ) {
|
|
|
|
SDOperand ANDNode = DAG.getNode(ISD::AND, LR.getValueType(), LL, RL);
|
|
|
|
WorkList.push_back(ANDNode.Val);
|
|
|
|
return DAG.getSetCC(VT, ANDNode, LR, Op1);
|
|
|
|
}
|
|
|
|
// fold (X > -1) & (Y > -1) -> (X|Y > -1)
|
|
|
|
if (cast<ConstantSDNode>(LR)->isAllOnesValue() && Op1 == ISD::SETGT) {
|
|
|
|
SDOperand ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL);
|
|
|
|
WorkList.push_back(ORNode.Val);
|
|
|
|
return DAG.getSetCC(VT, ORNode, LR, Op1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// canonicalize equivalent to ll == rl
|
|
|
|
if (LL == RR && LR == RL) {
|
|
|
|
Op1 = ISD::getSetCCSwappedOperands(Op1);
|
|
|
|
std::swap(RL, RR);
|
|
|
|
}
|
|
|
|
if (LL == RL && LR == RR) {
|
|
|
|
bool isInteger = MVT::isInteger(LL.getValueType());
|
|
|
|
ISD::CondCode Result = ISD::getSetCCAndOperation(Op0, Op1, isInteger);
|
|
|
|
if (Result != ISD::SETCC_INVALID)
|
|
|
|
return DAG.getSetCC(N0.getValueType(), LL, LR, Result);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// fold (and (zext x), (zext y)) -> (zext (and x, y))
|
|
|
|
if (N0.getOpcode() == ISD::ZERO_EXTEND &&
|
|
|
|
N1.getOpcode() == ISD::ZERO_EXTEND &&
|
|
|
|
N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
|
|
|
|
SDOperand ANDNode = DAG.getNode(ISD::AND, N0.getOperand(0).getValueType(),
|
|
|
|
N0.getOperand(0), N1.getOperand(0));
|
|
|
|
WorkList.push_back(ANDNode.Val);
|
|
|
|
return DAG.getNode(ISD::ZERO_EXTEND, VT, ANDNode);
|
|
|
|
}
|
2005-09-16 00:54:12 +00:00
|
|
|
// fold (and (shl/srl x), (shl/srl y)) -> (shl/srl (and x, y))
|
|
|
|
if (((N0.getOpcode() == ISD::SHL && N1.getOpcode() == ISD::SHL) ||
|
|
|
|
(N0.getOpcode() == ISD::SRL && N1.getOpcode() == ISD::SRL)) &&
|
|
|
|
N0.getOperand(1) == N1.getOperand(1)) {
|
|
|
|
SDOperand ANDNode = DAG.getNode(ISD::AND, N0.getOperand(0).getValueType(),
|
|
|
|
N0.getOperand(0), N1.getOperand(0));
|
|
|
|
WorkList.push_back(ANDNode.Val);
|
|
|
|
return DAG.getNode(N0.getOpcode(), VT, ANDNode, N0.getOperand(1));
|
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitOR(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-09 19:49:52 +00:00
|
|
|
SDOperand LL, LR, RL, RR, CC0, CC1;
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-06 04:43:02 +00:00
|
|
|
MVT::ValueType VT = N1.getValueType();
|
|
|
|
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (or c1, c2) -> c1|c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
|
|
|
return DAG.getConstant(N0C->getValue() | N1C->getValue(),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getValueType(0));
|
2005-09-07 23:25:52 +00:00
|
|
|
// canonicalize constant to RHS
|
|
|
|
if (N0C && !N1C) {
|
|
|
|
std::swap(N0, N1);
|
|
|
|
std::swap(N0C, N1C);
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (or x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (or x, -1) -> -1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isAllOnesValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N1;
|
|
|
|
// fold (or x, c) -> c iff (x & ~c) == 0
|
|
|
|
if (N1C && MaskedValueIsZero(N0,~N1C->getValue() & (~0ULL>>(64-OpSizeInBits)),
|
|
|
|
TLI))
|
|
|
|
return N1;
|
2005-09-08 20:18:10 +00:00
|
|
|
// fold (or (or x, c1), c2) -> (or x, c1|c2)
|
|
|
|
if (N1C && N0.getOpcode() == ISD::OR) {
|
|
|
|
ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));
|
|
|
|
ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
|
|
|
|
if (N00C)
|
|
|
|
return DAG.getNode(ISD::OR, VT, N0.getOperand(1),
|
|
|
|
DAG.getConstant(N1C->getValue()|N00C->getValue(), VT));
|
|
|
|
if (N01C)
|
|
|
|
return DAG.getNode(ISD::OR, VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(N1C->getValue()|N01C->getValue(), VT));
|
|
|
|
}
|
2005-09-09 19:49:52 +00:00
|
|
|
// fold (or (setcc x), (setcc y)) -> (setcc (or x, y))
|
|
|
|
if (isSetCCEquivalent(N0, LL, LR, CC0) && isSetCCEquivalent(N1, RL, RR, CC1)){
|
|
|
|
ISD::CondCode Op0 = cast<CondCodeSDNode>(CC0)->get();
|
|
|
|
ISD::CondCode Op1 = cast<CondCodeSDNode>(CC1)->get();
|
|
|
|
|
|
|
|
if (LR == RR && isa<ConstantSDNode>(LR) && Op0 == Op1 &&
|
|
|
|
MVT::isInteger(LL.getValueType())) {
|
|
|
|
// fold (X != 0) | (Y != 0) -> (X|Y != 0)
|
|
|
|
// fold (X < 0) | (Y < 0) -> (X|Y < 0)
|
|
|
|
if (cast<ConstantSDNode>(LR)->getValue() == 0 &&
|
|
|
|
(Op1 == ISD::SETNE || Op1 == ISD::SETLT)) {
|
|
|
|
SDOperand ORNode = DAG.getNode(ISD::OR, LR.getValueType(), LL, RL);
|
|
|
|
WorkList.push_back(ORNode.Val);
|
|
|
|
return DAG.getSetCC(VT, ORNode, LR, Op1);
|
|
|
|
}
|
|
|
|
// fold (X != -1) | (Y != -1) -> (X&Y != -1)
|
|
|
|
// fold (X > -1) | (Y > -1) -> (X&Y > -1)
|
|
|
|
if (cast<ConstantSDNode>(LR)->isAllOnesValue() &&
|
|
|
|
(Op1 == ISD::SETNE || Op1 == ISD::SETGT)) {
|
|
|
|
SDOperand ANDNode = DAG.getNode(ISD::AND, LR.getValueType(), LL, RL);
|
|
|
|
WorkList.push_back(ANDNode.Val);
|
|
|
|
return DAG.getSetCC(VT, ANDNode, LR, Op1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// canonicalize equivalent to ll == rl
|
|
|
|
if (LL == RR && LR == RL) {
|
|
|
|
Op1 = ISD::getSetCCSwappedOperands(Op1);
|
|
|
|
std::swap(RL, RR);
|
|
|
|
}
|
|
|
|
if (LL == RL && LR == RR) {
|
|
|
|
bool isInteger = MVT::isInteger(LL.getValueType());
|
|
|
|
ISD::CondCode Result = ISD::getSetCCOrOperation(Op0, Op1, isInteger);
|
|
|
|
if (Result != ISD::SETCC_INVALID)
|
|
|
|
return DAG.getSetCC(N0.getValueType(), LL, LR, Result);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
// fold (or (zext x), (zext y)) -> (zext (or x, y))
|
|
|
|
if (N0.getOpcode() == ISD::ZERO_EXTEND &&
|
|
|
|
N1.getOpcode() == ISD::ZERO_EXTEND &&
|
|
|
|
N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
|
|
|
|
SDOperand ORNode = DAG.getNode(ISD::OR, N0.getOperand(0).getValueType(),
|
|
|
|
N0.getOperand(0), N1.getOperand(0));
|
|
|
|
WorkList.push_back(ORNode.Val);
|
|
|
|
return DAG.getNode(ISD::ZERO_EXTEND, VT, ORNode);
|
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitXOR(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
SDOperand LHS, RHS, CC;
|
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N0.getValueType();
|
|
|
|
|
|
|
|
// fold (xor c1, c2) -> c1^c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getValue() ^ N1C->getValue(), VT);
|
2005-09-07 23:25:52 +00:00
|
|
|
// canonicalize constant to RHS
|
|
|
|
if (N0C && !N1C) {
|
|
|
|
std::swap(N0, N1);
|
|
|
|
std::swap(N0C, N1C);
|
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (xor x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold !(x cc y) -> (x !cc y)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->getValue() == 1 && isSetCCEquivalent(N0, LHS, RHS, CC)) {
|
|
|
|
bool isInt = MVT::isInteger(LHS.getValueType());
|
|
|
|
ISD::CondCode NotCC = ISD::getSetCCInverse(cast<CondCodeSDNode>(CC)->get(),
|
|
|
|
isInt);
|
|
|
|
if (N0.getOpcode() == ISD::SETCC)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getSetCC(VT, LHS, RHS, NotCC);
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0.getOpcode() == ISD::SELECT_CC)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getSelectCC(LHS, RHS, N0.getOperand(2),N0.getOperand(3),NotCC);
|
2005-09-02 21:18:40 +00:00
|
|
|
assert(0 && "Unhandled SetCC Equivalent!");
|
|
|
|
abort();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-07 23:25:52 +00:00
|
|
|
// fold !(x or y) -> (!x and !y) iff x or y are setcc
|
|
|
|
if (N1C && N1C->getValue() == 1 &&
|
|
|
|
(N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1);
|
2005-09-07 23:25:52 +00:00
|
|
|
if (isOneUseSetCC(RHS) || isOneUseSetCC(LHS)) {
|
|
|
|
unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND;
|
2005-09-01 00:19:25 +00:00
|
|
|
LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS
|
|
|
|
RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS
|
2005-09-07 23:25:52 +00:00
|
|
|
WorkList.push_back(LHS.Val); WorkList.push_back(RHS.Val);
|
|
|
|
return DAG.getNode(NewOpcode, VT, LHS, RHS);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
}
|
2005-09-07 23:25:52 +00:00
|
|
|
// fold !(x or y) -> (!x and !y) iff x or y are constants
|
|
|
|
if (N1C && N1C->isAllOnesValue() &&
|
|
|
|
(N0.getOpcode() == ISD::OR || N0.getOpcode() == ISD::AND)) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand LHS = N0.getOperand(0), RHS = N0.getOperand(1);
|
2005-09-07 23:25:52 +00:00
|
|
|
if (isa<ConstantSDNode>(RHS) || isa<ConstantSDNode>(LHS)) {
|
|
|
|
unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND;
|
2005-09-01 00:19:25 +00:00
|
|
|
LHS = DAG.getNode(ISD::XOR, VT, LHS, N1); // RHS = ~LHS
|
|
|
|
RHS = DAG.getNode(ISD::XOR, VT, RHS, N1); // RHS = ~RHS
|
2005-09-07 23:25:52 +00:00
|
|
|
WorkList.push_back(LHS.Val); WorkList.push_back(RHS.Val);
|
|
|
|
return DAG.getNode(NewOpcode, VT, LHS, RHS);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
}
|
2005-09-08 20:18:10 +00:00
|
|
|
// fold (xor (xor x, c1), c2) -> (xor x, c1^c2)
|
|
|
|
if (N1C && N0.getOpcode() == ISD::XOR) {
|
|
|
|
ConstantSDNode *N00C = dyn_cast<ConstantSDNode>(N0.getOperand(0));
|
|
|
|
ConstantSDNode *N01C = dyn_cast<ConstantSDNode>(N0.getOperand(1));
|
|
|
|
if (N00C)
|
|
|
|
return DAG.getNode(ISD::XOR, VT, N0.getOperand(1),
|
|
|
|
DAG.getConstant(N1C->getValue()^N00C->getValue(), VT));
|
|
|
|
if (N01C)
|
|
|
|
return DAG.getNode(ISD::XOR, VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(N1C->getValue()^N01C->getValue(), VT));
|
|
|
|
}
|
|
|
|
// fold (xor x, x) -> 0
|
|
|
|
if (N0 == N1)
|
|
|
|
return DAG.getConstant(0, VT);
|
2005-09-09 19:49:52 +00:00
|
|
|
// fold (xor (zext x), (zext y)) -> (zext (xor x, y))
|
|
|
|
if (N0.getOpcode() == ISD::ZERO_EXTEND &&
|
|
|
|
N1.getOpcode() == ISD::ZERO_EXTEND &&
|
|
|
|
N0.getOperand(0).getValueType() == N1.getOperand(0).getValueType()) {
|
|
|
|
SDOperand XORNode = DAG.getNode(ISD::XOR, N0.getOperand(0).getValueType(),
|
|
|
|
N0.getOperand(0), N1.getOperand(0));
|
|
|
|
WorkList.push_back(XORNode.Val);
|
|
|
|
return DAG.getNode(ISD::ZERO_EXTEND, VT, XORNode);
|
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSHL(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N0.getValueType();
|
|
|
|
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
|
|
|
|
|
|
|
|
// fold (shl c1, c2) -> c1<<c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getValue() << N1C->getValue(), VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (shl 0, x) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N0C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (shl x, c >= size(x)) -> undef
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->getValue() >= OpSizeInBits)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::UNDEF, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (shl x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// if (shl x, c) is known to be zero, return 0
|
2005-09-06 04:43:02 +00:00
|
|
|
if (N1C && MaskedValueIsZero(SDOperand(N, 0), ~0ULL >> (64-OpSizeInBits),TLI))
|
|
|
|
return DAG.getConstant(0, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (shl (shl x, c1), c2) -> 0 or (shl x, c1+c2)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N0.getOpcode() == ISD::SHL &&
|
2005-09-01 00:19:25 +00:00
|
|
|
N0.getOperand(1).getOpcode() == ISD::Constant) {
|
|
|
|
uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
|
2005-09-02 21:18:40 +00:00
|
|
|
uint64_t c2 = N1C->getValue();
|
2005-09-01 00:19:25 +00:00
|
|
|
if (c1 + c2 > OpSizeInBits)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(0, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
return DAG.getNode(ISD::SHL, VT, N0.getOperand(0),
|
2005-09-06 04:43:02 +00:00
|
|
|
DAG.getConstant(c1 + c2, N1.getValueType()));
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
// fold (shl (srl x, c1), c2) -> (shl (and x, -1 << c1), c2-c1) or
|
|
|
|
// (srl (and x, -1 << c1), c1-c2)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N0.getOpcode() == ISD::SRL &&
|
2005-09-01 00:19:25 +00:00
|
|
|
N0.getOperand(1).getOpcode() == ISD::Constant) {
|
|
|
|
uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
|
2005-09-02 21:18:40 +00:00
|
|
|
uint64_t c2 = N1C->getValue();
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand Mask = DAG.getNode(ISD::AND, VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(~0ULL << c1, VT));
|
|
|
|
if (c2 > c1)
|
|
|
|
return DAG.getNode(ISD::SHL, VT, Mask,
|
2005-09-06 04:43:02 +00:00
|
|
|
DAG.getConstant(c2-c1, N1.getValueType()));
|
2005-09-01 00:19:25 +00:00
|
|
|
else
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::SRL, VT, Mask,
|
|
|
|
DAG.getConstant(c1-c2, N1.getValueType()));
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
// fold (shl (sra x, c1), c1) -> (and x, -1 << c1)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N0.getOpcode() == ISD::SRA && N1 == N0.getOperand(1))
|
2005-09-01 23:24:04 +00:00
|
|
|
return DAG.getNode(ISD::AND, VT, N0.getOperand(0),
|
2005-09-06 04:43:02 +00:00
|
|
|
DAG.getConstant(~0ULL << N1C->getValue(), VT));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSRA(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N0.getValueType();
|
|
|
|
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
|
|
|
|
|
|
|
|
// fold (sra c1, c2) -> c1>>c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getSignExtended() >> N1C->getValue(), VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sra 0, x) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N0C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sra -1, x) -> -1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N0C->isAllOnesValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sra x, c >= size(x)) -> undef
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->getValue() >= OpSizeInBits)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::UNDEF, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sra x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// If the sign bit is known to be zero, switch this to a SRL.
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && MaskedValueIsZero(N0, (1ULL << (OpSizeInBits-1)), TLI))
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::SRL, VT, N0, N1);
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSRL(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N0.getValueType();
|
|
|
|
unsigned OpSizeInBits = MVT::getSizeInBits(VT);
|
|
|
|
|
|
|
|
// fold (srl c1, c2) -> c1 >>u c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N1C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getValue() >> N1C->getValue(), VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (srl 0, x) -> 0
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C && N0C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (srl x, c >= size(x)) -> undef
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->getValue() >= OpSizeInBits)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::UNDEF, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (srl x, 0) -> x
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N1C->isNullValue())
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// if (srl x, c) is known to be zero, return 0
|
2005-09-06 04:43:02 +00:00
|
|
|
if (N1C && MaskedValueIsZero(SDOperand(N, 0), ~0ULL >> (64-OpSizeInBits),TLI))
|
|
|
|
return DAG.getConstant(0, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (srl (srl x, c1), c2) -> 0 or (srl x, c1+c2)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N1C && N0.getOpcode() == ISD::SRL &&
|
2005-09-01 00:19:25 +00:00
|
|
|
N0.getOperand(1).getOpcode() == ISD::Constant) {
|
|
|
|
uint64_t c1 = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
|
2005-09-02 21:18:40 +00:00
|
|
|
uint64_t c2 = N1C->getValue();
|
2005-09-01 00:19:25 +00:00
|
|
|
if (c1 + c2 > OpSizeInBits)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(0, VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
return DAG.getNode(ISD::SRL, VT, N0.getOperand(0),
|
2005-09-06 04:43:02 +00:00
|
|
|
DAG.getConstant(c1 + c2, N1.getValueType()));
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitCTLZ(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (ctlz c1) -> c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
|
|
|
return DAG.getConstant(CountLeadingZeros_64(N0C->getValue()),
|
2005-09-06 04:43:02 +00:00
|
|
|
N0.getValueType());
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitCTTZ(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (cttz c1) -> c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
|
|
|
return DAG.getConstant(CountTrailingZeros_64(N0C->getValue()),
|
2005-09-06 04:43:02 +00:00
|
|
|
N0.getValueType());
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitCTPOP(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (ctpop c1) -> c2
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
|
|
|
return DAG.getConstant(CountPopulation_64(N0C->getValue()),
|
2005-09-06 04:43:02 +00:00
|
|
|
N0.getValueType());
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-16 00:54:12 +00:00
|
|
|
SDOperand DAGCombiner::visitSELECT(SDNode *N) {
|
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
SDOperand N2 = N->getOperand(2);
|
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
|
|
|
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
2005-09-19 22:34:01 +00:00
|
|
|
|
2005-09-16 00:54:12 +00:00
|
|
|
// fold select C, X, X -> X
|
|
|
|
if (N1 == N2)
|
|
|
|
return N1;
|
|
|
|
// fold select true, X, Y -> X
|
|
|
|
if (N0C && !N0C->isNullValue())
|
|
|
|
return N1;
|
|
|
|
// fold select false, X, Y -> Y
|
|
|
|
if (N0C && N0C->isNullValue())
|
|
|
|
return N2;
|
|
|
|
// fold select C, 1, X -> C | X
|
2005-09-19 22:34:01 +00:00
|
|
|
if (MVT::i1 == VT && N1C && N1C->getValue() == 1)
|
2005-09-16 00:54:12 +00:00
|
|
|
return DAG.getNode(ISD::OR, VT, N0, N2);
|
|
|
|
// fold select C, 0, X -> ~C & X
|
|
|
|
// FIXME: this should check for C type == X type, not i1?
|
|
|
|
if (MVT::i1 == VT && N1C && N1C->isNullValue()) {
|
|
|
|
SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
|
|
|
|
WorkList.push_back(XORNode.Val);
|
|
|
|
return DAG.getNode(ISD::AND, VT, XORNode, N2);
|
|
|
|
}
|
|
|
|
// fold select C, X, 1 -> ~C | X
|
2005-09-19 22:34:01 +00:00
|
|
|
if (MVT::i1 == VT && N2C && N2C->getValue() == 1) {
|
2005-09-16 00:54:12 +00:00
|
|
|
SDOperand XORNode = DAG.getNode(ISD::XOR, VT, N0, DAG.getConstant(1, VT));
|
|
|
|
WorkList.push_back(XORNode.Val);
|
|
|
|
return DAG.getNode(ISD::OR, VT, XORNode, N1);
|
|
|
|
}
|
|
|
|
// fold select C, X, 0 -> C & X
|
|
|
|
// FIXME: this should check for C type == X type, not i1?
|
|
|
|
if (MVT::i1 == VT && N2C && N2C->isNullValue())
|
|
|
|
return DAG.getNode(ISD::AND, VT, N0, N1);
|
|
|
|
// fold X ? X : Y --> X ? 1 : Y --> X | Y
|
|
|
|
if (MVT::i1 == VT && N0 == N1)
|
|
|
|
return DAG.getNode(ISD::OR, VT, N0, N2);
|
|
|
|
// fold X ? Y : X --> X ? Y : 0 --> X & Y
|
|
|
|
if (MVT::i1 == VT && N0 == N2)
|
|
|
|
return DAG.getNode(ISD::AND, VT, N0, N1);
|
2005-09-19 22:34:01 +00:00
|
|
|
// fold selects based on a setcc into other things, such as min/max/abs
|
|
|
|
if (N0.getOpcode() == ISD::SETCC)
|
|
|
|
return SimplifySelect(N0, N1, N2);
|
2005-09-16 00:54:12 +00:00
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitSELECT_CC(SDNode *N) {
|
2005-09-19 22:34:01 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
SDOperand N2 = N->getOperand(2);
|
|
|
|
SDOperand N3 = N->getOperand(3);
|
|
|
|
SDOperand N4 = N->getOperand(4);
|
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
|
|
|
ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
|
|
|
|
ISD::CondCode CC = cast<CondCodeSDNode>(N4)->get();
|
|
|
|
|
|
|
|
// Determine if the condition we're dealing with is constant
|
2005-10-05 21:43:42 +00:00
|
|
|
SDOperand SCC = SimplifySetCC(TLI.getSetCCResultTy(), N0, N1, CC, false);
|
2005-10-05 04:45:43 +00:00
|
|
|
ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.Val);
|
|
|
|
|
2005-09-19 22:34:01 +00:00
|
|
|
// fold select_cc lhs, rhs, x, x, cc -> x
|
|
|
|
if (N2 == N3)
|
|
|
|
return N2;
|
|
|
|
// fold select_cc true, x, y -> x
|
2005-10-05 04:45:43 +00:00
|
|
|
if (SCCC && SCCC->getValue())
|
2005-09-19 22:34:01 +00:00
|
|
|
return N2;
|
|
|
|
// fold select_cc false, x, y -> y
|
2005-10-05 04:45:43 +00:00
|
|
|
if (SCCC && SCCC->getValue() == 0)
|
2005-09-19 22:34:01 +00:00
|
|
|
return N3;
|
|
|
|
// fold select_cc into other things, such as min/max/abs
|
|
|
|
return SimplifySelectCC(N0, N1, N2, N3, CC);
|
2005-09-16 00:54:12 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitSETCC(SDNode *N) {
|
|
|
|
return SimplifySetCC(N->getValueType(0), N->getOperand(0), N->getOperand(1),
|
|
|
|
cast<CondCodeSDNode>(N->getOperand(2))->get());
|
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSIGN_EXTEND(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
// fold (sext c1) -> c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getSignExtended(), VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sext (sext x)) -> (sext x)
|
|
|
|
if (N0.getOpcode() == ISD::SIGN_EXTEND)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::SIGN_EXTEND, VT, N0.getOperand(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitZERO_EXTEND(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
// fold (zext c1) -> c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getValue(), VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (zext (zext x)) -> (zext x)
|
|
|
|
if (N0.getOpcode() == ISD::ZERO_EXTEND)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::ZERO_EXTEND, VT, N0.getOperand(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSIGN_EXTEND_INREG(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
MVT::ValueType EVT = cast<VTSDNode>(N1)->getVT();
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (sext_in_reg c1) -> c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C) {
|
|
|
|
SDOperand Truncate = DAG.getConstant(N0C->getValue(), EVT);
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::SIGN_EXTEND, VT, Truncate);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-02 21:18:40 +00:00
|
|
|
// fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt1
|
2005-09-01 00:19:25 +00:00
|
|
|
if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
|
2005-09-02 21:18:40 +00:00
|
|
|
cast<VTSDNode>(N0.getOperand(1))->getVT() < EVT) {
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-02 21:18:40 +00:00
|
|
|
// fold (sext_in_reg (sext_in_reg x, VT2), VT1) -> (sext_in_reg x, minVT) pt2
|
|
|
|
if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
|
|
|
|
EVT < cast<VTSDNode>(N0.getOperand(1))->getVT()) {
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::SIGN_EXTEND_INREG, VT, N0.getOperand(0), N1);
|
2005-09-02 21:18:40 +00:00
|
|
|
}
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (sext_in_reg (assert_sext x)) -> (assert_sext x)
|
|
|
|
if (N0.getOpcode() == ISD::AssertSext &&
|
|
|
|
cast<VTSDNode>(N0.getOperand(1))->getVT() <= EVT) {
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
// fold (sext_in_reg (sextload x)) -> (sextload x)
|
|
|
|
if (N0.getOpcode() == ISD::SEXTLOAD &&
|
|
|
|
cast<VTSDNode>(N0.getOperand(3))->getVT() <= EVT) {
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-01 23:24:04 +00:00
|
|
|
// fold (sext_in_reg (setcc x)) -> setcc x iff (setcc x) == 0 or -1
|
2005-09-02 21:18:40 +00:00
|
|
|
// FIXME: teach isSetCCEquivalent about 0, -1 and then use it here
|
2005-09-01 00:19:25 +00:00
|
|
|
if (N0.getOpcode() == ISD::SETCC &&
|
|
|
|
TLI.getSetCCResultContents() ==
|
|
|
|
TargetLowering::ZeroOrNegativeOneSetCCResult)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// FIXME: this code is currently just ported over from SelectionDAG.cpp
|
|
|
|
// we probably actually want to handle this in two pieces. Rather than
|
|
|
|
// checking all the top bits for zero, just check the sign bit here and turn
|
|
|
|
// it into a zero extend inreg (AND with constant).
|
|
|
|
// then, let the code for AND figure out if the mask is superfluous rather
|
|
|
|
// than doing so here.
|
|
|
|
if (N0.getOpcode() == ISD::AND &&
|
|
|
|
N0.getOperand(1).getOpcode() == ISD::Constant) {
|
|
|
|
uint64_t Mask = cast<ConstantSDNode>(N0.getOperand(1))->getValue();
|
|
|
|
unsigned NumBits = MVT::getSizeInBits(EVT);
|
|
|
|
if ((Mask & (~0ULL << (NumBits-1))) == 0)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitTRUNCATE(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
// noop truncate
|
|
|
|
if (N0.getValueType() == N->getValueType(0))
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0;
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (truncate c1) -> c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant(N0C->getValue(), VT);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (truncate (truncate x)) -> (truncate x)
|
|
|
|
if (N0.getOpcode() == ISD::TRUNCATE)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::TRUNCATE, VT, N0.getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (truncate (ext x)) -> (ext x) or (truncate x) or x
|
|
|
|
if (N0.getOpcode() == ISD::ZERO_EXTEND || N0.getOpcode() == ISD::SIGN_EXTEND){
|
|
|
|
if (N0.getValueType() < VT)
|
|
|
|
// if the source is smaller than the dest, we still need an extend
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(N0.getOpcode(), VT, N0.getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
else if (N0.getValueType() > VT)
|
|
|
|
// if the source is larger than the dest, than we just need the truncate
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::TRUNCATE, VT, N0.getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
else
|
|
|
|
// if the source and dest are the same type, we can drop both the extend
|
|
|
|
// and the truncate
|
2005-09-06 04:43:02 +00:00
|
|
|
return N0.getOperand(0);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-28 22:28:18 +00:00
|
|
|
SDOperand DAGCombiner::visitFADD(SDNode *N) {
|
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0))
|
|
|
|
if (ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
|
|
|
// fold floating point (fadd c1, c2)
|
|
|
|
return DAG.getConstantFP(N0CFP->getValue() + N1CFP->getValue(),
|
|
|
|
N->getValueType(0));
|
|
|
|
}
|
|
|
|
// fold (A + (-B)) -> A-B
|
|
|
|
if (N1.getOpcode() == ISD::FNEG)
|
|
|
|
return DAG.getNode(ISD::FSUB, VT, N0, N1.getOperand(0));
|
|
|
|
|
|
|
|
// fold ((-A) + B) -> B-A
|
|
|
|
if (N0.getOpcode() == ISD::FNEG)
|
|
|
|
return DAG.getNode(ISD::FSUB, VT, N1, N0.getOperand(0));
|
|
|
|
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitFSUB(SDNode *N) {
|
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0))
|
|
|
|
if (ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
|
|
|
// fold floating point (fsub c1, c2)
|
|
|
|
return DAG.getConstantFP(N0CFP->getValue() - N1CFP->getValue(),
|
|
|
|
N->getValueType(0));
|
|
|
|
}
|
|
|
|
// fold (A-(-B)) -> A+B
|
|
|
|
if (N1.getOpcode() == ISD::FNEG)
|
|
|
|
return DAG.getNode(ISD::FADD, N0.getValueType(), N0, N1.getOperand(0));
|
|
|
|
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitFMUL(SDNode *N) {
|
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0))
|
|
|
|
if (ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
|
|
|
// fold floating point (fmul c1, c2)
|
|
|
|
return DAG.getConstantFP(N0CFP->getValue() * N1CFP->getValue(),
|
|
|
|
N->getValueType(0));
|
|
|
|
}
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitFDIV(SDNode *N) {
|
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0))
|
|
|
|
if (ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
|
|
|
// fold floating point (fdiv c1, c2)
|
|
|
|
return DAG.getConstantFP(N0CFP->getValue() / N1CFP->getValue(),
|
|
|
|
N->getValueType(0));
|
|
|
|
}
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitFREM(SDNode *N) {
|
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
|
|
|
|
if (ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0))
|
|
|
|
if (ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1)) {
|
|
|
|
// fold floating point (frem c1, c2) -> fmod(c1, c2)
|
|
|
|
return DAG.getConstantFP(fmod(N0CFP->getValue(),N1CFP->getValue()),
|
|
|
|
N->getValueType(0));
|
|
|
|
}
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitSINT_TO_FP(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (sint_to_fp c1) -> c1fp
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstantFP(N0C->getSignExtended(), N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitUINT_TO_FP(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (uint_to_fp c1) -> c1fp
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0C)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstantFP(N0C->getValue(), N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFP_TO_SINT(SDNode *N) {
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (fp_to_sint c1fp) -> c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant((int64_t)N0CFP->getValue(), N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFP_TO_UINT(SDNode *N) {
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (fp_to_uint c1fp) -> c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstant((uint64_t)N0CFP->getValue(), N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFP_ROUND(SDNode *N) {
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (fp_round c1fp) -> c1fp
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstantFP(N0CFP->getValue(), N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFP_ROUND_INREG(SDNode *N) {
|
2005-09-01 00:19:25 +00:00
|
|
|
SDOperand N0 = N->getOperand(0);
|
|
|
|
MVT::ValueType VT = N->getValueType(0);
|
|
|
|
MVT::ValueType EVT = cast<VTSDNode>(N->getOperand(1))->getVT();
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N0);
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (fp_round_inreg c1fp) -> c1fp
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP) {
|
|
|
|
SDOperand Round = DAG.getConstantFP(N0CFP->getValue(), EVT);
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getNode(ISD::FP_EXTEND, VT, Round);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
2005-09-06 04:43:02 +00:00
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFP_EXTEND(SDNode *N) {
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
|
|
|
|
// fold (fp_extend c1fp) -> c1fp
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstantFP(N0CFP->getValue(), N->getValueType(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFNEG(SDNode *N) {
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (neg c1) -> -c1
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstantFP(-N0CFP->getValue(), N->getValueType(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (neg (sub x, y)) -> (sub y, x)
|
|
|
|
if (N->getOperand(0).getOpcode() == ISD::SUB)
|
|
|
|
return DAG.getNode(ISD::SUB, N->getValueType(0), N->getOperand(1),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (neg (neg x)) -> x
|
|
|
|
if (N->getOperand(0).getOpcode() == ISD::FNEG)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N->getOperand(0).getOperand(0);
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-06 04:43:02 +00:00
|
|
|
SDOperand DAGCombiner::visitFABS(SDNode *N) {
|
2005-09-02 21:18:40 +00:00
|
|
|
ConstantFPSDNode *N0CFP = dyn_cast<ConstantFPSDNode>(N->getOperand(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (fabs c1) -> fabs(c1)
|
2005-09-02 21:18:40 +00:00
|
|
|
if (N0CFP)
|
2005-09-06 04:43:02 +00:00
|
|
|
return DAG.getConstantFP(fabs(N0CFP->getValue()), N->getValueType(0));
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (fabs (fabs x)) -> (fabs x)
|
|
|
|
if (N->getOperand(0).getOpcode() == ISD::FABS)
|
2005-09-06 04:43:02 +00:00
|
|
|
return N->getOperand(0);
|
2005-09-01 00:19:25 +00:00
|
|
|
// fold (fabs (fneg x)) -> (fabs x)
|
|
|
|
if (N->getOperand(0).getOpcode() == ISD::FNEG)
|
|
|
|
return DAG.getNode(ISD::FABS, N->getValueType(0),
|
2005-09-06 04:43:02 +00:00
|
|
|
N->getOperand(0).getOperand(0));
|
|
|
|
return SDOperand();
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|
|
|
|
|
2005-09-19 22:34:01 +00:00
|
|
|
SDOperand DAGCombiner::visitBRCOND(SDNode *N) {
|
|
|
|
SDOperand Chain = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
SDOperand N2 = N->getOperand(2);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
|
|
|
|
|
|
|
// never taken branch, fold to chain
|
|
|
|
if (N1C && N1C->isNullValue())
|
|
|
|
return Chain;
|
|
|
|
// unconditional branch
|
2005-10-05 21:43:42 +00:00
|
|
|
if (N1C && N1C->getValue() == 1)
|
2005-09-19 22:34:01 +00:00
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, Chain, N2);
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitBRCONDTWOWAY(SDNode *N) {
|
|
|
|
SDOperand Chain = N->getOperand(0);
|
|
|
|
SDOperand N1 = N->getOperand(1);
|
|
|
|
SDOperand N2 = N->getOperand(2);
|
|
|
|
SDOperand N3 = N->getOperand(3);
|
|
|
|
ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
|
|
|
|
|
|
|
|
// unconditional branch to true mbb
|
|
|
|
if (N1C && N1C->getValue() == 1)
|
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, Chain, N2);
|
|
|
|
// unconditional branch to false mbb
|
|
|
|
if (N1C && N1C->isNullValue())
|
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, Chain, N3);
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
2005-10-05 06:47:48 +00:00
|
|
|
// Operand List for BR_CC: Chain, CondCC, CondLHS, CondRHS, DestBB.
|
|
|
|
//
|
2005-09-19 22:34:01 +00:00
|
|
|
SDOperand DAGCombiner::visitBR_CC(SDNode *N) {
|
2005-10-05 06:47:48 +00:00
|
|
|
CondCodeSDNode *CC = cast<CondCodeSDNode>(N->getOperand(1));
|
|
|
|
SDOperand CondLHS = N->getOperand(2), CondRHS = N->getOperand(3);
|
|
|
|
|
|
|
|
// Use SimplifySetCC to simplify SETCC's.
|
2005-10-05 21:43:42 +00:00
|
|
|
SDOperand Simp = SimplifySetCC(MVT::i1, CondLHS, CondRHS, CC->get(), false);
|
|
|
|
ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(Simp.Val);
|
|
|
|
|
|
|
|
// fold br_cc true, dest -> br dest (unconditional branch)
|
|
|
|
if (SCCC && SCCC->getValue())
|
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, N->getOperand(0),
|
|
|
|
N->getOperand(4));
|
|
|
|
// fold br_cc false, dest -> unconditional fall through
|
|
|
|
if (SCCC && SCCC->isNullValue())
|
|
|
|
return N->getOperand(0);
|
|
|
|
// fold to a simpler setcc
|
|
|
|
if (Simp.Val && Simp.getOpcode() == ISD::SETCC)
|
|
|
|
return DAG.getNode(ISD::BR_CC, MVT::Other, N->getOperand(0),
|
|
|
|
Simp.getOperand(2), Simp.getOperand(0),
|
|
|
|
Simp.getOperand(1), N->getOperand(4));
|
2005-09-19 22:34:01 +00:00
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::visitBRTWOWAY_CC(SDNode *N) {
|
2005-10-05 21:43:42 +00:00
|
|
|
SDOperand Chain = N->getOperand(0);
|
|
|
|
SDOperand CCN = N->getOperand(1);
|
|
|
|
SDOperand LHS = N->getOperand(2);
|
|
|
|
SDOperand RHS = N->getOperand(3);
|
|
|
|
SDOperand N4 = N->getOperand(4);
|
|
|
|
SDOperand N5 = N->getOperand(5);
|
|
|
|
|
|
|
|
SDOperand SCC = SimplifySetCC(TLI.getSetCCResultTy(), LHS, RHS,
|
|
|
|
cast<CondCodeSDNode>(CCN)->get(), false);
|
|
|
|
ConstantSDNode *SCCC = dyn_cast_or_null<ConstantSDNode>(SCC.Val);
|
|
|
|
|
|
|
|
// fold select_cc lhs, rhs, x, x, cc -> x
|
|
|
|
if (N4 == N5)
|
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, Chain, N4);
|
|
|
|
// fold select_cc true, x, y -> x
|
|
|
|
if (SCCC && SCCC->getValue())
|
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, Chain, N4);
|
|
|
|
// fold select_cc false, x, y -> y
|
|
|
|
if (SCCC && SCCC->isNullValue())
|
|
|
|
return DAG.getNode(ISD::BR, MVT::Other, Chain, N5);
|
|
|
|
// fold to a simpler setcc
|
|
|
|
if (SCC.Val && SCC.getOpcode() == ISD::SETCC)
|
|
|
|
return DAG.getBR2Way_CC(Chain, SCC.getOperand(2), SCC.getOperand(0),
|
|
|
|
SCC.getOperand(1), N4, N5);
|
2005-09-19 22:34:01 +00:00
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::SimplifySelect(SDOperand N0, SDOperand N1, SDOperand N2){
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
|
|
|
SDOperand DAGCombiner::SimplifySelectCC(SDOperand N0, SDOperand N1,
|
|
|
|
SDOperand N2, SDOperand N3,
|
|
|
|
ISD::CondCode CC) {
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
2005-09-16 00:54:12 +00:00
|
|
|
SDOperand DAGCombiner::SimplifySetCC(MVT::ValueType VT, SDOperand N0,
|
2005-10-05 21:43:42 +00:00
|
|
|
SDOperand N1, ISD::CondCode Cond,
|
|
|
|
bool foldBooleans) {
|
2005-09-16 00:54:12 +00:00
|
|
|
// These setcc operations always fold.
|
|
|
|
switch (Cond) {
|
|
|
|
default: break;
|
|
|
|
case ISD::SETFALSE:
|
|
|
|
case ISD::SETFALSE2: return DAG.getConstant(0, VT);
|
|
|
|
case ISD::SETTRUE:
|
|
|
|
case ISD::SETTRUE2: return DAG.getConstant(1, VT);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1.Val)) {
|
|
|
|
uint64_t C1 = N1C->getValue();
|
|
|
|
if (ConstantSDNode *N0C = dyn_cast<ConstantSDNode>(N0.Val)) {
|
|
|
|
uint64_t C0 = N0C->getValue();
|
|
|
|
|
|
|
|
// Sign extend the operands if required
|
|
|
|
if (ISD::isSignedIntSetCC(Cond)) {
|
|
|
|
C0 = N0C->getSignExtended();
|
|
|
|
C1 = N1C->getSignExtended();
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (Cond) {
|
|
|
|
default: assert(0 && "Unknown integer setcc!");
|
|
|
|
case ISD::SETEQ: return DAG.getConstant(C0 == C1, VT);
|
|
|
|
case ISD::SETNE: return DAG.getConstant(C0 != C1, VT);
|
|
|
|
case ISD::SETULT: return DAG.getConstant(C0 < C1, VT);
|
|
|
|
case ISD::SETUGT: return DAG.getConstant(C0 > C1, VT);
|
|
|
|
case ISD::SETULE: return DAG.getConstant(C0 <= C1, VT);
|
|
|
|
case ISD::SETUGE: return DAG.getConstant(C0 >= C1, VT);
|
|
|
|
case ISD::SETLT: return DAG.getConstant((int64_t)C0 < (int64_t)C1, VT);
|
|
|
|
case ISD::SETGT: return DAG.getConstant((int64_t)C0 > (int64_t)C1, VT);
|
|
|
|
case ISD::SETLE: return DAG.getConstant((int64_t)C0 <= (int64_t)C1, VT);
|
|
|
|
case ISD::SETGE: return DAG.getConstant((int64_t)C0 >= (int64_t)C1, VT);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// If the LHS is a ZERO_EXTEND, perform the comparison on the input.
|
|
|
|
if (N0.getOpcode() == ISD::ZERO_EXTEND) {
|
|
|
|
unsigned InSize = MVT::getSizeInBits(N0.getOperand(0).getValueType());
|
|
|
|
|
|
|
|
// If the comparison constant has bits in the upper part, the
|
|
|
|
// zero-extended value could never match.
|
|
|
|
if (C1 & (~0ULL << InSize)) {
|
|
|
|
unsigned VSize = MVT::getSizeInBits(N0.getValueType());
|
|
|
|
switch (Cond) {
|
|
|
|
case ISD::SETUGT:
|
|
|
|
case ISD::SETUGE:
|
|
|
|
case ISD::SETEQ: return DAG.getConstant(0, VT);
|
|
|
|
case ISD::SETULT:
|
|
|
|
case ISD::SETULE:
|
|
|
|
case ISD::SETNE: return DAG.getConstant(1, VT);
|
|
|
|
case ISD::SETGT:
|
|
|
|
case ISD::SETGE:
|
|
|
|
// True if the sign bit of C1 is set.
|
|
|
|
return DAG.getConstant((C1 & (1ULL << VSize)) != 0, VT);
|
|
|
|
case ISD::SETLT:
|
|
|
|
case ISD::SETLE:
|
|
|
|
// True if the sign bit of C1 isn't set.
|
|
|
|
return DAG.getConstant((C1 & (1ULL << VSize)) == 0, VT);
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Otherwise, we can perform the comparison with the low bits.
|
|
|
|
switch (Cond) {
|
|
|
|
case ISD::SETEQ:
|
|
|
|
case ISD::SETNE:
|
|
|
|
case ISD::SETUGT:
|
|
|
|
case ISD::SETUGE:
|
|
|
|
case ISD::SETULT:
|
|
|
|
case ISD::SETULE:
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(C1, N0.getOperand(0).getValueType()),
|
|
|
|
Cond);
|
|
|
|
default:
|
|
|
|
break; // todo, be more careful with signed comparisons
|
|
|
|
}
|
|
|
|
} else if (N0.getOpcode() == ISD::SIGN_EXTEND_INREG &&
|
|
|
|
(Cond == ISD::SETEQ || Cond == ISD::SETNE)) {
|
|
|
|
MVT::ValueType ExtSrcTy = cast<VTSDNode>(N0.getOperand(1))->getVT();
|
|
|
|
unsigned ExtSrcTyBits = MVT::getSizeInBits(ExtSrcTy);
|
|
|
|
MVT::ValueType ExtDstTy = N0.getValueType();
|
|
|
|
unsigned ExtDstTyBits = MVT::getSizeInBits(ExtDstTy);
|
|
|
|
|
|
|
|
// If the extended part has any inconsistent bits, it cannot ever
|
|
|
|
// compare equal. In other words, they have to be all ones or all
|
|
|
|
// zeros.
|
|
|
|
uint64_t ExtBits =
|
|
|
|
(~0ULL >> (64-ExtSrcTyBits)) & (~0ULL << (ExtDstTyBits-1));
|
|
|
|
if ((C1 & ExtBits) != 0 && (C1 & ExtBits) != ExtBits)
|
|
|
|
return DAG.getConstant(Cond == ISD::SETNE, VT);
|
|
|
|
|
|
|
|
SDOperand ZextOp;
|
|
|
|
MVT::ValueType Op0Ty = N0.getOperand(0).getValueType();
|
|
|
|
if (Op0Ty == ExtSrcTy) {
|
|
|
|
ZextOp = N0.getOperand(0);
|
|
|
|
} else {
|
|
|
|
int64_t Imm = ~0ULL >> (64-ExtSrcTyBits);
|
|
|
|
ZextOp = DAG.getNode(ISD::AND, Op0Ty, N0.getOperand(0),
|
|
|
|
DAG.getConstant(Imm, Op0Ty));
|
|
|
|
}
|
|
|
|
WorkList.push_back(ZextOp.Val);
|
|
|
|
// Otherwise, make this a use of a zext.
|
|
|
|
return DAG.getSetCC(VT, ZextOp,
|
|
|
|
DAG.getConstant(C1 & (~0ULL>>(64-ExtSrcTyBits)),
|
|
|
|
ExtDstTy),
|
|
|
|
Cond);
|
|
|
|
}
|
2005-10-05 06:11:08 +00:00
|
|
|
|
2005-09-16 00:54:12 +00:00
|
|
|
uint64_t MinVal, MaxVal;
|
|
|
|
unsigned OperandBitSize = MVT::getSizeInBits(N1C->getValueType(0));
|
|
|
|
if (ISD::isSignedIntSetCC(Cond)) {
|
|
|
|
MinVal = 1ULL << (OperandBitSize-1);
|
|
|
|
if (OperandBitSize != 1) // Avoid X >> 64, which is undefined.
|
|
|
|
MaxVal = ~0ULL >> (65-OperandBitSize);
|
|
|
|
else
|
|
|
|
MaxVal = 0;
|
|
|
|
} else {
|
|
|
|
MinVal = 0;
|
|
|
|
MaxVal = ~0ULL >> (64-OperandBitSize);
|
|
|
|
}
|
|
|
|
|
|
|
|
// Canonicalize GE/LE comparisons to use GT/LT comparisons.
|
|
|
|
if (Cond == ISD::SETGE || Cond == ISD::SETUGE) {
|
|
|
|
if (C1 == MinVal) return DAG.getConstant(1, VT); // X >= MIN --> true
|
|
|
|
--C1; // X >= C0 --> X > (C0-1)
|
|
|
|
return DAG.getSetCC(VT, N0, DAG.getConstant(C1, N1.getValueType()),
|
|
|
|
(Cond == ISD::SETGE) ? ISD::SETGT : ISD::SETUGT);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (Cond == ISD::SETLE || Cond == ISD::SETULE) {
|
|
|
|
if (C1 == MaxVal) return DAG.getConstant(1, VT); // X <= MAX --> true
|
|
|
|
++C1; // X <= C0 --> X < (C0+1)
|
|
|
|
return DAG.getSetCC(VT, N0, DAG.getConstant(C1, N1.getValueType()),
|
|
|
|
(Cond == ISD::SETLE) ? ISD::SETLT : ISD::SETULT);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal)
|
|
|
|
return DAG.getConstant(0, VT); // X < MIN --> false
|
|
|
|
|
|
|
|
// Canonicalize setgt X, Min --> setne X, Min
|
|
|
|
if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MinVal)
|
|
|
|
return DAG.getSetCC(VT, N0, N1, ISD::SETNE);
|
|
|
|
|
|
|
|
// If we have setult X, 1, turn it into seteq X, 0
|
|
|
|
if ((Cond == ISD::SETLT || Cond == ISD::SETULT) && C1 == MinVal+1)
|
|
|
|
return DAG.getSetCC(VT, N0, DAG.getConstant(MinVal, N0.getValueType()),
|
|
|
|
ISD::SETEQ);
|
|
|
|
// If we have setugt X, Max-1, turn it into seteq X, Max
|
|
|
|
else if ((Cond == ISD::SETGT || Cond == ISD::SETUGT) && C1 == MaxVal-1)
|
|
|
|
return DAG.getSetCC(VT, N0, DAG.getConstant(MaxVal, N0.getValueType()),
|
|
|
|
ISD::SETEQ);
|
|
|
|
|
|
|
|
// If we have "setcc X, C0", check to see if we can shrink the immediate
|
|
|
|
// by changing cc.
|
|
|
|
|
|
|
|
// SETUGT X, SINTMAX -> SETLT X, 0
|
|
|
|
if (Cond == ISD::SETUGT && OperandBitSize != 1 &&
|
|
|
|
C1 == (~0ULL >> (65-OperandBitSize)))
|
|
|
|
return DAG.getSetCC(VT, N0, DAG.getConstant(0, N1.getValueType()),
|
|
|
|
ISD::SETLT);
|
|
|
|
|
|
|
|
// FIXME: Implement the rest of these.
|
|
|
|
|
|
|
|
// Fold bit comparisons when we can.
|
|
|
|
if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
|
|
|
|
VT == N0.getValueType() && N0.getOpcode() == ISD::AND)
|
|
|
|
if (ConstantSDNode *AndRHS =
|
|
|
|
dyn_cast<ConstantSDNode>(N0.getOperand(1))) {
|
|
|
|
if (Cond == ISD::SETNE && C1 == 0) {// (X & 8) != 0 --> (X & 8) >> 3
|
|
|
|
// Perform the xform if the AND RHS is a single bit.
|
|
|
|
if ((AndRHS->getValue() & (AndRHS->getValue()-1)) == 0) {
|
|
|
|
return DAG.getNode(ISD::SRL, VT, N0,
|
|
|
|
DAG.getConstant(Log2_64(AndRHS->getValue()),
|
|
|
|
TLI.getShiftAmountTy()));
|
|
|
|
}
|
|
|
|
} else if (Cond == ISD::SETEQ && C1 == AndRHS->getValue()) {
|
|
|
|
// (X & 8) == 8 --> (X & 8) >> 3
|
|
|
|
// Perform the xform if C1 is a single bit.
|
|
|
|
if ((C1 & (C1-1)) == 0) {
|
|
|
|
return DAG.getNode(ISD::SRL, VT, N0,
|
|
|
|
DAG.getConstant(Log2_64(C1),TLI.getShiftAmountTy()));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else if (isa<ConstantSDNode>(N0.Val)) {
|
|
|
|
// Ensure that the constant occurs on the RHS.
|
|
|
|
return DAG.getSetCC(VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ConstantFPSDNode *N0C = dyn_cast<ConstantFPSDNode>(N0.Val))
|
|
|
|
if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1.Val)) {
|
|
|
|
double C0 = N0C->getValue(), C1 = N1C->getValue();
|
|
|
|
|
|
|
|
switch (Cond) {
|
|
|
|
default: break; // FIXME: Implement the rest of these!
|
|
|
|
case ISD::SETEQ: return DAG.getConstant(C0 == C1, VT);
|
|
|
|
case ISD::SETNE: return DAG.getConstant(C0 != C1, VT);
|
|
|
|
case ISD::SETLT: return DAG.getConstant(C0 < C1, VT);
|
|
|
|
case ISD::SETGT: return DAG.getConstant(C0 > C1, VT);
|
|
|
|
case ISD::SETLE: return DAG.getConstant(C0 <= C1, VT);
|
|
|
|
case ISD::SETGE: return DAG.getConstant(C0 >= C1, VT);
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
// Ensure that the constant occurs on the RHS.
|
|
|
|
return DAG.getSetCC(VT, N1, N0, ISD::getSetCCSwappedOperands(Cond));
|
|
|
|
}
|
|
|
|
|
|
|
|
if (N0 == N1) {
|
|
|
|
// We can always fold X == Y for integer setcc's.
|
|
|
|
if (MVT::isInteger(N0.getValueType()))
|
|
|
|
return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
|
|
|
|
unsigned UOF = ISD::getUnorderedFlavor(Cond);
|
|
|
|
if (UOF == 2) // FP operators that are undefined on NaNs.
|
|
|
|
return DAG.getConstant(ISD::isTrueWhenEqual(Cond), VT);
|
|
|
|
if (UOF == unsigned(ISD::isTrueWhenEqual(Cond)))
|
|
|
|
return DAG.getConstant(UOF, VT);
|
|
|
|
// Otherwise, we can't fold it. However, we can simplify it to SETUO/SETO
|
|
|
|
// if it is not already.
|
|
|
|
ISD::CondCode NewCond = UOF == 0 ? ISD::SETUO : ISD::SETO;
|
|
|
|
if (NewCond != Cond)
|
|
|
|
return DAG.getSetCC(VT, N0, N1, NewCond);
|
|
|
|
}
|
|
|
|
|
|
|
|
if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
|
|
|
|
MVT::isInteger(N0.getValueType())) {
|
|
|
|
if (N0.getOpcode() == ISD::ADD || N0.getOpcode() == ISD::SUB ||
|
|
|
|
N0.getOpcode() == ISD::XOR) {
|
|
|
|
// Simplify (X+Y) == (X+Z) --> Y == Z
|
|
|
|
if (N0.getOpcode() == N1.getOpcode()) {
|
|
|
|
if (N0.getOperand(0) == N1.getOperand(0))
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(1), Cond);
|
|
|
|
if (N0.getOperand(1) == N1.getOperand(1))
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(0), N1.getOperand(0), Cond);
|
|
|
|
if (isCommutativeBinOp(N0.getOpcode())) {
|
|
|
|
// If X op Y == Y op X, try other combinations.
|
|
|
|
if (N0.getOperand(0) == N1.getOperand(1))
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(0), Cond);
|
|
|
|
if (N0.getOperand(1) == N1.getOperand(0))
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(1), N1.getOperand(1), Cond);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2005-10-05 06:11:08 +00:00
|
|
|
// Turn (X^C1) == C2 into X == C1^C2 iff X&~C1 = 0. Common for condcodes.
|
|
|
|
if (N0.getOpcode() == ISD::XOR)
|
|
|
|
if (ConstantSDNode *XORC = dyn_cast<ConstantSDNode>(N0.getOperand(1)))
|
|
|
|
if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(N1)) {
|
|
|
|
// If we know that all of the inverted bits are zero, don't bother
|
|
|
|
// performing the inversion.
|
|
|
|
if (MaskedValueIsZero(N0.getOperand(0), ~XORC->getValue(), TLI))
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(XORC->getValue()^RHSC->getValue(),
|
|
|
|
N0.getValueType()), Cond);
|
|
|
|
}
|
|
|
|
|
2005-09-16 00:54:12 +00:00
|
|
|
// Simplify (X+Z) == X --> Z == 0
|
|
|
|
if (N0.getOperand(0) == N1)
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(1),
|
|
|
|
DAG.getConstant(0, N0.getValueType()), Cond);
|
|
|
|
if (N0.getOperand(1) == N1) {
|
|
|
|
if (isCommutativeBinOp(N0.getOpcode()))
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(0),
|
|
|
|
DAG.getConstant(0, N0.getValueType()), Cond);
|
|
|
|
else {
|
|
|
|
assert(N0.getOpcode() == ISD::SUB && "Unexpected operation!");
|
|
|
|
// (Z-X) == X --> Z == X<<1
|
|
|
|
SDOperand SH = DAG.getNode(ISD::SHL, N1.getValueType(),
|
|
|
|
N1,
|
|
|
|
DAG.getConstant(1,TLI.getShiftAmountTy()));
|
|
|
|
WorkList.push_back(SH.Val);
|
|
|
|
return DAG.getSetCC(VT, N0.getOperand(0), SH, Cond);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (N1.getOpcode() == ISD::ADD || N1.getOpcode() == ISD::SUB ||
|
|
|
|
N1.getOpcode() == ISD::XOR) {
|
|
|
|
// Simplify X == (X+Z) --> Z == 0
|
|
|
|
if (N1.getOperand(0) == N0) {
|
|
|
|
return DAG.getSetCC(VT, N1.getOperand(1),
|
|
|
|
DAG.getConstant(0, N1.getValueType()), Cond);
|
|
|
|
} else if (N1.getOperand(1) == N0) {
|
|
|
|
if (isCommutativeBinOp(N1.getOpcode())) {
|
|
|
|
return DAG.getSetCC(VT, N1.getOperand(0),
|
|
|
|
DAG.getConstant(0, N1.getValueType()), Cond);
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|
|
|
} else {
|
|
|
|
assert(N1.getOpcode() == ISD::SUB && "Unexpected operation!");
|
|
|
|
// X == (Z-X) --> X<<1 == Z
|
|
|
|
SDOperand SH = DAG.getNode(ISD::SHL, N1.getValueType(), N0,
|
|
|
|
DAG.getConstant(1,TLI.getShiftAmountTy()));
|
|
|
|
WorkList.push_back(SH.Val);
|
|
|
|
return DAG.getSetCC(VT, SH, N1.getOperand(0), Cond);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// Fold away ALL boolean setcc's.
|
|
|
|
SDOperand Temp;
|
2005-10-05 21:43:42 +00:00
|
|
|
if (N0.getValueType() == MVT::i1 && foldBooleans) {
|
2005-09-16 00:54:12 +00:00
|
|
|
switch (Cond) {
|
|
|
|
default: assert(0 && "Unknown integer setcc!");
|
|
|
|
case ISD::SETEQ: // X == Y -> (X^Y)^1
|
|
|
|
Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, N1);
|
|
|
|
N0 = DAG.getNode(ISD::XOR, MVT::i1, Temp, DAG.getConstant(1, MVT::i1));
|
|
|
|
WorkList.push_back(Temp.Val);
|
|
|
|
break;
|
|
|
|
case ISD::SETNE: // X != Y --> (X^Y)
|
|
|
|
N0 = DAG.getNode(ISD::XOR, MVT::i1, N0, N1);
|
|
|
|
break;
|
|
|
|
case ISD::SETGT: // X >s Y --> X == 0 & Y == 1 --> X^1 & Y
|
|
|
|
case ISD::SETULT: // X <u Y --> X == 0 & Y == 1 --> X^1 & Y
|
|
|
|
Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, DAG.getConstant(1, MVT::i1));
|
|
|
|
N0 = DAG.getNode(ISD::AND, MVT::i1, N1, Temp);
|
|
|
|
WorkList.push_back(Temp.Val);
|
|
|
|
break;
|
|
|
|
case ISD::SETLT: // X <s Y --> X == 1 & Y == 0 --> Y^1 & X
|
|
|
|
case ISD::SETUGT: // X >u Y --> X == 1 & Y == 0 --> Y^1 & X
|
|
|
|
Temp = DAG.getNode(ISD::XOR, MVT::i1, N1, DAG.getConstant(1, MVT::i1));
|
|
|
|
N0 = DAG.getNode(ISD::AND, MVT::i1, N0, Temp);
|
|
|
|
WorkList.push_back(Temp.Val);
|
|
|
|
break;
|
|
|
|
case ISD::SETULE: // X <=u Y --> X == 0 | Y == 1 --> X^1 | Y
|
|
|
|
case ISD::SETGE: // X >=s Y --> X == 0 | Y == 1 --> X^1 | Y
|
|
|
|
Temp = DAG.getNode(ISD::XOR, MVT::i1, N0, DAG.getConstant(1, MVT::i1));
|
|
|
|
N0 = DAG.getNode(ISD::OR, MVT::i1, N1, Temp);
|
|
|
|
WorkList.push_back(Temp.Val);
|
|
|
|
break;
|
|
|
|
case ISD::SETUGE: // X >=u Y --> X == 1 | Y == 0 --> Y^1 | X
|
|
|
|
case ISD::SETLE: // X <=s Y --> X == 1 | Y == 0 --> Y^1 | X
|
|
|
|
Temp = DAG.getNode(ISD::XOR, MVT::i1, N1, DAG.getConstant(1, MVT::i1));
|
|
|
|
N0 = DAG.getNode(ISD::OR, MVT::i1, N0, Temp);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (VT != MVT::i1) {
|
|
|
|
WorkList.push_back(N0.Val);
|
|
|
|
// FIXME: If running after legalize, we probably can't do this.
|
|
|
|
N0 = DAG.getNode(ISD::ZERO_EXTEND, VT, N0);
|
|
|
|
}
|
|
|
|
return N0;
|
|
|
|
}
|
|
|
|
|
|
|
|
// Could not fold it.
|
|
|
|
return SDOperand();
|
|
|
|
}
|
|
|
|
|
2005-09-01 00:19:25 +00:00
|
|
|
// SelectionDAG::Combine - This is the entry point for the file.
|
|
|
|
//
|
2005-09-01 23:24:04 +00:00
|
|
|
void SelectionDAG::Combine(bool RunningAfterLegalize) {
|
2005-09-01 00:19:25 +00:00
|
|
|
/// run - This is the main entry point to this class.
|
|
|
|
///
|
2005-09-01 23:24:04 +00:00
|
|
|
DAGCombiner(*this).Run(RunningAfterLegalize);
|
2005-09-01 00:19:25 +00:00
|
|
|
}
|