2003-08-21 22:14:26 +00:00
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//===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
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2005-04-21 20:39:54 +00:00
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//
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2003-10-20 20:19:47 +00:00
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// The LLVM Compiler Infrastructure
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//
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2007-12-29 19:59:42 +00:00
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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2005-04-21 20:39:54 +00:00
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//
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2003-10-20 20:19:47 +00:00
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//===----------------------------------------------------------------------===//
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2003-01-13 01:01:31 +00:00
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//
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2003-08-21 22:14:26 +00:00
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// This file defines interfaces to access the target independent code generation
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2003-01-13 01:01:31 +00:00
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// passes provided by the LLVM backend.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_PASSES_H
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#define LLVM_CODEGEN_PASSES_H
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2012-02-04 02:56:45 +00:00
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#include "llvm/Pass.h"
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2009-10-16 21:06:15 +00:00
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#include "llvm/Target/TargetMachine.h"
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2004-02-04 21:41:10 +00:00
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#include <string>
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2004-01-30 21:53:46 +00:00
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2003-11-11 22:41:34 +00:00
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namespace llvm {
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2003-12-20 10:18:58 +00:00
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class FunctionPass;
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2010-04-02 23:17:14 +00:00
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class MachineFunctionPass;
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2003-12-20 10:18:58 +00:00
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class PassInfo;
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2008-11-04 21:53:09 +00:00
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class TargetLowering;
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2011-09-27 23:50:46 +00:00
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class TargetRegisterClass;
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2009-08-23 03:13:20 +00:00
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class raw_ostream;
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2012-02-03 05:12:41 +00:00
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}
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2004-07-02 05:44:13 +00:00
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2012-02-03 05:12:41 +00:00
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namespace llvm {
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2012-02-11 07:11:32 +00:00
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extern char &NoPassID; // Allow targets to choose not to run a pass.
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2012-02-03 05:12:41 +00:00
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/// Target-Independent Code Generator Pass Configuration Options.
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///
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2012-02-04 02:56:45 +00:00
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/// This is an ImmutablePass solely for the purpose of exposing CodeGen options
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/// to the internals of other CodeGen passes.
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class TargetPassConfig : public ImmutablePass {
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2012-02-03 05:12:41 +00:00
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protected:
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TargetMachine *TM;
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PassManagerBase &PM;
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2012-02-08 21:22:39 +00:00
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bool Initialized; // Flagged after all passes are configured.
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2012-02-04 02:56:59 +00:00
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// Target Pass Options
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// Targets provide a default setting, user flags override.
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//
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2012-02-03 05:12:41 +00:00
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bool DisableVerify;
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2012-02-08 21:22:48 +00:00
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/// Default setting for -enable-tail-merge on this target.
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bool EnableTailMerge;
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2012-02-03 05:12:41 +00:00
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public:
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2012-02-04 02:56:59 +00:00
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TargetPassConfig(TargetMachine *tm, PassManagerBase &pm);
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2012-02-04 02:56:45 +00:00
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// Dummy constructor.
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TargetPassConfig();
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virtual ~TargetPassConfig();
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2012-02-03 05:12:41 +00:00
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2012-02-04 02:56:45 +00:00
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static char ID;
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/// Get the right type of TargetMachine for this target.
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template<typename TMC> TMC &getTM() const {
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return *static_cast<TMC*>(TM);
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}
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2012-02-04 02:56:59 +00:00
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const TargetLowering *getTargetLowering() const {
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return TM->getTargetLowering();
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}
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2012-02-08 21:22:39 +00:00
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void setInitialized() { Initialized = true; }
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2012-02-03 05:12:41 +00:00
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CodeGenOpt::Level getOptLevel() const { return TM->getOptLevel(); }
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2012-02-08 21:22:48 +00:00
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void setDisableVerify(bool Disable) { setOpt(DisableVerify, Disable); }
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bool getEnableTailMerge() const { return EnableTailMerge; }
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void setEnableTailMerge(bool Enable) { setOpt(EnableTailMerge, Enable); }
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2012-02-04 02:56:59 +00:00
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2012-02-10 04:10:36 +00:00
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bool getOptimizeRegAlloc() const;
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2012-02-04 02:56:59 +00:00
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/// Add common target configurable passes that perform LLVM IR to IR
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/// transforms following machine independent optimization.
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virtual void addIRPasses();
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/// Add common passes that perform LLVM IR to IR transforms in preparation for
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/// instruction selection.
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virtual void addISelPrepare();
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/// addInstSelector - This method should install an instruction selector pass,
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/// which converts from LLVM code to machine instructions.
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virtual bool addInstSelector() {
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return true;
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}
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2012-02-03 05:12:41 +00:00
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/// Add the complete, standard set of LLVM CodeGen passes.
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/// Fully developed targets will not generally override this.
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2012-02-04 02:56:59 +00:00
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virtual void addMachinePasses();
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protected:
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2012-02-08 21:22:39 +00:00
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// Helper to verify the analysis is really immutable.
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void setOpt(bool &Opt, bool Val);
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2012-02-04 02:56:59 +00:00
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/// Methods with trivial inline returns are convenient points in the common
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/// codegen pass pipeline where targets may insert passes. Methods with
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/// out-of-line standard implementations are major CodeGen stages called by
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/// addMachinePasses. Some targets may override major stages when inserting
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/// passes is insufficient, but maintaining overriden stages is more work.
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2012-02-03 05:12:41 +00:00
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///
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/// addPreISelPasses - This method should add any "last minute" LLVM->LLVM
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/// passes (which are run just before instruction selector).
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virtual bool addPreISel() {
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return true;
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}
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2012-02-09 00:40:55 +00:00
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/// addMachineSSAOptimization - Add standard passes that optimize machine
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/// instructions in SSA form.
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virtual void addMachineSSAOptimization();
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2012-02-03 05:12:41 +00:00
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/// addPreRegAlloc - This method may be implemented by targets that want to
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/// run passes immediately before register allocation. This should return
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/// true if -print-machineinstrs should print after these passes.
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virtual bool addPreRegAlloc() {
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return false;
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}
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2012-02-10 04:10:36 +00:00
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/// createTargetRegisterAllocator - Create the register allocator pass for
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/// this target at the current optimization level.
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virtual FunctionPass *createTargetRegisterAllocator(bool Optimized);
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/// addFastRegAlloc - Add the minimum set of target-independent passes that
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/// are required for fast register allocation.
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virtual void addFastRegAlloc(FunctionPass *RegAllocPass);
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2012-02-11 07:11:29 +00:00
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/// addOptimizedRegAlloc - Add passes related to register allocation.
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/// LLVMTargetMachine provides standard regalloc passes for most targets.
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2012-02-10 04:10:36 +00:00
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virtual void addOptimizedRegAlloc(FunctionPass *RegAllocPass);
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2012-02-09 00:40:55 +00:00
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2012-02-11 07:11:32 +00:00
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/// getSchedPass - This method may be implemented by target that want to
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/// completely override the MachineScheduler pass with a new pass, rather than
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/// inheriting from ScheduleDAGInstrs.
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virtual char &getSchedPass() { return NoPassID; }
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/// addFinalizeRegAlloc - This method may be implemented by targets that want
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/// to run passes within the regalloc pipeline, immediately after the register
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/// allocation pass itself. These passes run as soon as virtual regisiters
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/// have been rewritten to physical registers but before and other postRA
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/// optimization happens. Targets that have marked instructions for bundling
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/// must have finalized those bundles by the time these passes have run,
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/// because subsequent passes are not guaranteed to be bundle-aware.
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virtual bool addFinalizeRegAlloc() {
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return false;
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}
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/// addPostRegAlloc - This method may be implemented by targets that want to
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/// run passes after register allocation pass pipeline but before
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/// prolog-epilog insertion. This should return true if -print-machineinstrs
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/// should print after these passes.
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2012-02-03 05:12:41 +00:00
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virtual bool addPostRegAlloc() {
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return false;
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}
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2012-02-09 00:40:55 +00:00
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/// Add passes that optimize machine instructions after register allocation.
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virtual void addMachineLateOptimization();
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2012-02-03 05:12:41 +00:00
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/// addPreSched2 - This method may be implemented by targets that want to
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/// run passes after prolog-epilog insertion and before the second instruction
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/// scheduling pass. This should return true if -print-machineinstrs should
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/// print after these passes.
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virtual bool addPreSched2() {
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return false;
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}
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2012-02-09 00:40:55 +00:00
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/// Add standard basic block placement passes.
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virtual void addBlockPlacement();
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2012-02-03 05:12:41 +00:00
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/// addPreEmitPass - This pass may be implemented by targets that want to run
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/// passes immediately before machine code is emitted. This should return
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/// true if -print-machineinstrs should print out the code after the passes.
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virtual bool addPreEmitPass() {
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return false;
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}
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/// Utilities for targets to add passes to the pass manager.
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///
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/// Add a target-independent CodeGen pass at this point in the pipeline.
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2012-02-08 21:22:34 +00:00
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void addPass(char &ID);
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2012-02-03 05:12:41 +00:00
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2012-02-10 04:10:36 +00:00
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/// addMachinePasses helper to create the target-selected or overriden
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/// regalloc pass.
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FunctionPass *createRegAllocPass(bool Optimized);
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2012-02-03 05:12:41 +00:00
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/// printNoVerify - Add a pass to dump the machine function, if debugging is
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/// enabled.
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///
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void printNoVerify(const char *Banner) const;
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/// printAndVerify - Add a pass to dump then verify the machine function, if
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/// those steps are enabled.
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///
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void printAndVerify(const char *Banner) const;
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};
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} // namespace llvm
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/// List of target independent CodeGen pass IDs.
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namespace llvm {
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2004-07-02 05:44:13 +00:00
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/// createUnreachableBlockEliminationPass - The LLVM code generator does not
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/// work well with unreachable basic blocks (what live ranges make sense for a
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/// block that cannot be reached?). As such, a code generator should either
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2010-08-06 21:31:35 +00:00
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/// not instruction select unreachable blocks, or run this pass as its
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2004-07-02 05:44:13 +00:00
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/// last LLVM modifying pass to clean up blocks that are not reachable from
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/// the entry block.
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FunctionPass *createUnreachableBlockEliminationPass();
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2005-04-21 20:39:54 +00:00
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2003-12-20 10:18:58 +00:00
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/// MachineFunctionPrinter pass - This pass prints out the machine function to
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2010-08-06 21:31:35 +00:00
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/// the given stream as a debugging tool.
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2010-04-02 23:17:14 +00:00
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MachineFunctionPass *
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createMachineFunctionPrinterPass(raw_ostream &OS,
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const std::string &Banner ="");
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2004-01-30 21:53:46 +00:00
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2012-02-08 21:23:13 +00:00
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/// MachineLoopInfo - This pass is a loop analysis pass.
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2010-08-06 18:33:48 +00:00
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extern char &MachineLoopInfoID;
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2008-01-04 20:54:55 +00:00
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2012-02-08 21:23:13 +00:00
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/// MachineLoopRanges - This pass is an on-demand loop coverage analysis.
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2010-12-15 23:41:23 +00:00
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extern char &MachineLoopRangesID;
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2012-02-08 21:23:13 +00:00
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/// MachineDominators - This pass is a machine dominators analysis pass.
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2010-08-06 18:33:48 +00:00
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extern char &MachineDominatorsID;
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2008-01-04 20:54:55 +00:00
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2011-01-04 21:10:05 +00:00
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/// EdgeBundles analysis - Bundle machine CFG edges.
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extern char &EdgeBundlesID;
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2012-02-10 04:10:36 +00:00
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/// LiveVariables pass - This pass computes the set of blocks in which each
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/// variable is life and sets machine operand kill flags.
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extern char &LiveVariablesID;
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2012-02-08 21:23:13 +00:00
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/// PHIElimination - This pass eliminates machine instruction PHI nodes
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2003-12-20 10:18:58 +00:00
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/// by inserting copy instructions. This destroys SSA information, but is the
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/// desired input for some register allocators. This pass is "required" by
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/// these register allocator like this: AU.addRequiredID(PHIEliminationID);
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2010-08-06 18:33:48 +00:00
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extern char &PHIEliminationID;
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2010-08-06 21:31:35 +00:00
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2012-02-08 21:23:13 +00:00
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/// StrongPHIElimination - This pass eliminates machine instruction PHI
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2007-10-31 03:37:57 +00:00
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/// nodes by inserting copy instructions. This destroys SSA information, but
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/// is the desired input for some register allocators. This pass is
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/// "required" by these register allocator like this:
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/// AU.addRequiredID(PHIEliminationID);
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/// This pass is still in development
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2010-08-06 18:33:48 +00:00
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extern char &StrongPHIEliminationID;
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2003-01-13 01:01:31 +00:00
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2010-10-26 00:11:33 +00:00
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/// LiveStacks pass. An analysis keeping track of the liveness of stack slots.
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extern char &LiveStacksID;
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2012-02-08 21:23:13 +00:00
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/// TwoAddressInstruction - This pass reduces two-address instructions to
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2003-12-20 10:18:58 +00:00
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/// use two operands. This destroys SSA information but it is desired by
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/// register allocators.
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2010-08-06 18:33:48 +00:00
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extern char &TwoAddressInstructionPassID;
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2003-01-13 01:01:31 +00:00
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2012-02-10 04:10:36 +00:00
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/// ProcessImpicitDefs pass - This pass removes IMPLICIT_DEFs.
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extern char &ProcessImplicitDefsID;
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/// RegisterCoalescer - This pass merges live ranges to eliminate copies.
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extern char &RegisterCoalescerID;
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2011-08-09 00:29:53 +00:00
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2012-02-08 21:23:13 +00:00
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/// MachineScheduler - This pass schedules machine instructions.
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2012-01-17 06:55:03 +00:00
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extern char &MachineSchedulerID;
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2012-01-13 06:30:30 +00:00
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2011-01-06 01:21:53 +00:00
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/// SpillPlacement analysis. Suggest optimal placement of spill code between
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/// basic blocks.
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extern char &SpillPlacementID;
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2012-02-08 21:23:13 +00:00
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/// UnreachableMachineBlockElimination - This pass removes unreachable
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2008-08-04 23:54:43 +00:00
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/// machine basic blocks.
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2010-08-06 18:33:48 +00:00
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extern char &UnreachableMachineBlockElimID;
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2008-08-04 23:54:43 +00:00
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2012-02-08 21:23:13 +00:00
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/// DeadMachineInstructionElim - This pass removes dead machine instructions.
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extern char &DeadMachineInstructionElimID;
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2008-09-17 00:43:24 +00:00
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2010-04-21 18:02:42 +00:00
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/// FastRegisterAllocation Pass - This pass register allocates as fast as
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/// possible. It is best suited for debug code where live ranges are short.
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///
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FunctionPass *createFastRegisterAllocator();
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2010-10-22 23:09:15 +00:00
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/// BasicRegisterAllocation Pass - This pass implements a degenerate global
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/// register allocator using the basic regalloc framework.
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///
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FunctionPass *createBasicRegisterAllocator();
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2010-12-08 03:26:16 +00:00
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/// Greedy register allocation pass - This pass implements a global register
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/// allocator for optimized builds.
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///
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FunctionPass *createGreedyRegisterAllocator();
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2008-10-02 18:29:27 +00:00
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/// PBQPRegisterAllocation Pass - This pass implements the Partitioned Boolean
|
|
|
|
/// Quadratic Prograaming (PBQP) based register allocator.
|
|
|
|
///
|
2010-09-23 04:28:54 +00:00
|
|
|
FunctionPass *createDefaultPBQPRegisterAllocator();
|
2003-01-13 01:01:31 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// PrologEpilogCodeInserter - This pass inserts prolog and epilog code,
|
2003-12-20 10:18:58 +00:00
|
|
|
/// and eliminates abstract frame references.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &PrologEpilogCodeInserterID;
|
2010-08-06 21:31:35 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// ExpandPostRAPseudos - This pass expands pseudo instructions after
|
2011-09-25 16:46:08 +00:00
|
|
|
/// register allocation.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &ExpandPostRAPseudosID;
|
2003-09-30 20:14:43 +00:00
|
|
|
|
2009-10-16 21:06:15 +00:00
|
|
|
/// createPostRAScheduler - This pass performs post register allocation
|
|
|
|
/// scheduling.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &PostRASchedulerID;
|
2007-07-13 17:13:54 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// BranchFolding - This pass performs machine code CFG based
|
2004-07-31 09:59:14 +00:00
|
|
|
/// optimizations to delete branches to branches, eliminate branches to
|
|
|
|
/// successor blocks (creating fall throughs), and eliminating branches over
|
|
|
|
/// branches.
|
2012-02-08 21:22:48 +00:00
|
|
|
extern char &BranchFolderPassID;
|
2004-07-31 09:59:14 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// TailDuplicate - Duplicate blocks with unconditional branches
|
2009-11-26 00:32:21 +00:00
|
|
|
/// into tails of their predecessors.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &TailDuplicateID;
|
2009-11-26 00:32:21 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// IfConverter - This pass performs machine code if conversion.
|
|
|
|
extern char &IfConverterID;
|
2007-05-16 02:00:57 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// MachineBlockPlacement - This pass places basic blocks based on branch
|
Implement a block placement pass based on the branch probability and
block frequency analyses. This differs substantially from the existing
block-placement pass in LLVM:
1) It operates on the Machine-IR in the CodeGen layer. This exposes much
more (and more precise) information and opportunities. Also, the
results are more stable due to fewer transforms ocurring after the
pass runs.
2) It uses the generalized probability and frequency analyses. These can
model static heuristics, code annotation derived heuristics as well
as eventual profile loading. By basing the optimization on the
analysis interface it can work from any (or a combination) of these
inputs.
3) It uses a more aggressive algorithm, both building chains from tho
bottom up to maximize benefit, and using an SCC-based walk to layout
chains of blocks in a profitable ordering without O(N^2) iterations
which the old pass involves.
The pass is currently gated behind a flag, and not enabled by default
because it still needs to grow some important features. Most notably, it
needs to support loop aligning and careful layout of loop structures
much as done by hand currently in CodePlacementOpt. Once it supports
these, and has sufficient testing and quality tuning, it should replace
both of these passes.
Thanks to Nick Lewycky and Richard Smith for help authoring & debugging
this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm
forgetting for reviewing and answering all my questions. Writing
a backend pass is *sooo* much better now than it used to be. =D
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:46:38 +00:00
|
|
|
/// probabilities.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &MachineBlockPlacementID;
|
Implement a block placement pass based on the branch probability and
block frequency analyses. This differs substantially from the existing
block-placement pass in LLVM:
1) It operates on the Machine-IR in the CodeGen layer. This exposes much
more (and more precise) information and opportunities. Also, the
results are more stable due to fewer transforms ocurring after the
pass runs.
2) It uses the generalized probability and frequency analyses. These can
model static heuristics, code annotation derived heuristics as well
as eventual profile loading. By basing the optimization on the
analysis interface it can work from any (or a combination) of these
inputs.
3) It uses a more aggressive algorithm, both building chains from tho
bottom up to maximize benefit, and using an SCC-based walk to layout
chains of blocks in a profitable ordering without O(N^2) iterations
which the old pass involves.
The pass is currently gated behind a flag, and not enabled by default
because it still needs to grow some important features. Most notably, it
needs to support loop aligning and careful layout of loop structures
much as done by hand currently in CodePlacementOpt. Once it supports
these, and has sufficient testing and quality tuning, it should replace
both of these passes.
Thanks to Nick Lewycky and Richard Smith for help authoring & debugging
this, and to Jakob, Andy, Eric, Jim, and probably a few others I'm
forgetting for reviewing and answering all my questions. Writing
a backend pass is *sooo* much better now than it used to be. =D
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142641 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-21 06:46:38 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// MachineBlockPlacementStats - This pass collects statistics about the
|
2011-11-02 07:17:12 +00:00
|
|
|
/// basic block placement using branch probabilities and block frequency
|
|
|
|
/// information.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &MachineBlockPlacementStatsID;
|
2011-11-02 07:17:12 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// Code Placement - This pass optimize code placement and aligns loop
|
2009-05-07 05:42:24 +00:00
|
|
|
/// headers to target specific alignment boundary.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &CodePlacementOptID;
|
2008-02-28 00:43:03 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// GCLowering Pass - Performs target-independent LLVM IR transformations for
|
|
|
|
/// highly portable strategies.
|
|
|
|
///
|
2007-12-11 00:30:17 +00:00
|
|
|
FunctionPass *createGCLoweringPass();
|
2010-08-06 21:31:35 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// GCMachineCodeAnalysis - Target-independent pass to mark safe points
|
|
|
|
/// in machine code. Must be added very late during code generation, just
|
|
|
|
/// prior to output, and importantly after all CFG transformations (such as
|
|
|
|
/// branch folding).
|
|
|
|
extern char &GCMachineCodeAnalysisID;
|
2010-08-06 21:31:35 +00:00
|
|
|
|
2008-08-17 18:44:35 +00:00
|
|
|
/// Deleter Pass - Releases GC metadata.
|
2010-08-06 21:31:35 +00:00
|
|
|
///
|
2008-08-17 18:44:35 +00:00
|
|
|
FunctionPass *createGCInfoDeleter();
|
2010-08-06 21:31:35 +00:00
|
|
|
|
2008-08-17 18:44:35 +00:00
|
|
|
/// Creates a pass to print GC metadata.
|
2010-08-06 21:31:35 +00:00
|
|
|
///
|
2009-08-23 03:13:20 +00:00
|
|
|
FunctionPass *createGCInfoPrinter(raw_ostream &OS);
|
2010-08-06 21:31:35 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// MachineCSE - This pass performs global CSE on machine instructions.
|
|
|
|
extern char &MachineCSEID;
|
2010-03-02 02:38:24 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// MachineLICM - This pass performs LICM on machine instructions.
|
|
|
|
extern char &MachineLICMID;
|
Initial commit of the machine code LICM pass. It successfully hoists this:
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@44687 91177308-0d34-0410-b5e6-96231b3b80d8
2007-12-07 21:42:31 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// MachineSinking - This pass performs sinking on machine instructions.
|
|
|
|
extern char &MachineSinkingID;
|
2008-06-04 09:18:41 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// MachineCopyPropagation - This pass performs copy propagation on
|
2012-01-07 03:02:36 +00:00
|
|
|
/// machine instructions.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &MachineCopyPropagationID;
|
2012-01-07 03:02:36 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// PeepholeOptimizer - This pass performs peephole optimizations -
|
2010-08-09 23:59:04 +00:00
|
|
|
/// like extension and comparison eliminations.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &PeepholeOptimizerID;
|
2010-01-13 00:30:23 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// OptimizePHIs - This pass optimizes machine instruction PHIs
|
2010-02-12 01:30:21 +00:00
|
|
|
/// to take advantage of opportunities created during DAG legalization.
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &OptimizePHIsID;
|
2010-02-12 01:30:21 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// StackSlotColoring - This pass performs stack slot coloring.
|
|
|
|
extern char &StackSlotColoringID;
|
2008-11-04 02:10:20 +00:00
|
|
|
|
|
|
|
/// createStackProtectorPass - This pass adds stack protectors to functions.
|
2012-02-08 21:23:13 +00:00
|
|
|
///
|
2008-11-13 01:02:14 +00:00
|
|
|
FunctionPass *createStackProtectorPass(const TargetLowering *tli);
|
2008-11-04 02:10:20 +00:00
|
|
|
|
2009-05-16 00:33:53 +00:00
|
|
|
/// createMachineVerifierPass - This pass verifies cenerated machine code
|
|
|
|
/// instructions for correctness.
|
2012-02-08 21:23:13 +00:00
|
|
|
///
|
2010-12-18 00:06:56 +00:00
|
|
|
FunctionPass *createMachineVerifierPass(const char *Banner = 0);
|
2009-05-16 00:33:53 +00:00
|
|
|
|
2009-05-22 20:36:31 +00:00
|
|
|
/// createDwarfEHPass - This pass mulches exception handling code into a form
|
|
|
|
/// adapted to code generation. Required if using dwarf exception handling.
|
2010-08-31 09:05:06 +00:00
|
|
|
FunctionPass *createDwarfEHPass(const TargetMachine *tm);
|
2009-05-22 20:36:31 +00:00
|
|
|
|
2009-08-17 16:41:22 +00:00
|
|
|
/// createSjLjEHPass - This pass adapts exception handling code to use
|
|
|
|
/// the GCC-style builtin setjmp/longjmp (sjlj) to handling EH control flow.
|
2012-02-08 21:23:13 +00:00
|
|
|
///
|
2009-08-17 16:41:22 +00:00
|
|
|
FunctionPass *createSjLjEHPass(const TargetLowering *tli);
|
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// LocalStackSlotAllocation - This pass assigns local frame indices to stack
|
|
|
|
/// slots relative to one another and allocates base registers to access them
|
|
|
|
/// when it is estimated by the target to be out of range of normal frame
|
|
|
|
/// pointer or stack pointer index addressing.
|
|
|
|
extern char &LocalStackSlotAllocationID;
|
2010-08-14 00:15:52 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// ExpandISelPseudos - This pass expands pseudo-instructions.
|
|
|
|
extern char &ExpandISelPseudosID;
|
2010-11-16 21:02:37 +00:00
|
|
|
|
2011-09-27 23:50:46 +00:00
|
|
|
/// createExecutionDependencyFixPass - This pass fixes execution time
|
|
|
|
/// problems with dependent instructions, such as switching execution
|
|
|
|
/// domains to match.
|
|
|
|
///
|
|
|
|
/// The pass will examine instructions using and defining registers in RC.
|
|
|
|
///
|
|
|
|
FunctionPass *createExecutionDependencyFixPass(const TargetRegisterClass *RC);
|
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// UnpackMachineBundles - This pass unpack machine instruction bundles.
|
|
|
|
extern char &UnpackMachineBundlesID;
|
2011-12-14 02:11:42 +00:00
|
|
|
|
2012-02-08 21:23:13 +00:00
|
|
|
/// FinalizeMachineBundles - This pass finalize machine instruction
|
2012-01-19 07:47:03 +00:00
|
|
|
/// bundles (created earlier, e.g. during pre-RA scheduling).
|
2012-02-08 21:23:13 +00:00
|
|
|
extern char &FinalizeMachineBundlesID;
|
2012-01-19 07:47:03 +00:00
|
|
|
|
2003-11-11 22:41:34 +00:00
|
|
|
} // End llvm namespace
|
|
|
|
|
2003-01-13 01:01:31 +00:00
|
|
|
#endif
|