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Sparc doesn't have sext_inreg

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24791 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2005-12-17 20:50:42 +00:00
parent 53ec2035eb
commit 9a60ff654a
2 changed files with 10 additions and 0 deletions
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5
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@ -60,6 +60,11 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
addRegisterClass(MVT::i32, V8::IntRegsRegisterClass);
addRegisterClass(MVT::f32, V8::FPRegsRegisterClass);
addRegisterClass(MVT::f64, V8::DFPRegsRegisterClass);
// Sparc doesn't have sext_inreg, replace them with shl/sra
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
computeRegisterProperties();
}

5
lib/Target/SparcV8/SparcV8ISelDAGToDAG.cpp
View File

@ -60,6 +60,11 @@ SparcV8TargetLowering::SparcV8TargetLowering(TargetMachine &TM)
addRegisterClass(MVT::i32, V8::IntRegsRegisterClass);
addRegisterClass(MVT::f32, V8::FPRegsRegisterClass);
addRegisterClass(MVT::f64, V8::DFPRegsRegisterClass);
// Sparc doesn't have sext_inreg, replace them with shl/sra
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i16 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i8 , Expand);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::i1 , Expand);
computeRegisterProperties();
}