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03cd663eb1a90cd435369ddc17ae6a43fa1bcc98
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763 Commits

Author SHA1 Message Date
Matt Arsenault
03cd663eb1 R600/SI: Move splitting 64-bit immediates to separate function. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204651 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-24 18:26:52 +00:00
Matt Arsenault
875870fdb4 R600/SI: Fix 64-bit private loads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204630 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-24 17:50:46 +00:00
Tom Stellard
4ddee6a5da R600/SI: Fix warning with gcc 4.8.2 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204618 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-24 16:12:34 +00:00
Tom Stellard
65b5e9b4ef R600/SI: Promote fp64 SELECT to i64 
This type promotion is replacing a Tablegen pattern and it is already
covered by existing tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204617 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-24 16:07:30 +00:00
Tom Stellard
9958475129 R600: Reorganize tablegen instruction definitions 
Each GPU family now has its own file.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204615 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-24 16:07:25 +00:00
Matt Arsenault
55d17f4842 R600/SI: Move instruction patterns to scalar versions. 
Some of them also had the pattern on both, so this removes the
duplication.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204492 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-21 18:01:18 +00:00
Tom Stellard
a1d28f6dd7 R600/SI: Handle MUBUF instructions in SIInstrInfo::moveToVALU() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204476 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-21 15:51:57 +00:00
Tom Stellard
1f1c0495d0 R600/SI: Handle S_MOV_B64 in SIInstrInfo::moveToVALU() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204475 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-21 15:51:54 +00:00
Tom Stellard
af4c7da306 R600/SI: Use SGPR_(32|64) reg clases when lowering SI_ADDR64_RSRC 
The SReg_(32|64) register classes contain special registers in addition
to the numbered SGPRs.  This can lead to machine verifier errors when
these register classes are used as sub-registers for SReg_128, since
SReg_128 only uses the numbered SGPRs.

Replacing SReg_(32|64) with SGPR_(32|64) fixes this problem, since
the SGPR_(32|64) register classes contain only numbered SGPRs.

Tests cases for this are comming in a later commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204474 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-21 15:51:53 +00:00
Matt Arsenault
31bd14fc2d R600: Remove unused method declaration. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204357 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-20 16:41:06 +00:00
Matt Arsenault
925147ca20 R600/SI: Add unused LDS 2 form instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204275 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-19 22:19:56 +00:00
Matt Arsenault
e3620da269 R600/SI: Add support for 64-bit LDS writes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204274 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-19 22:19:54 +00:00
Matt Arsenault
62b3e22092 R600/SI: Add support for 64-bit LDS loads. 
v2:
  -Use correct opcode for DS_READ_64

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204273 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-19 22:19:52 +00:00
Matt Arsenault
6eaa49233f R600/SI: Match i16 immediate offset of LDS instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204272 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-19 22:19:49 +00:00
Matt Arsenault
9c0b2d08d3 R600/SI: Don't display the GDS bit. 
It isn't actually used now, and probably never will be, plus it makes
tests less annoying. I also think SC prints GDS instructions as a
separate instruction name.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204270 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-19 22:19:43 +00:00
Matt Arsenault
6d1781733d R600/SI: Merge offset0 and offset1 fields for single address DS instructions v2 
Also remove unused data fields from the DS_Load_Helper class.

v2:
  - Merge fields for DS_WRITE

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204269 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-19 22:19:39 +00:00
Matt Arsenault
9f44c113bd Make methods static 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204085 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-17 22:23:09 +00:00
Matt Arsenault
2683baa8ac R600: Match sign_extend_inreg to BFE instructions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204072 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-17 18:58:11 +00:00
Tom Stellard
ad52f4f70c R600/SI: Fix implementation of isInlineConstant() used by the verifier 
The type of the immediates should not matter as long as the encoding is
equivalent to the encoding of one of the legal inline constants.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204056 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-17 17:03:52 +00:00
Tom Stellard
eb7876083d R600/SI: Use correct dest register class for V_READFIRSTLANE_B32 
This instructions writes to an 32-bit SGPR.  This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.

This fixes verifier errors on several of the indirect addressing piglit
tests.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204055 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-17 17:03:51 +00:00
Tom Stellard
27b614fcd3 R600/SI: Add generic checks to SIInstrInfo::verifyInstruction() 
Added checks for number of operands and operand register classes.

Tested-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@204054 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-17 17:03:49 +00:00
Matt Arsenault
2345166d2f R600: Remove unnecessary attempt to zext a pointer. 
Private pointers are now always 32-bits.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203989 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-15 00:08:26 +00:00
Matt Arsenault
2cf43de915 R600: Code cleanup. 
Use sign_extend_inreg and getZeroExtendInReg instead of
using the bit operations they expand into.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203988 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-15 00:08:22 +00:00
Owen Anderson
bf63022492 Phase 2 of the great MachineRegisterInfo cleanup. This time, we're changing 
operator* on the by-operand iterators to return a MachineOperand& rather than
a MachineInstr&.  At this point they almost behave like normal iterators!

Again, this requires making some existing loops more verbose, but should pave
the way for the big range-based for-loop cleanups in the future.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203865 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-13 23:12:04 +00:00
Tom Stellard
47feea0802 R600: LDS instructions shouldn't implicitly define OQAP 
LDS instructions are pseudo instructions which model
the OQAP defs and uses within a single instruction.

This fixes a hang in the opencv MedianFilter tests.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203818 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-13 17:13:04 +00:00
Matt Arsenault
054f4eccd2 R600: Fix trunc store from i64 to i1 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203695 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-12 18:45:52 +00:00
Matt Arsenault
0e5b4860b5 R600: Calculate store mask instead of using switch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203527 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-11 01:38:53 +00:00
Matt Arsenault
bea18e3849 Remove incomplete comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203518 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-11 00:01:37 +00:00
Matt Arsenault
6cf9da3d85 Move trivial getter into header. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203517 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-11 00:01:34 +00:00
Matt Arsenault
cc1240ee1b Use .data() instead of &x[0] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203516 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-11 00:01:31 +00:00
Matt Arsenault
60616b61dc Fix indentation 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203515 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-11 00:01:27 +00:00
Chandler Carruth
436906ab3c [TTI] There is actually no realistic way to pop TTI implementations off 
the stack of the analysis group because they are all immutable passes.
This is made clear by Craig's recent work to use override
systematically -- we weren't overriding anything for 'finalizePass'
because there is no such thing.

This is kind of a lame restriction on the API -- we can no longer push
and pop things, we just set up the stack and run. However, I'm not
invested in building some better solution on top of the existing
(terrifying) immutable pass and legacy pass manager.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203437 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-10 02:45:14 +00:00
Tom Stellard
6cadd406cc R600/SI: Using SGPRs is illegal for instructions that read carry-out from VCC 
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203281 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-07 20:12:39 +00:00
Tom Stellard
7e06370873 R600/SI: Custom lower i1 stores 
These are sometimes created by the shrink to boolean optimization in the
globalopt pass.

Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203280 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-07 20:12:33 +00:00
Matt Arsenault
161e3a80b2 R600: Fix extloads from i8 / i16 to i64. 
This appears to only be working for global loads. Private
and local break for other reasons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203135 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-06 17:34:12 +00:00
Matt Arsenault
b4cd160bb9 R600/SI: Expand selects on vectors. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203134 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-06 17:34:03 +00:00
Matt Arsenault
0c5c3b93d8 Fix missing C++ mode comment 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203133 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-06 17:33:58 +00:00
Chandler Carruth
67f6bf70d2 [Layering] Move InstVisitor.h into the IR library as it is pretty 
obviously coupled to the IR.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203064 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-06 03:23:41 +00:00
Matt Arsenault
af0cc459bf Fix typo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@203013 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-05 21:47:22 +00:00
Chandler Carruth
7225e27b4c [Modules] Move ValueMap to the IR library. While this class does not 
directly care about the Value class (it is templated so that the key can
be any arbitrary Value subclass), it is in fact concretely tied to the
Value class through the ValueHandle's CallbackVH interface which relies
on the key type being some Value subclass to establish the value handle
chain.

Ironically, the unittest is already in the right library.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202824 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-04 11:26:31 +00:00
Benjamin Kramer
d628f19f5d [C++11] Replace llvm::next and llvm::prior with std::next and std::prev. 
Remove the old functions.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202636 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-02 12:27:27 +00:00
Craig Topper
629b96cb4f Switch all uses of LLVM_OVERRIDE to just use 'override' directly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202621 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-02 09:09:27 +00:00
Craig Topper
4eb03f049e Switch all uses of LLVM_FINAL to just use 'final', and remove the macro. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202618 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-03-02 08:08:51 +00:00
Tom Stellard
34faf78241 R600: Verify all instructions in the AsmPrinter on debug builds 
Make a call to R600's implementation of verifyInstruction() to
check that instructions are only using legal operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202544 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-28 21:36:41 +00:00
Tom Stellard
9f0d68f522 R600/SI: Expand all v16[if]32 operations 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202543 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-28 21:36:37 +00:00
Rafael Espindola
b9e06b97ce Remove MCPureStreamer. 
We moved MCJIT to use native object formats a long time ago and R600
now uses ELF, so it was dead.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202408 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-27 16:17:34 +00:00
Michel Danzer
644aecfc97 R600/SI: Optimize SI_KILL for constant operands 
If the SI_KILL operand is constant, we can either clear the exec mask if
the operand is negative, or do nothing otherwise.

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202337 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-27 01:47:09 +00:00
Michel Danzer
a5fbf24716 R600/SI: Allow SI_KILL for geometry shaders 
Reviewed-by: Tom Stellard <thomas.stellard@amd.com>

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202336 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-27 01:47:02 +00:00
Matt Arsenault
3f19b69b01 R600: Remove unnecessary build_vector pattern. 
It is already fully handled in AMDGPUISelDAGToDAG.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202312 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-26 23:00:58 +00:00
Tom Stellard
431e9f0310 R600: Don't unconditionally unroll loops with private memory accesses 
This causes the size of the scrypt kernel to explode and eats all the
memory on some systems.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202195 91177308-0d34-0410-b5e6-96231b3b80d8
 2014-02-25 21:36:21 +00:00