6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-08-19 19:29:31 +00:00
Code Issues Projects Releases Wiki Activity
25,266 Commits 39 Branches 0 Tags 277 MiB
047854f2b7
Commit Graph

6141 Commits

Author SHA1 Message Date
Chris Lattner
047854f2b7 Add some patterns for ppc64 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:38:36 +00:00
Chris Lattner
30da68acce Remove some ugly now-redundant casts. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28864 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:25:29 +00:00
Chris Lattner
a973993c0c Fix some mismatched type constraints 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28862 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-20 00:12:37 +00:00
Evan Cheng
b21495043e Minor clean up. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28860 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-19 19:25:30 +00:00
Rafael Espindola
58421d7d08 initial implementation of ARMRegisterInfo::eliminateFrameIndex 
fixes test/Regression/CodeGen/ARM/ret_arg5.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28854 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-18 00:08:07 +00:00
Evan Cheng
357edf8a4f A new entry. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28848 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:45:49 +00:00
Chris Lattner
b1d26f6665 Implement the getPointerRegClass method, which is required for the ptr_rc 
magic to work.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28847 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-17 00:01:04 +00:00
Evan Cheng
54edc84000 Later models likely to have Yonah like attributes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28843 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:58:49 +00:00
Chris Lattner
a24b7618f8 Upgrade some load/store instructions to use the proper addressing mode stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28841 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:41 +00:00
Chris Lattner
66d7ebb777 In 64-bit mode, addr mode operands use G8RC instead of GPRC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28840 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:29:03 +00:00
Chris Lattner
059ca0f5b7 fix some assumptions that pointers can only be 32-bits. With this, we can 
now compile:

static unsigned long X;
void test1() {
  X = 0;
}

into:

_test1:
        lis r2, ha16(_X)
        li r3, 0
        stw r3, lo16(_X)(r2)
        blr

Totally amazing :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28839 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 21:01:35 +00:00
Chris Lattner
956f43c310 Split 64-bit instructions out into a separate .td file 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28838 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:22:01 +00:00
Chris Lattner
8fa05dac39 Force 64-bit register availability in 64-bit mode. For real. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28837 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 20:05:06 +00:00
Chris Lattner
af89fa609b Remove the -darwin and -aix llc options, inferring darwinism and aixism from 
the target triple & subtarget info.  woo.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28835 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:50:48 +00:00
Chris Lattner
1790d44d0d Don't pass target name into TargetData anymore, it is never used or needed. 
Remove explicit casts to std::string now that there is no overload resolution
issues in the TargetData ctors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28830 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:22:52 +00:00
Chris Lattner
acbc07aa22 Remove ctor with each piece specifyable (which causes overload ambiguities), 
add a new init method.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28828 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 18:11:26 +00:00
Chris Lattner
7c1fb5f08c Document the subtarget features better, make sure that 64-bit mode, 64-bit 
support, and 64-bit register use are all consistent with each other.

Add a new "IsPPC" feature, to distinguish ppc32 vs ppc64 targets, use this
to configure TargetData differently.  This not makes ppc64 blow up on lots
of stuff :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28825 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:50:12 +00:00
Chris Lattner
a7a5854f1c Rename some subtarget features. A CPU now can *have* 64-bit instructions, 
can in 32-bit mode we can choose to optionally *use* 64-bit registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28824 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 17:34:12 +00:00
Chris Lattner
94de9a8951 First baby step towards ppc64 support. This adds a new -march=ppc64 backend 
that is currently just like ppc32 :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28813 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-16 01:37:27 +00:00
Chris Lattner
8e173de059 Add a note that Nate noticed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28808 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 21:33:31 +00:00
Jim Laskey
f8a01a9661 1. Support standard dwarf format (was bootstrapping in Apple format.) 
2. Add vector support.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28807 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 20:51:43 +00:00
Evan Cheng
31f7be9fb7 Vector extract / insert index operand should have ptr type. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28798 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:19:05 +00:00
Evan Cheng
a7dc4a59cb Type of extract_element index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28797 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:18:06 +00:00
Evan Cheng
015188ffbc Type of vector extract / insert index operand should be iPTR. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28796 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-15 08:14:54 +00:00
Evan Cheng
fae2994302 X86 call instructions can take variable number of operands. Parameters of 
vector types are passed via XMM registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28789 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 22:24:55 +00:00
Chris Lattner
4b5a352f25 add a note 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28787 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 21:26:18 +00:00
Evan Cheng
b69d113201 Add argument registers to the end of call operand list (partial fix). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 18:17:40 +00:00
Jim Laskey
014f98c7e5 Place dwarf headers at earliest possible point. Well behaved when skipping 
functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28781 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-14 11:35:03 +00:00
Andrew Lenharth
c8aba85e1c I am sure I had commited this workaround before. Perhaps soon I should sort it all out 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28772 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 20:34:47 +00:00
Andrew Lenharth
0e4dd01ffc It really helps to be returning to the correct place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28769 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 18:27:39 +00:00
Evan Cheng
004fb92615 Cygwin support: use _alloca to allocate stack if > 4k. Patch by Anton Korobeynikov. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28764 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-13 05:14:44 +00:00
Chris Lattner
e67304fb78 Gaar! Don't use r11 for CR save/restore, use R0. R11 can be register 
allocated, thus live across the save/reload.  This fixes

llc-beta /MultiSource/Applications/spiff/spiff
llc-beta /MultiSource/Benchmarks/sim/sim:
llc-beta /MultiSource/Benchmarks/Ptrdist/bc/bc
llc-beta /MultiSource/Benchmarks/McCat/12-IOtest/iotest:
llc-beta /MultiSource/Benchmarks/FreeBench/fourinarow/fourinarow
llc-beta /MultiSource/Benchmarks/Fhourstones-3.1/fhourstones3.1
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawdaudio/rawdaudio
llc-beta /MultiSource/Benchmarks/mediabench/adpcm/rawcaudio/rawcaudio
llc-beta /MultiSource/Benchmarks/mediabench/g721/g721encode/encode
llc-beta /MultiSource/Benchmarks/mediabench/jpeg/jpeg-6a/cjpeg

and probably others, with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28761 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 23:59:16 +00:00
Chris Lattner
b47e0897a0 Fix spilling and reloading of CR regs to reload the right values. This fixes 
Olden/power (and probably others) with -regalloc=local.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28760 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 21:50:57 +00:00
Andrew Lenharth
f2b806a1aa Let the alpha breakage begin. First Formals and RET. next Calls 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28753 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 18:09:24 +00:00
Rafael Espindola
337c4ad6e7 lower more then 4 formal arguments. The offset is currently hard coded. 
implement SelectFrameIndex


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28751 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-12 12:28:08 +00:00
Chris Lattner
cf00631719 Work around a nasty tblgen bug where it doesn't add operands for varargs 
nodes correctly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28745 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:15:02 +00:00
Chris Lattner
4a45abf66e Fix a problem exposed by the local allocator. CALL instructions are not marked 
as using incoming argument registers, so the local allocator would clobber them
between their set and use.  To fix this, we give the call instructions a variable
number of uses in the CALL MachineInstr itself, so live variables understands
the live ranges of these register arguments.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-10 01:14:28 +00:00
Evan Cheng
e5e228df19 Comments to appease sabre. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28737 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:25:10 +00:00
Evan Cheng
b12223e284 Minor compilation speed improvement. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28736 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-09 06:24:42 +00:00
Chris Lattner
c0bad5706e Add support for "m" inline asm constraints. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28728 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-08 18:03:49 +00:00
Evan Cheng
e8bd0a332a Added X86FunctionInfo subclass of MachineFunction to record whether the 
function that is being lowered is forced to use FP. Currently this is only
true for main() / Cygwin.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28703 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 23:30:24 +00:00
Chris Lattner
475c55393a Now that PR633 is implemented, the CBE can know to emit _setjmp/_longjmp 
when available.  This speeds up hexxagon from 18.61s to 16.61s with the CBE on
PPC Mac OS (for reference, LLC is 15.48s and GCC is 23.35s).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28697 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:45:47 +00:00
Chris Lattner
001db453f5 Add PowerPC intrinsics to support dcbz[l] 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-06 21:29:23 +00:00
Rafael Espindola
4b02367d54 add R0 to liveout 
expand "ret null" (implements test/Regression/CodeGen/ARM/ret_void.ll)
note that a Flag link is missing between the copy and the branch


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28691 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-05 22:26:14 +00:00
Evan Cheng
c21051ff96 A few new entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28683 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 09:08:00 +00:00
Evan Cheng
f8614db52e Be consistent with gcc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28682 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 07:24:07 +00:00
Andrew Lenharth
a5cc38bcbd ignore ordered/unordered for now 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28679 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-04 00:25:51 +00:00
Evan Cheng
3649b0efa5 Cygwin support. Patch by Anton Korobeynikov! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28672 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 22:38:37 +00:00
Evan Cheng
aede9b9598 Use xor to clear a register. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28667 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:20:34 +00:00
Evan Cheng
94b1453278 Incorrect AT&T opcode. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28666 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-06-02 21:09:10 +00:00