Commit Graph

85034 Commits

Author SHA1 Message Date
Manman Ren
062986c2f0 PGO: preserve branch-weight metadata when simplifying two branches with a common
destination.

Updated previous implementation to fix a case not covered:
// PBI: br i1 %x, TrueDest, BB
// BI:  br i1 %y, TrueDest, FalseDest
The other case was handled correctly.
// PBI: br i1 %x, BB, FalseDest
// BI:  br i1 %y, TrueDest, FalseDest

Also tried to use 64-bit arithmetic instead of APInt with scale to simplify the
computation. Let me know if you have other opinions about this.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163954 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 00:39:57 +00:00
Andrew Trick
3cbd1786ac TableGen subtarget parser. Handle new machine model.
Collect processor resources from the subtarget defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163953 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 00:20:02 +00:00
Andrew Trick
5e613c260b TableGen subtarget parser. Handle new machine model.
Infer SchedClasses from variants defined by the target or subtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163952 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 00:19:59 +00:00
Andrew Trick
48605c3406 TableGen subtarget parser. Handle new machine model.
Collect SchedClasses and SchedRW types from the subtarget defs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163951 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-15 00:19:57 +00:00
Daniel Dunbar
17785fd392 cmake: Fix file path.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163950 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 23:36:56 +00:00
Daniel Dunbar
10097bd023 formatted_raw_ostream: Fix a serious bug in tell().
- The current_pos function is supposed to return all the written bytes, not the
   current position of the underlying stream.
 - This caused tell() to be broken whenever the underlying stream had buffered
   content.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163948 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 23:15:56 +00:00
Bill Wendling
d426a642a2 Some small reorganization to get read for Attributes overhaul.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163947 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 23:05:52 +00:00
Bill Wendling
ec3fc2eac0 Remove comment.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163945 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 22:35:49 +00:00
David Blaikie
48b6a79b2d Fix up erroneous alignas usage while making this portable to GCC 4.7
Review by Chandler Carruth.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163944 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 22:26:11 +00:00
Manman Ren
ad2890760f PGO: preserve branch-weight metadata when simplifying a switch with a single
case to a conditional branch and when removing dead cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163942 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 21:53:06 +00:00
Evan Cheng
911908dcb8 Stylistic and 80-col fixes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163940 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 21:25:34 +00:00
Andrew Trick
1ef65d61d1 comment typo
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163935 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 20:27:25 +00:00
Andrew Trick
99ab6c6035 TargetSchedModel interface. To be implemented...
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163934 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 20:26:46 +00:00
Andrew Trick
72d048b697 Define MC data tables for the new scheduling machine model.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163933 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 20:26:41 +00:00
Andrew Trick
0303d92b73 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163932 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 20:26:39 +00:00
Alex Rosenberg
eee94b3432 Review feedback from Duncan Sands. Alphabetize includes and simplify
lit config.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163928 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 19:19:57 +00:00
Manman Ren
796d945d54 Try to fix the bots by detecting inconsistant branch-weight metadata.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163926 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 19:05:19 +00:00
Andrew Trick
9eed53379f Implement getNumLDMAddresses and expose through ARMBaseInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163922 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 18:48:46 +00:00
Andrew Trick
dcf31ed413 Cortex-A9 instruction-level scheduling machine model.
This models the A9 processor at the level of instruction operands, as
opposed to the itinerary, which models each operation at the level of
pipeline stages.

The two primary motivations are:

1) Allow MachineScheduler to model A9 as an out-of-order processor. It
can now distinguish between hazards that force interlocking vs.
buffered resources.

2) Reduce long-term maintenance by allowing the itinerary and target
hooks to eventually be removed. Note that almost all of the complexity
in the new model exists to model instruction variants, which the
itinerary cannot handle. Instead the scheduler previously relied on
processor-specific target hooks which are incomplete and buggy.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163921 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 18:31:58 +00:00
Manman Ren
a8a2b99aec PGO: preserve branch-weight metadata when merging two switches where
the default target of the first switch is not the basic block the second switch
is in (PredDefault != BB).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163916 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 17:29:56 +00:00
Andrew Trick
d039b383e7 misched: add a hook for custom DAG postprocessing.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163915 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 17:22:42 +00:00
Micah Villmow
d15e657690 Add in comments that explain what the indexing and the size of the arrays is about.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163904 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 15:36:50 +00:00
Sergei Larin
c6a6660c62 DAG post-process for Hexagon MI scheduler
This patch introduces a possibility for Hexagon MI scheduler
to perform some target specific post- processing on the scheduling
DAG prior to scheduling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163903 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 15:07:59 +00:00
Dmitri Gribenko
c5252da873 Fix Doxygen issues:
* wrap code blocks in \code ... \endcode;
* refer to parameter names in paragraphs correctly (\arg is not what most
  people want -- it starts a new paragraph);
* use \param instead of \arg to document parameters in order to be consistent
  with the rest of the codebase.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163902 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 14:57:36 +00:00
Benjamin Kramer
d0807690de SROA: Silence unused variable warnings in Release builds.
The NDEBUG hack is ugly, but I see no better solution.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163900 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 13:08:09 +00:00
Benjamin Kramer
e5c4fe568e Remove redundant private field.
clang warned about this being unused in Release builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163899 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 12:19:58 +00:00
Chandler Carruth
6b547a2af5 Rework the computation of a sub-structure natural type. There were
pointless checks in here, bad asserts, and just confusing code. I've
also added a bit more to the comment to clarify what this function is
really trying to do as it was not obvious to Duncan when studying it.

Thanks to Duncan for helping me dig through the issue.

No real functionality changed here in practical cases, and certainly no
test case. This is just cleanup spotted by inspection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163897 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 11:08:31 +00:00
Chandler Carruth
01f85f02a4 Rely on the recursive check for pointer types rather than adding an
explicit check before recursing. A simplification requested by Duncan
during review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163896 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:30:44 +00:00
Chandler Carruth
ad41dcfd87 Be a bit more aggressive in bailing out of this routine. Spotted by
inspection by Duncan during review. My suspicion is that we would still
have returned 0 anyways in this case, but doing it sooner is better.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163895 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:30:42 +00:00
Chandler Carruth
8ed1ed8dfd Add some comments clarifying that the GEP analysis for vector GEPs is
deeply suspicious and likely to go away eventually. Also fix a bogus
comment about one of the checks in the vector GEP analysis. Based on
review from Duncan.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163894 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:30:40 +00:00
Chandler Carruth
8615cd236e Move an instance variable to a local variable based on review by Duncan.
Originally I had anticipated needing to thread this through more bits of
the SROA pass itself, but that ended up not happening. In the end, this
is a much simpler way to manange the variable.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163893 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:26:38 +00:00
Chandler Carruth
50754f0892 Add a comment about debug intrinsics that I *really* don't want to
forget from Duncan's review as a FIXME.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163892 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:26:36 +00:00
Chandler Carruth
b3dd9a13e8 Add two asserts that Duncan thought would help ensure things don't rot
unexpectedly in the future. More fixes from his code review.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163891 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:26:34 +00:00
Chandler Carruth
63db8bebe6 Actually keep the flag default-off for now. =/ That's what I get for
being busy testing this...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163890 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:18:54 +00:00
Chandler Carruth
1c2fe28109 Remove some dead, commented out code Duncan spotted in review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163889 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:18:53 +00:00
Chandler Carruth
ba13d2efba Wrap the dumping and printing routines in NDEBUG and LLVM_ENABLE_DUMP macros.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163888 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:18:51 +00:00
Chandler Carruth
7f5bedec74 Lots of comment fixes and cleanups from Duncan's review.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163887 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:18:49 +00:00
NAKAMURA Takumi
ad9f5b8967 SROA.cpp: Unbreak gcc, sorry!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163886 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 10:06:10 +00:00
NAKAMURA Takumi
9b1e62454a SROA.cpp: Appease msvc. LLVM_ATTRIBUTE(s) should come front of "const".
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163885 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 09:55:22 +00:00
Chandler Carruth
2a9bf25f60 Speculative change to try to fix older GCC versions that can't handle
the injected class name of a dependent base class here.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163884 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 09:30:33 +00:00
Chandler Carruth
713aa9431d Introduce a new SROA implementation.
This is essentially a ground up re-think of the SROA pass in LLVM. It
was initially inspired by a few problems with the existing pass:
- It is subject to the bane of my existence in optimizations: arbitrary
  thresholds.
- It is overly conservative about which constructs can be split and
  promoted.
- The vector value replacement aspect is separated from the splitting
  logic, missing many opportunities where splitting and vector value
  formation can work together.
- The splitting is entirely based around the underlying type of the
  alloca, despite this type often having little to do with the reality
  of how that memory is used. This is especially prevelant with unions
  and base classes where we tail-pack derived members.
- When splitting fails (often due to the thresholds), the vector value
  replacement (again because it is separate) can kick in for
  preposterous cases where we simply should have split the value. This
  results in forming i1024 and i2048 integer "bit vectors" that
  tremendously slow down subsequnet IR optimizations (due to large
  APInts) and impede the backend's lowering.

The new design takes an approach that fundamentally is not susceptible
to many of these problems. It is the result of a discusison between
myself and Duncan Sands over IRC about how to premptively avoid these
types of problems and how to do SROA in a more principled way. Since
then, it has evolved and grown, but this remains an important aspect: it
fixes real world problems with the SROA process today.

First, the transform of SROA actually has little to do with replacement.
It has more to do with splitting. The goal is to take an aggregate
alloca and form a composition of scalar allocas which can replace it and
will be most suitable to the eventual replacement by scalar SSA values.
The actual replacement is performed by mem2reg (and in the future
SSAUpdater).

The splitting is divided into four phases. The first phase is an
analysis of the uses of the alloca. This phase recursively walks uses,
building up a dense datastructure representing the ranges of the
alloca's memory actually used and checking for uses which inhibit any
aspects of the transform such as the escape of a pointer.

Once we have a mapping of the ranges of the alloca used by individual
operations, we compute a partitioning of the used ranges. Some uses are
inherently splittable (such as memcpy and memset), while scalar uses are
not splittable. The goal is to build a partitioning that has the minimum
number of splits while placing each unsplittable use in its own
partition. Overlapping unsplittable uses belong to the same partition.
This is the target split of the aggregate alloca, and it maximizes the
number of scalar accesses which become accesses to their own alloca and
candidates for promotion.

Third, we re-walk the uses of the alloca and assign each specific memory
access to all the partitions touched so that we have dense use-lists for
each partition.

Finally, we build a new, smaller alloca for each partition and rewrite
each use of that partition to use the new alloca. During this phase the
pass will also work very hard to transform uses of an alloca into a form
suitable for promotion, including forming vector operations, speculating
loads throguh PHI nodes and selects, etc.

After splitting is complete, each newly refined alloca that is
a candidate for promotion to a scalar SSA value is run through mem2reg.

There are lots of reasonably detailed comments in the source code about
the design and algorithms, and I'm going to be trying to improve them in
subsequent commits to ensure this is well documented, as the new pass is
in many ways more complex than the old one.

Some of this is still a WIP, but the current state is reasonbly stable.
It has passed bootstrap, the nightly test suite, and Duncan has run it
successfully through the ACATS and DragonEgg test suites. That said, it
remains behind a default-off flag until the last few pieces are in
place, and full testing can be done.

Specific areas I'm looking at next:
- Improved comments and some code cleanup from reviews.
- SSAUpdater and enabling this pass inside the CGSCC pass manager.
- Some datastructure tuning and compile-time measurements.
- More aggressive FCA splitting and vector formation.

Many thanks to Duncan Sands for the thorough final review, as well as
Benjamin Kramer for lots of review during the process of writing this
pass, and Daniel Berlin for reviewing the data structures and algorithms
and general theory of the pass. Also, several other people on IRC, over
lunch tables, etc for lots of feedback and advice.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163883 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 09:22:59 +00:00
Duncan Sands
74b4762234 Remove silly dead store. Patch by Ettl Martin.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163882 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 09:00:11 +00:00
Craig Topper
f4d78241ea Allow the second opcode info table to be 8, 16, or 32-bits as needed to represent additional fragments. This recovers some space on ATT X86 syntax and PowerPC which only need 40-bits instead of 48-bits. This also increases ARM to 64-bits to fully encode all of its operands.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163880 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 08:33:11 +00:00
Craig Topper
4e5babe4f3 Reduce size of register name index tables by using uint16_t for all in tree targets. If more than 16-bits are needed for any out of tree targets, code will detect and use uint32_t instead.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163878 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 06:37:49 +00:00
Andrew Trick
a2ed0e8e8b misched: Generic tablegen classes for the new machine model.
This is mostly documentation for the new machine model. It is designed
to be flexible, easy to incrementally refine for a subtarget, and
provide all the information that MachineScheduler will need.

If all goes well, I will follow up with an example of the new model in
use for ARM.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163877 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 06:18:55 +00:00
Andrew Trick
1008f8c789 comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163876 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 06:18:52 +00:00
Andrew Trick
8fa5319504 comment
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163875 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 06:18:50 +00:00
Akira Hatanaka
99258f6755 mips16 fixes.
1. Add MoveR3216
2. Correct spelling for Move32R16

Patch by Reed Kotler.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163869 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-14 03:21:56 +00:00
Galina Kistanova
e30ba2ebcf Patch by Sean Silva!
The patch converts the "How to add a builder" document over to reStructuredText..


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163860 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13 23:51:08 +00:00
Eric Christopher
ffaf69b8b1 Fix both the test for zero and what we do if we have a zero for
umulo legalization.

Fixes PR13839

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@163856 91177308-0d34-0410-b5e6-96231b3b80d8
2012-09-13 23:24:02 +00:00