6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-27 13:29:50 +00:00
Code Issues Projects Releases Wiki Activity
59,529 Commits 39 Branches 0 Tags 277 MiB
0a3e2b591c
Commit Graph

2390 Commits

Author SHA1 Message Date
Anton Korobeynikov
0a3e2b591c Fix itins for VABA 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100657 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:42 +00:00
Anton Korobeynikov
fc2b08438c Correct VMVN itinerary: operand is read in the second cycle, not in the first. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100656 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:36 +00:00
Anton Korobeynikov
e715b1e43a More A9 itineraries 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100655 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:29 +00:00
Anton Korobeynikov
1c03f2493f Correct itinerary class for VPADD 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100654 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:24 +00:00
Anton Korobeynikov
4ac0af851f VP{MAX, MIN} are of IIC_VSUBi4D itin class as well. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100653 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:18 +00:00
Anton Korobeynikov
f8b5c63617 VHADD differs from VHSUB at least on A9 - the former reads both operands in the second cycle, while the latter reads second operand in first cycle. Introduce new itin classes to catch this behavior. Whether this is true for A8 as well is WIP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100652 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:13 +00:00
Anton Korobeynikov
268b7446cf Some easy NEON scheduling goodness for A9 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100651 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:07 +00:00
Anton Korobeynikov
a31c6fb65e Define new itin classes for ARM <-> VFP reg moves to distinguish from NEON ops. Define proper scheduling itinerary for them on A9. A8 TRM does not specify latency for them at all :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100650 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:20:02 +00:00
Anton Korobeynikov
63401e33cb FCONST{S,D} behaves the same way as FP unary instructions. This is true for both A8 and A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100649 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:56 +00:00
Anton Korobeynikov
bcc02d13bb Proper cycle times for locks, since wbck latency can be larger than fwd latency. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100648 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:51 +00:00
Anton Korobeynikov
c492e09455 Add new itin classes for FP16 <-> FP32 conversions and make uise of them for A9. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100647 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:46 +00:00
Anton Korobeynikov
391b3431e2 Make use of new reserved/required scheduling stuff: introduce VFP and NEON locks to model domain cross stalls precisly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100646 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:40 +00:00
Anton Korobeynikov
2eeeff8371 Some bits of A9 scheduling: VFP 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100643 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:18 +00:00
Anton Korobeynikov
035b23a0f4 Separate const from non-const stuff during mergeing 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100642 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:13 +00:00
Anton Korobeynikov
1e7b324fe5 Some initial version of global merger 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100641 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-07 18:19:07 +00:00
Bob Wilson
d0910c4534 Expand SELECT and SELECT_CC for NEON vector types. 
Radar 7770501.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100568 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-06 22:02:24 +00:00
Chris Lattner
0333535054 don't use emitlabel in the arm asm printer yet, the order 
isn't well specified.  ARM really needs to have its instprinter
finished at some point.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 17:52:31 +00:00
Chris Lattner
0752cda4de fix a couple problems I introduced handling symbols 
with spaces in them.  Sym->getName()  !=   OS << *Sym




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100434 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 16:32:14 +00:00
Johnny Chen
7fb053dd45 Get rid of traling whitespaces. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:51:50 +00:00
Johnny Chen
9d563b676c The disassembler impl. of MCDisassembler::getInstruction() was using the pattern 
uint32_t insn;
  MemoryObject.readBytes(Address, 4, (uint8_t*)&insn, NULL)

to read 4 bytes of memory contents into a 32-bit uint variable.  This leaves the
interpretation of byte order up to the host machine and causes PPC test cases of
arm-tests, neon-tests, and thumb-tests to fail.  Fixed to use a byte array for
reading the memory contents and shift the bytes into place for the 32-bit uint
variable in the ARM case and 16-bit halfword in the Thumb case.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100403 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 04:46:17 +00:00
Jakob Stoklund Olesen
fddb7667ca Replace TSFlagsFields and TSFlagsShifts with a simpler TSFlags field. 
When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100384 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 03:10:20 +00:00
Evan Cheng
cb86609421 Temporarily remove to disable building of ARM disassembler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100380 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:57:50 +00:00
Evan Cheng
f6232cf8bb Re-apply 100265 but instead disable building of ARM disassembly for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100379 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:34:00 +00:00
Evan Cheng
1b0194d646 Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100378 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 01:04:27 +00:00
Chris Lattner
90429c487f just have all targets create the DwarfWriter. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100377 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 00:42:55 +00:00
Chris Lattner
8e680482c1 simplify various getAnalysisUsage implementations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100376 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-05 00:38:44 +00:00
Chris Lattner
3d22513611 eliminate the magic AbsoluteDebugSectionOffsets MAI hook, 
which is really a property of the section being referenced.
Add a predicate to MCSection to replace it.

Yay for reduction in magic.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100367 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 23:22:29 +00:00
Chris Lattner
1d20473c9d revert my patch, need to reconsider this and figure out what is really going on. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100358 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 21:49:31 +00:00
Chris Lattner
4166047030 fix pasto, this is the wrong setting for arm elf. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100357 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 21:37:20 +00:00
Chris Lattner
3f53c8398d clean up the asmprinter header and privatize some stuff. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100342 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 18:52:31 +00:00
Chris Lattner
9d1c1ada21 remove TargetMachine.h #include, also, TRI isn't used frequently 
enough to warrant caching in AsmPrinter, so remove it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100336 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 18:06:11 +00:00
Chris Lattner
b23569aff0 Momentous day: remove the "O" member from AsmPrinter. Now all 
"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100327 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 08:18:47 +00:00
Chris Lattner
9d7efd3081 mcize a bunch more stuff, using EmitRawText for things we 
don't have mcstreamer support for yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100319 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 07:05:53 +00:00
Chris Lattner
7ad07c4636 convert the non-MCInstPrinter'ized EmitInstruction 
implementations to use EmitRawText instead of writing
directly to "O".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100318 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 06:12:20 +00:00
Chris Lattner
c75c028a15 fix PrintAsmOperand and PrintAsmMemoryOperand to pass down 
raw_ostream to print to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100313 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 05:29:35 +00:00
Chris Lattner
d374087be5 fix an ugly wart in the MCInstPrinter api where the 
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100307 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 05:04:31 +00:00
Chris Lattner
35c33bd772 change a ton of code to not implicitly use the "O" raw_ostream 
member of AsmPrinter.  Instead, pass it in explicitly.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100306 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 04:47:45 +00:00
Mon P Wang
20adc9dc46 Reapply address space patch after fixing an issue in MemCopyOptimizer. 
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100304 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-04 03:10:48 +00:00
Chris Lattner
0c08d09204 asmstreamerize the .size directive for function bodies, force clients 
of printOffset to pass in a stream to print to.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100296 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-03 22:28:33 +00:00
Johnny Chen
7fed809484 Get rid of the middleman (ARMAlgorithm), which causes more trouble than the 
abstraction it brings.  And also get rid of the atexit() handler, it does not
belong in the lib directory. :-)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100265 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-03 04:10:56 +00:00
Johnny Chen
b7aaed83e2 Fix comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100259 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-03 01:17:30 +00:00
Johnny Chen
b35ae7f7d6 Register ARMAlgorithm::DoCleanup() to be called on exit to free the memory 
occuplied by the cached ARMAlgorithm objects.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100258 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-03 01:09:47 +00:00
Johnny Chen
a70261550e Fix another build warning. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100251 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 23:43:38 +00:00
Johnny Chen
b68a3ee82a Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgen 
backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100233 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 22:27:38 +00:00
Sean Callanan
7626476733 Added support for reporting operand token ranges 
to the ARM AsmParser.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100232 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 22:27:05 +00:00
Chris Lattner
c7f3ace20c use DebugLoc default ctor instead of DebugLoc::getUnknownLoc() 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100214 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 20:16:16 +00:00
Mon P Wang
e754d3fb85 Revert r100191 since it breaks objc in clang 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100199 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 18:43:02 +00:00
Mon P Wang
e33c848fa4 Reapply address space patch after fixing an issue in MemCopyOptimizer. 
Added support for address spaces and added a isVolatile field to memcpy, memmove, and memset,
e.g., llvm.memcpy.i32(i8*, i8*, i32, i32) -> llvm.memcpy.p0i8.p0i8.i32(i8*, i8*, i32, i32, i1)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100191 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 18:04:15 +00:00
Dale Johannesen
93d6a7e9c2 Teach AnalyzeBranch, RemoveBranch and the branch 
folder to be tolerant of debug info following the
branch(es) at the end of a block.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100168 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-02 01:38:09 +00:00
Jim Grosbach
1118b5e490 vml[as] are slow on 1136jf-s also. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@100066 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-04-01 00:13:43 +00:00