Dan Gohman
ae3a0be92e
Split the Add, Sub, and Mul instruction opcodes into separate
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integer and floating-point opcodes, introducing
FAdd, FSub, and FMul.
For now, the AsmParser, BitcodeReader, and IRBuilder all preserve
backwards compatability, and the Core LLVM APIs preserve backwards
compatibility for IR producers. Most front-ends won't need to change
immediately.
This implements the first step of the plan outlined here:
http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-04 22:49:04 +00:00
Bill Wendling
4ff5047240
This looks like it passes now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72485 91177308-0d34-0410-b5e6-96231b3b80d8
2009-05-27 17:43:21 +00:00
Rafael Espindola
bb46f52027
Add the private linkage.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62279 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-15 20:18:42 +00:00
Dan Gohman
bc0b56732a
The list-td and list-tdrr schedulers don't yet support physreg
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scheduling dependencies. Add assertion checks to help catch
this.
It appears the Mips target defaults to list-td, and it has a
regression test that uses a physreg dependence. Such code was
liable to be miscompiled, and now evokes an assertion failure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@62177 91177308-0d34-0410-b5e6-96231b3b80d8
2009-01-13 20:24:13 +00:00
Duncan Sands
f509224510
Fix PR2667: add soft float support for sint_to_fp/uint_to_fp
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where the argument is an apint, or smaller than the minimum
size for which there is a libcall (i32).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58994 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-10 17:36:26 +00:00
Duncan Sands
7cb07874dc
Turn on LegalizeTypes, the new type legalization
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codegen infrastructure, by default. Please report
any breakage to the mailing lists.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@58232 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-27 08:42:46 +00:00
Evan Cheng
efa533957d
FIX PR2794. Make sure SIGN_EXTEND_INREG nodes introduced by LegalizeSetCCOperands are leglized. Patch by Richard Pennington.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57460 91177308-0d34-0410-b5e6-96231b3b80d8
2008-10-13 18:46:18 +00:00
Bruno Cardoso Lopes
f19063b33f
Added testcase for bswap allegrexel intrinsic
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@56225 91177308-0d34-0410-b5e6-96231b3b80d8
2008-09-15 19:38:11 +00:00
Bruno Cardoso Lopes
65ad452536
Support added for ctlz intrinsic, test case added.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54516 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 06:16:31 +00:00
Bruno Cardoso Lopes
ab243df91f
[Last] Batch 7 of Mips CodeGen tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54512 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:12:42 +00:00
Bruno Cardoso Lopes
4230586091
Batch 6 of Mips CodeGen tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54511 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:11:30 +00:00
Bruno Cardoso Lopes
0b4e136c74
Batch 5 of Mips CodeGen tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54510 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:09:57 +00:00
Bruno Cardoso Lopes
29b4ff7c73
Batch 4 of Mips CodeGen tests
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2008-08-08 04:08:30 +00:00
Bruno Cardoso Lopes
ba3442fc24
Batch 3 of Mips CodeGen tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54508 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:05:51 +00:00
Bruno Cardoso Lopes
e5813b7aa8
Batch 2 of Mips CodeGen tests
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54507 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 04:03:25 +00:00
Bruno Cardoso Lopes
6d523c0fe3
Batch 1 of Mips CodeGen tests, more coming...
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I had a lot of simple local codegen tests and they are now ready to be placed
in test/CodeGen.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@54506 91177308-0d34-0410-b5e6-96231b3b80d8
2008-08-08 03:58:34 +00:00