Bill Wendling
1b7a81d3ae
And now support for MMX logical operations.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35125 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 09:44:46 +00:00
Evan Cheng
3cd4e5095b
Sink a binary expression into its use blocks if it is a loop invariant
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computation used as GEP indexes and if the expression can be folded into
target addressing mode of GEP load / store use types.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35123 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:46:27 +00:00
Evan Cheng
2770747216
Added isLegalAddressExpression(). Only allows X +/- C for now.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35122 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:43:56 +00:00
Evan Cheng
14245a9d62
Added isLegalAddressExpression hook to test if the given expression can be
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folded into target addressing mode for the given type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35121 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:42:32 +00:00
Evan Cheng
2864eee7a3
These forward declarations are not needed.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35120 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 08:41:06 +00:00
Nick Lewycky
4c70875774
Add more comments and update to new asm syntax.
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Add new micro-optimizations.
Add icmp predicate snuggling. Given %x ULT 4, "icmp ugt %x, 2" becomes
"icmp eq %x, 3". This doesn't apply in any non-trivial cases yet due to missing
support for NE values in ValueRanges.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35119 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-16 02:37:39 +00:00
Bill Wendling
74027e98f1
Multiplication support for MMX.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35118 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:24:36 +00:00
Evan Cheng
56fdd7af88
Debugging output stuff.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35117 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 21:19:28 +00:00
Reid Spencer
5eb77c7674
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35116 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 03:26:42 +00:00
Reid Spencer
44f87ee746
Revert last changes as they introduced other problems.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35115 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-15 03:25:34 +00:00
Evan Cheng
8f7d26bce7
ARM isel should match ldr x +/- x * (2^n) to ldr [x, +/- x, lsl #log2(n)].
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35114 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:26:40 +00:00
Reid Spencer
3fae7ba5b5
Regenerate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35113 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:13:06 +00:00
Reid Spencer
be5c50cb33
The sign information was not propagating into the rename map so only the
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last entry stored in the map could be retrieved for a given integer type.
Propagating the sign information required an invasive change to ensure that
all ValueRef (ValID) instances get the right sign information as well. Also,
put in some assertions to ensure the RenameMap always gives us out the type
that is expected.
This fixes PR1256 and
test/Assembler/2007-03-14-UgpradeLocalSignless.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35112 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:11:45 +00:00
Reid Spencer
c1882215a0
For PR1256:
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Carry sign with ValID and make TypeInfo sortable (useful in a map).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35111 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:08:04 +00:00
Reid Spencer
8ee16fbc73
Test case for PR1256.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35110 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 23:07:24 +00:00
Evan Cheng
c6deb3d447
Estimate a cost using the possible number of scratch registers required and use
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it as a late BURR scheduling tie-breaker.
Intuitively, it's good to push down instructions whose results are liveout so
their long live ranges won't conflict with other values which are needed inside
the BB. Further prioritize liveout instructions by the number of operands which
are calculated within the BB.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35109 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:43:40 +00:00
Evan Cheng
ba693005e9
Under X86-64 large code model, do not emit 32-bit pc relative calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35108 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 22:11:11 +00:00
Evan Cheng
4485d3897b
Notes about codegen issues.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35107 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 21:03:53 +00:00
Duncan Sands
edd174bcca
Test that the size of a view converted object is determined by the target
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type, not the source type.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35106 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 20:24:53 +00:00
Evan Cheng
e70ef98043
Clean up.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35105 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 20:20:19 +00:00
Evan Cheng
774be29769
Oops.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35104 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:44:58 +00:00
Jim Laskey
c760a920d5
Change e-mail address.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35103 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:32:21 +00:00
Jim Laskey
dd4ef1b540
Add link to exception handling.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35102 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:31:19 +00:00
Jim Laskey
d201f4ed62
Adding credit for PPC changes.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35101 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:30:33 +00:00
Jim Laskey
d0d39b685b
First draft of exception handling doc.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35100 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 19:29:42 +00:00
Jeff Cohen
91f76be8ac
Make older versions of bison happy.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35099 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 15:27:17 +00:00
Jeff Cohen
fb062ece96
Fix for VS 2005 problem supplied by Morten Ofstad.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35098 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 15:25:21 +00:00
Evan Cheng
a19ac52863
X86-64 JIT is in large code model. Need stubs for direct calls.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35097 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:51:55 +00:00
Evan Cheng
8510dc086e
x86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35096 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:48:08 +00:00
Evan Cheng
5c0b61a64b
Preliminary support for X86-64 JIT stub codegen.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35095 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 10:44:30 +00:00
Zhou Sheng
adc149549d
ShiftAmt might equal to zero. Handle this situation.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35094 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 09:07:33 +00:00
Zhou Sheng
9670445cd4
Enable KnownZero/One.clear().
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35093 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-14 03:21:24 +00:00
Evan Cheng
507e639b2e
New test.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35091 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 23:31:47 +00:00
Evan Cheng
31a6e9f7ed
This got better.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35090 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 23:26:41 +00:00
Evan Cheng
61230d18d2
Try schedule def + use closer whne Sethi-Ullman numbers are the same.
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e.g.
t1 = op t2, c1
t3 = op t4, c2
and the following instructions are both ready.
t2 = op c3
t4 = op c4
Then schedule t2 = op first.
i.e.
t4 = op c4
t2 = op c3
t1 = op t2, c1
t3 = op t4, c2
This creates more short live intervals which work better with the register
allocator.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35089 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 23:25:11 +00:00
Evan Cheng
a13fd108f2
AM2 can match 2^n +/- 1. e.g. ldr r3, [r2, r2, lsl #2 ]
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35088 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 21:05:54 +00:00
Evan Cheng
961f879ed8
Zero is always a legal AM immediate.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35087 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:37:59 +00:00
Evan Cheng
1d95816db5
Correct type info for isLegalAddressImmediate() check.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35086 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 20:34:37 +00:00
Duncan Sands
56eef22a07
Test support for arrays with non-zero first index.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35084 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 15:12:35 +00:00
Nicolas Geoffray
b2ec1cc6cb
Stack and register alignment of call arguments in the ELF ABI
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35083 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 15:02:46 +00:00
Chris Lattner
bc1dbfce62
ifdef out some dead code.
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Fix PR1244 and Transforms/InstCombine/2007-03-13-CompareMerge.ll
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35082 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 14:27:42 +00:00
Chris Lattner
7e9e9c6121
testcase for PR1244
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35081 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 14:25:35 +00:00
Zhou Sheng
b277b16593
For expression like
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"APInt::getAllOnesValue(ShiftAmt).zextOrCopy(BitWidth)",
to handle ShiftAmt == BitWidth situation, use zextOrCopy() instead of
zext().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35080 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 06:40:59 +00:00
Zhou Sheng
b991dfeae7
Add zextOrCopy() into APInt for convenience.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35079 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 06:16:26 +00:00
Zhou Sheng
771dbf7677
In APInt version ComputeMaskedBits():
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1. Ensure VTy, KnownOne and KnownZero have same bitwidth.
2. Make code more efficient.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35078 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 02:23:10 +00:00
Evan Cheng
e8308df0b9
Implement getTargetLowering() or else LSR won't be using ARM specific hooks.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35077 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-13 01:20:42 +00:00
Evan Cheng
c289faf015
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35076 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:37:10 +00:00
Evan Cheng
b01fad6d19
Updated TargetLowering LSR addressing mode hooks for ARM and Thumb.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35075 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:30:29 +00:00
Evan Cheng
861939152d
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35074 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:29:01 +00:00
Evan Cheng
a8a155e77f
More flexible TargetLowering LSR hooks for testing whether an immediate is
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a legal target address immediate or scale.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@35073 91177308-0d34-0410-b5e6-96231b3b80d8
2007-03-12 23:28:50 +00:00