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21a9a98b77
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116 Commits

Author SHA1 Message Date
Akira Hatanaka
21a9a98b77 [mips] Do not tail-call optimize vararg functions or functions with byval 
arguments.

This is rather conservative and should be fixed later to be more aggressive.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166851 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-27 00:56:56 +00:00
Akira Hatanaka
f084847373 Add method MipsTargetLowering::writeVarArgRegs which copies argument registers 
of vararg functions back to the stack.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166844 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-27 00:21:13 +00:00
Akira Hatanaka
db40edeb11 Add method MipsTargetLowering::passByValArg. 
This method emits nodes for passing byval arguments in registers and stack.
This has the same functionality as existing functions PassByValArg64 and
WriteByValArg which will be deleted later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166843 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-27 00:16:36 +00:00
Akira Hatanaka
eb98ae46bc Add method MipsTargetLowering::copyByValRegs. 
This method copies byval arguments passed in registers onto the stack and has
the same functionality as existing functions CopyMips64ByValRegs and
ReadByValArg which will be deleted later.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166841 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-27 00:10:18 +00:00
Akira Hatanaka
7887c90a7b Add class MipsCC which provides methods used to analyze formal and call 
arguments and inquire about calling convention information.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166840 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-26 23:56:38 +00:00
Akira Hatanaka
2b861be96e [mips] Add code to do tail call optimization. 
Currently, it is enabled only if option "enable-mips-tail-calls" is given and
all of the callee's arguments are passed in registers.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166342 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 21:47:33 +00:00
Akira Hatanaka
58d1e3f72a Add node and enum for mips tail call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166318 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-19 20:59:39 +00:00
Akira Hatanaka
97d9f081a9 Implement MipsTargetLowering::CanLowerReturn. 
Patch by Sasa Stankovic. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@165585 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-10-10 01:27:09 +00:00
Akira Hatanaka
01f7089bca MIPS DSP: Branch on Greater Than or Equal To Value 32 in DSPControl Pos Field instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164751 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 02:15:57 +00:00
Akira Hatanaka
fd89e6ffda MIPS DSP: add support for extract-word instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164749 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-27 02:05:42 +00:00
Akira Hatanaka
b430cecc0e Add MIPS DSP register classes. Set actions of DSP vector operations and override 
TargetLowering's callback functions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164431 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:58:31 +00:00
Akira Hatanaka
6fad5e742d SelectionDAG node enums for MIPS DSP nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164430 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-09-21 23:52:47 +00:00
Akira Hatanaka
1d165f1c25 Expand DYNAMIC_STACKALLOC nodes rather than doing custom-lowering. 
The frame object which points to the dynamically allocated area will not be
needed after changes are made to cease reserving call frames.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161076 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-31 20:54:48 +00:00
Akira Hatanaka
3fef29d881 Implement MipsTargetLowering::LowerSELECT_CC to custom lower SELECT_CC. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160064 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-11 19:32:27 +00:00
Akira Hatanaka
ba584fe8fe Lower RETURNADDR node in Mips backend. 
Patch by Sasa Stankovic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160031 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-07-11 00:53:32 +00:00
Akira Hatanaka
864f66085c Fix coding style violations. Remove white spaces and tabs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158471 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-14 21:10:56 +00:00
Akira Hatanaka
e193b32583 Set a higher value for maxStoresPerMemcpy in MipsISelLowering.cpp. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@158414 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-13 19:33:32 +00:00
Akira Hatanaka
1cd0ec007a Define functions MipsTargetLowering::LowerLOAD and LowerSTORE which 
custom-lower unaligned load and store nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157864 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:03:49 +00:00
Akira Hatanaka
b6f1dc2f09 Define Mips specific unaligned load/store nodes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157863 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-06-02 00:03:12 +00:00
Justin Holewinski
d2ea0e10cb Change interface for TargetLowering::LowerCallTo and TargetLowering::LowerCall 
to pass around a struct instead of a large set of individual values.  This
cleans up the interface and allows more information to be added to the struct
for future targets without requiring changes to each and every target.

NV_CONTRIB

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157479 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-25 16:35:28 +00:00
Akira Hatanaka
a284acb8a7 Expand 64-bit shifts if target ABI is O32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156457 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-09 00:55:21 +00:00
Eric Christopher
50ab03954e Add support for the 'I' inline asm constraint. Also add tests 
from the previous 2 patches.

Patch by Jack Carter.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156279 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-05-07 03:13:32 +00:00
Akira Hatanaka
c12a6e6b53 Emit abs.s or abs.d only if -enable-no-nans-fp-math is supplied by user. 
Invalid operation is signaled if the operand of these instructions is NaN.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@154545 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-04-11 22:49:04 +00:00
Craig Topper
79aa3417eb Reorder includes in Target backends to following coding standards. Remove some superfluous forward declarations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152997 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-17 18:46:09 +00:00
Akira Hatanaka
0a40c2353c Lower SETCC nodes during legalization. Previously, it was lowered in DAG combine pass. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152450 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-03-09 23:46:03 +00:00
Evan Cheng
4bfcd4acbc Re-commit r151623 with fix. Only issue special no-return calls if it's a direct call. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151645 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 18:51:51 +00:00
Daniel Dunbar
20bd5296ce Revert r151623 "Some ARM implementaions, e.g. A-series, does return stack prediction. ...", it is breaking the Clang build during the Compiler-RT part. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151630 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 15:36:07 +00:00
Jia Liu
bb481f8820 remove blanks, and some code format 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151625 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 07:46:26 +00:00
Evan Cheng
ec52aaa12f Some ARM implementaions, e.g. A-series, does return stack prediction. That is, 
the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.

Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.

rdar://8979299


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151623 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-28 06:42:03 +00:00
Akira Hatanaka
6c2cf8b1fb Add a new MachineJumpTableInfo entry type, EK_GPRel64BlockAddress, which is 
needed to emit a 64-bit gp-relative relocation entry. Make changes necessary
for emitting jump tables which have entries with directive .gpdword. This patch
does not implement the parts needed for direct object emission or JIT.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149668 91177308-0d34-0410-b5e6-96231b3b80d8
 2012-02-03 04:33:00 +00:00
Akira Hatanaka
6df7e23f0c Rename WrapperPIC. It is now used for both pic and static. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146232 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-09 01:53:17 +00:00
Akira Hatanaka
ca0747917d Implement 64-bit support for thread local storage handling. 
- Modify lowering of global TLS address nodes.
- Modify isel of ThreadPointer.
- Wrap target global TLS address nodes that are operands of loads with WrapperPIC. 
- Remove Mips-specific DAG nodes TlsGd, TprelHi and TprelLo, which can be
  substituted with other existing nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@146175 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-12-08 20:34:32 +00:00
Akira Hatanaka
68698cc20d Make the type of shift amount i32 in order to reduce the number of shift 
instruction definitions.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143989 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-11-07 18:59:49 +00:00
Akira Hatanaka
2ec69faf26 Add variable IsO32 to MipsTargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@143213 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-28 18:47:24 +00:00
Akira Hatanaka
a5903acd6b Modify lowering of GlobalAddress so that correct code is emitted when target is 
Mips64.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141618 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-10-11 00:55:05 +00:00
Akira Hatanaka
8b4198da9d Define variable HasMips64 in MipsTargetLowering. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@140569 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-26 21:47:02 +00:00
Duncan Sands
28b77e968d Add codegen support for vector select (in the IR this means a select 
with a vector condition); such selects become VSELECT codegen nodes.
This patch also removes VSETCC codegen nodes, unifying them with SETCC
nodes (codegen was actually often using SETCC for vector SETCC already).
This ensures that various DAG combiner optimizations kick in for vector
comparisons.  Passes dragonegg bootstrap with no testsuite regressions
(nightly testsuite as well as "make check-all").  Patch mostly by
Nadav Rotem.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139159 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-09-06 19:07:46 +00:00
Akira Hatanaka
77b85b6474 Move pattern matching for EXT and INS to post-legalization DAGCombine per Bruno's comment. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137831 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 17:45:08 +00:00
Akira Hatanaka
bb15e117d3 Add support for ext and ins. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137804 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-17 02:05:42 +00:00
Akira Hatanaka
5c21c9e78e Define unaligned load and store. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137515 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-08-12 21:30:06 +00:00
Eli Friedman
1464846801 Code generation for 'fence' instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@136283 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-27 22:21:52 +00:00
Akira Hatanaka
db54826f20 Lower memory barriers to sync instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135537 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-19 23:30:50 +00:00
Eric Christopher
314aff1474 Remove getRegClassForInlineAsmConstraint for Mips. 
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134084 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-29 19:04:31 +00:00
Akira Hatanaka
21afc63ea7 Re-apply 132758 and 132768 which were speculatively reverted in 132777. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133494 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-21 00:40:49 +00:00
Eric Christopher
6f3661fdcd Speculatively revert 132758 and 132768 to try to fix the Windows buildbots. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132777 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-09 16:03:19 +00:00
Akira Hatanaka
69b9044c66 Fix bug in lowering of DYNAMIC_STACKALLOC nodes. The correct offset of the 
dynamically allocated stack area was not set.




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132758 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-08 21:28:09 +00:00
Akira Hatanaka
2e591477af Custom-lower FRAMEADDR. Patch by Sasa Stankovic. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132444 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-02 00:24:44 +00:00
Bruno Cardoso Lopes
4e694c96f1 This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor, 
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132323 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-31 02:54:07 +00:00
Bruno Cardoso Lopes
d979686bb4 This patch implements the thread local storage. Implemented are General 
Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-31 02:53:58 +00:00
Akira Hatanaka
342837d0dc Define a wrapper node for target constant nodes (tglobaladdr, etc.). 
Need this to prevent emitting illegal conditional move instructions. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132240 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-28 01:07:07 +00:00