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2223aea6ed
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779 Commits

Author SHA1 Message Date
Chris Lattner
2223aea6ed Implement matching constraints. We can now say things like this: 
%C = call int asm "xyz $0, $1, $2, $3", "=r,r,r,0"(int %A, int %B, int 4)

and get:

xyz r2, r3, r4, r2

note that the r2's are pinned together.  Yaay for 2-address instructions.

2342 ----------------------------------------------------------------------


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25893 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-02 00:25:23 +00:00
Nate Begeman
da06e9e665 *** empty log message *** 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25879 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 19:05:15 +00:00
Chris Lattner
4e4b576e2e Implement simple register assignment for inline asms. This allows us to compile: 
int %test(int %A, int %B) {
  %C = call int asm "xyz $0, $1, $2", "=r,r,r"(int %A, int %B)
  ret int %C
}

into:

 (0x8906130, LLVM BB @0x8902220):
        %r2 = OR4 %r3, %r3
        %r3 = OR4 %r4, %r4
        INLINEASM <es:xyz $0, $1, $2>, %r2<def>, %r2, %r3
        %r3 = OR4 %r2, %r2
        BLR

which asmprints as:

_test:
        or r2, r3, r3
        or r3, r4, r4
        xyz $0, $1, $2      ;; need to print the operands now :)
        or r3, r2, r2
        blr


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25878 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 18:59:47 +00:00
Nate Begeman
750ac1bdfa Fix some of the stuff in the PPC README file, and clean up legalization 
of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25875 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 07:19:44 +00:00
Chris Lattner
a55079a5cc Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25866 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:29:47 +00:00
Chris Lattner
2cc2f66c25 adjust to changes in InlineAsm interface. Fix a few minor bugs. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25865 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-02-01 01:28:23 +00:00
Evan Cheng
b8973bd8f5 Allow the specification of explicit alignments for constant pool entries. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25855 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 22:23:14 +00:00
Evan Cheng
59ad781e01 Allow custom lowering of fabs. I forgot to check in this change which 
caused several test failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25852 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 18:14:25 +00:00
Chris Lattner
19c5c4cca9 Only insert an AND when converting from BR_COND to BRCC if needed. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25832 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 05:04:52 +00:00
Chris Lattner
6656dd1a78 Handle physreg input/outputs. We now compile this: 
int %test_cpuid(int %op) {
        %B = alloca int
        %C = alloca int
        %D = alloca int
        %A = call int asm "cpuid", "=eax,==ebx,==ecx,==edx,eax"(int* %B, int* %C, int* %D, int %op)
        %Bv = load int* %B
        %Cv = load int* %C
        %Dv = load int* %D
        %x = add int %A, %Bv
        %y = add int %x, %Cv
        %z = add int %y, %Dv
        ret int %z
}

to this:

_test_cpuid:
        sub %ESP, 16
        mov DWORD PTR [%ESP], %EBX
        mov %EAX, DWORD PTR [%ESP + 20]
        cpuid
        mov DWORD PTR [%ESP + 8], %ECX
        mov DWORD PTR [%ESP + 12], %EBX
        mov DWORD PTR [%ESP + 4], %EDX
        mov %ECX, DWORD PTR [%ESP + 12]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 8]
        add %EAX, %ECX
        mov %ECX, DWORD PTR [%ESP + 4]
        add %EAX, %ECX
        mov %EBX, DWORD PTR [%ESP]
        add %ESP, 16
        ret

... note the proper register allocation.  :)

it is unclear to me why the loads aren't folded into the adds.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25827 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-31 02:03:41 +00:00
Chris Lattner
73e142f2b6 Fix a bug in my legalizer reworking that caused the X86 backend to not get 
a chance to custom legalize setcc, which broke a bunch of C++ Codes.
Testcase here: CodeGen/X86/2006-01-30-LongSetcc.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25821 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 22:43:50 +00:00
Chris Lattner
0e753d617b don't insert an and node if it isn't needed here, this can prevent folding 
of lowered target nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25804 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 04:22:28 +00:00
Chris Lattner
c6fd6cd65c Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 04:09:27 +00:00
Chris Lattner
5c413bc451 pass the address of MaskedValueIsZero into isMaskedValueZeroForTargetNode, 
to permit recursion


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25799 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 03:49:37 +00:00
Chris Lattner
87c890a9c2 adjust prototype 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-30 03:49:07 +00:00
Chris Lattner
6862dbc446 Fix RET of promoted values on targets that custom expand RET to a target node. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25794 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 21:02:23 +00:00
Chris Lattner
68a17febc7 cleanups to the ValueTypeActions interface 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25785 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 08:42:06 +00:00
Chris Lattner
3e6e8cc26b clean up interface to ValueTypeActions 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25783 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 08:41:12 +00:00
Chris Lattner
70814bc384 Remove some special case hacks for CALLSEQ_*, using UpdateNodeOperands 
instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25780 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 07:58:15 +00:00
Chris Lattner
8ca05e0c30 Allow custom expansion of ConstantVec nodes. PPC will use this in the future. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25774 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:34:16 +00:00
Chris Lattner
3181a771ff Legalize ConstantFP into TargetConstantFP when the target allows. Implement 
custom expansion of ConstantFP nodes.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25772 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:26:56 +00:00
Chris Lattner
03d5e877fd eliminate uses of SelectionDAG::getBR2Way_CC 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25767 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-29 06:00:45 +00:00
Chris Lattner
c52ad4f04e Use the new "UpdateNodeOperands" method to simplify LegalizeDAG and make it 
faster.  This cuts about 120 lines of code out of the legalizer (mostly code
checking to see if operands have changed).

It also fixes an ugly performance issue, where the legalizer cloned the entire
graph after any change.  Now the "UpdateNodeOperands" method gives it a chance
to reuse nodes if the operands of a node change but not its opcode or valuetypes.

This speeds up instruction selection time on kimwitu++ by about 8.2% with a
release build.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25746 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 10:58:55 +00:00
Chris Lattner
809ec11088 add another method variant 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25744 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 10:09:25 +00:00
Chris Lattner
df6eb30fa9 add some methods for updating nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25742 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 09:32:45 +00:00
Chris Lattner
948c1b1cda minor tweaks 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25740 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 08:31:04 +00:00
Chris Lattner
22cde6a518 move a bunch of code, no other change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25739 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 08:25:58 +00:00
Chris Lattner
7cd2997a83 remove a couple more now-extraneous legalizeop's 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25738 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 08:22:56 +00:00
Chris Lattner
5c62f337fe fix a bug 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25737 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 07:42:08 +00:00
Chris Lattner
456a93afce Several major changes: 
1. Pull out the expand cases for BSWAP and CT* into a separate function,
   reducing the size of LegalizeOp.
2. Fix a bug where expand(bswap i64) was wrong when i64 is legal.
3. Changed LegalizeOp/PromoteOp so that the legalizer never needs to be
   iterative.  It now operates in a single pass over the nodes.
4. Simplify a LOT of code, with a net reduction of ~280 lines.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25736 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 07:39:30 +00:00
Chris Lattner
8137c9e41d Eliminate the need for ExpandOp to set 'needsanotheriteration', as it already 
relegalizes the stuff it returns.

Add the ability to custom expand ADD/SUB, so that targets don't need to deal
with ADD_PARTS/SUB_PARTS if they don't want.

Fix some obscure potential bugs and simplify code.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25732 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 05:07:51 +00:00
Chris Lattner
9c6b4b8c3a Instead of making callers of ExpandLibCall legalize the result, make 
ExpandLibCall do it itself.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25731 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 04:28:26 +00:00
Chris Lattner
0e8ea71a4f Eliminate the need to do another iteration of the legalizer after inserting 
a libcall.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25730 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 04:23:12 +00:00
Chris Lattner
04c62c78f4 remove method I just added 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25728 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 03:43:09 +00:00
Chris Lattner
4f16e70faa add a new callback 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25727 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 03:37:03 +00:00
Nate Begeman
0aed7840ec Implement Promote for VAARG, and allow it to be custom promoted for people 
who don't want the default behavior (Alpha).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25726 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 03:14:31 +00:00
Nate Begeman
61af66e687 Add a missing case to the dag combiner. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25723 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 01:06:30 +00:00
Chris Lattner
0ff5c27a00 Remove the ISD::CALL and ISD::TAILCALL nodes 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25721 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-28 00:18:58 +00:00
Nate Begeman
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for 
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-27 21:09:22 +00:00
Chris Lattner
acc43bf4ab Teach the scheduler to emit the appropriate INLINEASM MachineInstr for an 
ISD::INLINEASM node.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25668 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 23:28:04 +00:00
Chris Lattner
ce7518ce92 initial selectiondag support for new INLINEASM node. Note that inline asms 
with outputs or inputs are not supported yet. :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25664 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 22:24:51 +00:00
Chris Lattner
4ccb070f15 Implement a method for inline asm support 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25660 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 20:37:03 +00:00
Evan Cheng
cdf3838bf1 Clean up some code; improve efficiency; and fixed a potential bug involving 
chain successors.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25630 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-26 00:30:29 +00:00
Reid Spencer
2a8e6186e9 Don't break the optimized build (by incorrect placement of #endif) 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25613 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 21:49:13 +00:00
Chris Lattner
ee4a76563a initialize an instance var, apparently I forgot to commit this long ago 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25609 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:57:15 +00:00
Evan Cheng
46c01cfe9f No need to keep track of top and bottom nodes in a group since the vector is 
already in order. Thanks Jim for pointing it out.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25608 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:54:24 +00:00
Evan Cheng
0577a22c67 Set SchedulingForLatency to be the default scheduling preference for all. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25607 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:52:42 +00:00
Nate Begeman
acc398c195 First part of bug 680: 
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 18:21:52 +00:00
Jeff Cohen
44c687d0af Fix VC++ compilation error. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25604 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 17:17:49 +00:00
Evan Cheng
cd1419af1e Bottom up register usage reducing list scheduler. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25601 91177308-0d34-0410-b5e6-96231b3b80d8
 2006-01-25 09:14:32 +00:00