Commit Graph

1361 Commits

Author SHA1 Message Date
Evan Cheng
223547ab31 - Allow XMM load (for scalar use) to be folded into ANDP* and XORP*.
- Use XORP* to implement fneg.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25857 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:28:30 +00:00
Evan Cheng
598463fde4 Remove entries on fabs and fneg. These are done.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25856 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 22:26:21 +00:00
Chris Lattner
259e97cc72 * Fix 80-column violations
* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25854 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 19:43:35 +00:00
Evan Cheng
ef6ffb17c7 Added custom lowering of fabs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25831 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 03:14:29 +00:00
Chris Lattner
8e38ae60c7 Another high-prio selection performance bug
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25828 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 02:10:06 +00:00
Chris Lattner
594086d494 more mumbling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25826 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 00:45:37 +00:00
Chris Lattner
bdde465bcf add some notes
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25825 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-31 00:20:38 +00:00
Evan Cheng
6dfa999c01 Don't generate complex sequence for SETOLE, SETOLT, SETULT, and SETUGT. Flip
the order of the compare operands and generate SETOGT, SETOGE, SETUGE, and
SETULE instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25824 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 23:41:35 +00:00
Evan Cheng
02568ff48d i64 -> f32, f32 -> i64 and some clean up.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25818 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 22:13:22 +00:00
Evan Cheng
6dab05363f Always use FP stack instructions to perform i64 to f64 as well as f64 to i64
conversions. SSE does not have instructions to handle these tasks.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25817 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 08:02:57 +00:00
Chris Lattner
c6fd6cd65c Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25803 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 04:09:27 +00:00
Chris Lattner
87c890a9c2 adjust prototype
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25798 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-30 03:49:07 +00:00
Chris Lattner
c7097afe51 add another note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25789 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:46:06 +00:00
Chris Lattner
5164a313e0 add some performance notes from looking at sgefa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25788 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:42:20 +00:00
Chris Lattner
6a28456e18 add a high-priority SSE issue from sgefa
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25787 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:14:47 +00:00
Chris Lattner
b638cd89db add a missed optimization
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25786 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 09:08:15 +00:00
Reid Spencer
2ce5b263ba Add a note about lowering llvm.memset, llvm.memcpy, and llvm.memmove to a
few stores under certain conditions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25777 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:48:25 +00:00
Chris Lattner
0fc9c26e7d remove now-dead code, the legalizer takes care of this for us
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25776 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:45:31 +00:00
Chris Lattner
44d9b9bb86 The FP stack doesn't support UNDEF, ask the legalizer to legalize it
instead of lying and saying we have it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25775 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:44:22 +00:00
Chris Lattner
a54aa94197 Targets all now request ConstantFP to be legalized into TargetConstantFP.
'fpimm' in .td files is now TargetConstantFP.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25771 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 06:26:08 +00:00
Jeff Cohen
b8643ac476 Fix typo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25760 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-29 03:45:35 +00:00
Jeff Cohen
c4013d6772 Flesh out AMD family/models.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25755 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 20:30:18 +00:00
Jeff Cohen
216d281d0a Correctly determine CPU vendor.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25754 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 19:48:34 +00:00
Jeff Cohen
a349640b7f Use union instead of reinterpret_cast.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25751 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:47:32 +00:00
Jeff Cohen
7617717496 Fix recognition of Intel CPUs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25750 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:38:20 +00:00
Chris Lattner
c2fad16155 Is64Bit reflects the capability of the chip, not an aspect of the target os
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25749 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:23:48 +00:00
Chris Lattner
dabbc98396 Fix a bunch of JIT failures with the new isel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25748 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:19:37 +00:00
Jeff Cohen
41adb0d679 Improve X86 subtarget support for Windows and AMD.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25747 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 18:09:06 +00:00
Chris Lattner
6b2469c1ad silence a warning
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25745 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 10:34:47 +00:00
Chris Lattner
1e39a15b42 make this work on non-native hosts
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25734 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-28 06:05:41 +00:00
Evan Cheng
d41e9e5e7a A bit of wisdom from Chris on the last entry.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25715 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:54:32 +00:00
Evan Cheng
85214ba3cc AT&T assembly convention: registers are in lower case.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25714 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:53:29 +00:00
Chris Lattner
104988a16a initialize all instance vars
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25711 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:37:09 +00:00
Evan Cheng
e826a018b9 Added notes about a x86 isel deficiency.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25706 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 22:11:01 +00:00
Evan Cheng
dbd38d7f64 Added a temporary option -enable-x86-sse to enable sse support. It is used by
llc-beta.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25701 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:49:34 +00:00
Evan Cheng
8e44f0756f Bye bye Pattern ISel, hello DAG ISel.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25700 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:26:54 +00:00
Nate Begeman
ee625573b5 Remove TLI.LowerReturnTo, and just let targets custom lower ISD::RET for
the same functionality.  This addresses another piece of bug 680.  Next,
on to fixing Alpha VAARG, which I broke last time.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25696 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 21:09:22 +00:00
Evan Cheng
b3a7e21b7e A better workaround
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25692 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 19:30:30 +00:00
Chris Lattner
9f96a32831 force sse/3dnow off until they work. This fixes all the x86 failures last night
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25690 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 18:30:50 +00:00
Chris Lattner
c2493c45a0 Unbreak the JIT with SSE
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25688 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 18:27:18 +00:00
Evan Cheng
559806f575 x86 CPU detection and proper subtarget support
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25679 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 08:10:46 +00:00
Chris Lattner
cedc6f4b30 PHI and INLINEASM are now built-in instructions provided by Target.td
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25674 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-27 01:46:15 +00:00
Jeff Cohen
9471c8a93b Improve compatibility with VC2005, patch by Morten Ofstad!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25661 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 20:41:32 +00:00
Chris Lattner
38f7373018 Improve compatibility with VC2005, patch by Morten Ofstad!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25653 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 19:55:20 +00:00
Evan Cheng
97c7fc351e Added preliminary x86 subtarget support.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25645 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 09:53:06 +00:00
Evan Cheng
67caa39e4c Work around some x86 Darwin assembler bugs
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25638 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 02:27:43 +00:00
Evan Cheng
9bba894596 When trying to fold X86::SETCC into a Select, make a copy if it has more than
one use. This allows more CMOV instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25634 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 02:13:10 +00:00
Evan Cheng
71fb9ad5d9 Remove the uses of STATUS flag register. Rely on node property SDNPInFlag,
SDNPOutFlag, and SDNPOptInFlag instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25629 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-26 00:29:36 +00:00
Nate Begeman
acc398c195 First part of bug 680:
Remove TLI.LowerVA* and replace it with SDNodes that are lowered the same
way as everything else.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25606 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 18:21:52 +00:00
Evan Cheng
0b2afbd58a X86 prefer scheduling for reduced register pressure.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25602 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-25 09:15:17 +00:00