Commit Graph

73635 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
87360f73ae Reapply r134047 now that the world is ready for it.
This patch will sometimes choose live range split points next to
interference instead of always splitting next to a register point. That
means spill code can now appear almost anywhere, and it was necessary
to fix code that didn't expect that.

The difficult places were:

- Between a CALL returning a value on the x87 stack and the
  corresponding FpPOP_RETVAL (was FpGET_ST0). Probably also near x87
  inline assembly, but that didn't actually show up in testing.

- Between a CALL popping arguments off the stack and the corresponding
  ADJCALLSTACKUP.

Both are fixed now. The only place spill code can't appear is after
terminators, see SplitAnalysis::getLastSplitPoint.

Original commit message:

Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art.

This function has to deal with a lot of special cases, and the old
version got it wrong sometimes. In particular, it would sometimes leave
multiple uses in the stack interval in a single block. That causes bad
code with multiple reloads in the same basic block.

The new version handles block entry and exit in a single pass. It first
eliminates all the easy cases, and then goes on to create a local
interval for the blocks with difficult interference. Previously, we
would only create the local interval for completely isolated blocks.

It can happen that the stack interval becomes completely empty because
we could allocate a register in all edge bundles, and the new local
intervals deal with the interference. The empty stack interval is
harmless, but we need to remove a SplitKit assertion that checks for
empty intervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134125 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:30:39 +00:00
Andrew Trick
60ac719c85 indvars -disable-iv-rewrite: handle an edge case involving identity phis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134124 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:27:23 +00:00
Eric Christopher
5244c4cc2f Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134123 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:20:03 +00:00
Eric Christopher
0a1509e779 Make sure we use the correct register class here since we'll need to
care about spill values.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134122 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 01:05:46 +00:00
Eric Christopher
5d8aa345dd Fix a small thinko for constant i64 lock/orq optimization where we
we didn't have an opcode for 64-bit constant or expressions.

Fixes rdar://9692967


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134121 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 00:48:30 +00:00
Bill Wendling
9287a6eef3 * Use the proper size to output the range size.
* Rough in the compact encoding part.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134119 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-30 00:30:52 +00:00
Bill Wendling
4498d39680 Stupid error: If the LSDA and Personality functions aren't there, emit 0 instead
of the encoding.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134117 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:53:16 +00:00
Devang Patel
272511f518 Revert r133953 for now.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134116 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:50:13 +00:00
Bill Wendling
9056e90320 We don't want to use relocations inside the compact unwind section. Just use the
symbols instead.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134115 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:49:12 +00:00
Jim Grosbach
f6fd90910a Remove redundant Thumb2 ADD/SUB SP instruction definitions.
Unlike Thumb1, Thumb2 does not have dedicated encodings for adjusting the
stack pointer. It can just use the normal add-register-immediate encoding
since it can use all registers as a source, not just R0-R7. The extra
instruction definitions are just duplicates of the normal instructions with
the (not well enforced) constraint that the source register was SP.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134114 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:25:04 +00:00
Jakob Stoklund Olesen
6531bddb86 Always adjust the stack pointer immediately after the call.
Some x86-32 calls pop values off the stack, and we need to readjust the
stack pointer after the call. This happens when ADJCALLSTACKUP is
eliminated.

It could happen that spill code was inserted between the CALL and
ADJCALLSTACKUP instructions, and we would compute wrong stack pointer
offsets for those frame index references.

Fix this by inserting the stack pointer adjustment immediately after the
call instead of where the ADJCALLSTACKUP instruction was erased.

I don't have a test case since we don't currently insert code in that
position. We will soon, though. I am testing a regalloc patch that
didn't work on Linux because of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134113 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:11:39 +00:00
Andrew Trick
cc359d9fa2 indvars -disable-iv-rewrite: insert new trunc instructions carefully.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134112 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:03:57 +00:00
Andrew Trick
3290239daf Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point
that dominates the given Use.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134111 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 23:01:52 +00:00
Andrew Trick
45f454d569 whitespace
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134110 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 22:52:51 +00:00
Cameron Zwarich
faff127319 In the ARM global merging pass, allow extraneous alignment specifiers. This pass
already makes the assumption, which is correct on ARM, that a type's alignment is
less than its alloc size. This improves codegen with Clang (which inserts a lot of
extraneous alignment specifiers) and fixes <rdar://problem/9695089>.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134106 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 22:24:25 +00:00
Jim Grosbach
ae218dee5e ARM RSCS* don't need explicit TableGen decoder checks.
They've been pseudos for a while now, so the decoder will never see
them in the first place.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134101 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 22:01:15 +00:00
Evan Cheng
33b259f46c Indentation
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134100 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 21:58:37 +00:00
Eric Christopher
fa6f5917af Remove getRegClassForInlineAsmConstraint from the ARM port.
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134095 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 21:10:36 +00:00
Eric Christopher
50cf9b38dc Remove todo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134094 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 21:05:54 +00:00
Rafael Espindola
00258d17cd make compose and isMoveInstr static functions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134093 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 20:55:48 +00:00
Jim Grosbach
74472b4bf9 Refactor away tSpill and tRestore pseudos in ARM backend.
The tSpill and tRestore instructions are just copies of the tSTRspi and
tLDRspi instructions, respectively. Just use those directly instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134092 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 20:26:39 +00:00
Eric Christopher
1e965641dc Add a TODO for the Alpha port inline asm constraints.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134089 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 19:41:27 +00:00
Eric Christopher
46b65f7a2b Move Alpha from getRegClassForInlineAsmConstraint to
getRegForInlineAsmConstraint.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134088 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 19:40:01 +00:00
Eric Christopher
38d6426523 Update comment for getRegForInlineAsmConstraint for Mips.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134087 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 19:33:04 +00:00
Eric Christopher
1c24ba9fad Move the Blackfin port away from getRegClassForInlineAsmConstraint by
creating a few specific register classes.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134086 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 19:30:29 +00:00
Eric Christopher
193f7e2eb0 Remove getRegClassForInlineAsmConstraint from MBlaze. Add a TODO comment
for the port.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134085 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 19:12:24 +00:00
Eric Christopher
314aff1474 Remove getRegClassForInlineAsmConstraint for Mips.
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134084 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 19:04:31 +00:00
Eric Christopher
158bf50787 Remove getRegClassForInlineAsmConstraint from sparc.
Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134083 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 18:53:10 +00:00
Eric Christopher
ca42299619 Move XCore from getRegClassForInlineAsmConstraint to
getRegForInlineAsmConstraint.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134080 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 17:53:29 +00:00
Eric Christopher
d176af8cf3 Use getRegForInlineAsmConstraint instead of custom defining regclasses
via vectors.

Part of rdar://9643582


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134079 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 17:23:50 +00:00
Evan Cheng
0b0669a056 Add missing operand. rdar://9694169
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134078 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 17:14:00 +00:00
Chad Rosier
ce77aa3edc Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and
lifetime intrinsics" due to buildbot failures.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134071 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 16:22:11 +00:00
Jim Grosbach
254cf03a45 Asm parser range checking on .<size> <value> directives.
For example, ".byte 256" would previously assert() when emitting an object
file. Now it generates a diagnostic that the literal value is out of range.

rdar://9686950


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134069 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 16:05:14 +00:00
Benjamin Kramer
8981bce73f Don't depend on the optimization reverted in r134067.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134068 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 14:07:18 +00:00
Benjamin Kramer
bdd1ef2dbe Revert a part of r126557 which could create unschedulable DAGs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134067 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 13:47:25 +00:00
Francois Pichet
2e10b08744 Change AsmName's type from StringRef to std::string. AsmName was pointing to a temporary string object that was destroyed. This is undefined behavior and MSVC didn't like it.
This fixes over 300+ failing tests on MSVC.
Credit for this fix goes to chapuni.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134064 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 11:25:34 +00:00
Rafael Espindola
0fb7dcd48f Let simplify cfg simplify bb with only debug and lifetime intrinsics.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134057 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 05:25:47 +00:00
NAKAMURA Takumi
c4a84304a0 Fix CMake build.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134055 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 03:26:17 +00:00
Andrew Trick
11745d4c02 indvars -disable-iv-rewrite: just because SCEV ignores casts doesn't
mean they can be removed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134054 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 03:13:40 +00:00
Jakob Stoklund Olesen
2c0cbce763 Revert r134047 while investigating a llvm-gcc-i386-linux-selfhost
miscompile.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134053 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 02:03:36 +00:00
Evan Cheng
ab8be96fd3 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134049 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 01:14:12 +00:00
Evan Cheng
d807674c8b Trim include
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134048 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 00:35:31 +00:00
Jakob Stoklund Olesen
4d517e34e5 Rewrite RAGreedy::splitAroundRegion, now with cool ASCII art.
This function has to deal with a lot of special cases, and the old
version got it wrong sometimes. In particular, it would sometimes leave
multiple uses in the stack interval in a single block. That causes bad
code with multiple reloads in the same basic block.

The new version handles block entry and exit in a single pass. It first
eliminates all the easy cases, and then goes on to create a local
interval for the blocks with difficult interference. Previously, we
would only create the local interval for completely isolated blocks.

It can happen that the stack interval becomes completely empty because
we could allocate a register in all edge bundles, and the new local
intervals deal with the interference. The empty stack interval is
harmless, but we need to remove a SplitKit assertion that checks for
empty intervals.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134047 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-29 00:24:24 +00:00
Daniel Dunbar
ade490a829 build/Darwin: Fix epic typo fail.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134036 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 22:30:17 +00:00
NAKAMURA Takumi
5876298e36 Fix a CMake warning, following up to r134008.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134033 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:46:21 +00:00
Evan Cheng
a01b58af85 Unbreak every backend.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134031 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:33:11 +00:00
Evan Cheng
d5b03f252c Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 21:14:33 +00:00
Evan Cheng
6844f7bcde Hide more details in tablegen generated MCRegisterInfo ctor function.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:44:22 +00:00
Evan Cheng
94b01f6882 Add MCInstrInfo registeration machinery.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134026 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:29:03 +00:00
Evan Cheng
22fee2dff4 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134024 91177308-0d34-0410-b5e6-96231b3b80d8
2011-06-28 20:07:07 +00:00