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387 Commits

Author SHA1 Message Date
Rafael Espindola
1189027f9d Fix cmake build. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133830 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 22:01:28 +00:00
Evan Cheng
a347f85dbe Starting to refactor Target to separate out code that's needed to fully describe 
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133782 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-24 01:44:41 +00:00
Jay Foad
7d715dfe6d Fix a FIXME by making GlobalVariable::getInitializer() return a 
const Constant *.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133400 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-19 18:37:11 +00:00
Jakob Stoklund Olesen
f28987b76e Use set operations instead of plain lists to enumerate register classes. 
This simplifies many of the target description files since it is common
for register classes to be related or contain sequences of numbered
registers.

I have verified that this doesn't change the files generated by TableGen
for ARM and X86. It alters the allocation order of MBlaze GPR and Mips
FGR32 registers, but I believe the change is benign.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133105 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-15 23:28:14 +00:00
Jakob Stoklund Olesen
2a9d1ca9c2 Remove custom allocation order boilerplate that is no longer needed. 
The register allocators automatically filter out reserved registers and
place the callee saved registers last in the allocation order, so custom
methods are no longer necessary just for that.

Some targets still use custom allocation orders:

ARM/Thumb: The high registers are removed from GPR in thumb mode. The
NEON allocation orders prefer to use non-VFP2 registers first.

X86: The GR8 classes omit AH-DH in x86-64 mode to avoid REX trouble.

SystemZ: Some of the allocation orders are omitting R12 aliases without
explanation. I don't understand this target well enough to fix that. It
looks like all the boilerplate could be removed by reserving the right
registers.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132781 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-09 16:56:59 +00:00
Eric Christopher
471e422480 Add a parameter to CCState so that it can access the MachineFunction. 
No functional change.

Part of PR6965


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-08 23:55:35 +00:00
Jakob Stoklund Olesen
4f3fb6d08b Flag unallocatable register classes instead of giving them empty 
allocation orders.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132509 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-02 23:07:24 +00:00
Richard Osborne
a9b08aa25e Fix 80 column violations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132341 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-31 16:30:33 +00:00
Richard Osborne
9497466190 Add XCore intrinsic for crc8. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132340 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-31 16:24:49 +00:00
Richard Osborne
7736c37c14 Add XCore intrinsic for crc32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132336 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-31 14:47:36 +00:00
Rafael Espindola
6e032942cf Use the dwarf->llvm mapping to print register names in the cfi 
directives.

Fixes PR9826.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132317 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-30 20:20:15 +00:00
Rafael Espindola
fc2bb8c444 Replace the -unwind-tables option with a per function flag. This is more 
LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132033 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-25 03:44:17 +00:00
Devang Patel
8ec0c1c07b Remove dead code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131974 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-24 18:27:52 +00:00
Eli Friedman
fc5d305597 Make the logic for determining function alignment more explicit. No functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131012 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-06 20:34:06 +00:00
Jay Foad
ddcdcc8863 Remove unused STL header includes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130068 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-23 19:53:52 +00:00
Chris Lattner
7a2bdde0a0 Fix a ton of comment typos found by codespell. Patch by 
Luis Felipe Strano Moraes!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129558 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-15 05:18:47 +00:00
Richard Osborne
e8f3533323 Add XCore intrinsics for initializing / starting / synchronizing threads. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128633 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-31 15:13:13 +00:00
Richard Osborne
11bd0784d9 Add XCore intrinsic for setpsc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127821 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-17 18:42:05 +00:00
Richard Osborne
e17139b3e9 Add XCore intrinsics for setclk, setrdy. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127761 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 21:56:00 +00:00
Richard Osborne
bb057453db Add checkevent intrinsic to check if any resources owned by the current thread 
can event.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127741 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-16 18:34:00 +00:00
Richard Osborne
59f727e57e Don't indent cases in a switch, no functionality change. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127681 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 15:55:30 +00:00
Richard Osborne
8ae8cf4559 On the XCore the scavenging slot should be closest to the SP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127680 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 15:10:11 +00:00
Richard Osborne
5aad8b3e78 Add XCore intrinsics for getps, setps, setsr and clrsr. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127678 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 13:45:47 +00:00
Owen Anderson
95771afbfd Allow targets to specify a the type of the RHS of a shift parameterized on the type of the LHS. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126518 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-25 21:41:48 +00:00
Richard Osborne
21d7eb3f3b Add XCore intrinsic for eeu instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126384 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-24 13:39:18 +00:00
Richard Osborne
d04b4937d1 Add XCore intrinsic for clre instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126322 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 18:52:05 +00:00
Richard Osborne
9935bd0819 Add llvm.xcore.waitevent intrinsic. The effect of this intrinsic is to enable 
events on the thread and wait until a resource is ready to event. The vector
of the resource that is ready is returned.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126320 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 18:35:59 +00:00
Richard Osborne
292f62e06f Add XCore intrinsic for the setv instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126315 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 16:46:37 +00:00
Richard Osborne
2254d0eaa1 Fix format for setc instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126314 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 15:20:16 +00:00
Richard Osborne
2a2cb28526 Add XCore intrinsic for settw instruction. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126313 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-23 14:45:03 +00:00
Richard Osborne
d83318450b Add XCore intrinsics for various instructions on ports. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126132 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-21 18:23:30 +00:00
Oscar Fuentes
00d78f1348 Use explicit add_subdirectory's for LLVM target sublibraries instead 
of testing for its presence at cmake time.

This way the build automatically regenerates the makefiles when a svn
update brings in a new sublibrary.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126068 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-20 02:55:27 +00:00
Stuart Hastings
a901129169 Swap VT and DebugLoc operands of getExtLoad() for consistency with 
other getNode() methods.  Radar 9002173.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125665 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-16 16:23:55 +00:00
Richard Osborne
59982f3ffc Add intrinsic for setc instruction on the XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125186 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-09 13:22:12 +00:00
Richard Osborne
17c1e51d22 Add XCore intrinsics for resource instructions. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124794 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-03 13:14:25 +00:00
Richard Osborne
ff0c5014b2 Add support for trampolines on the XCore. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124722 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-02 14:57:41 +00:00
Rafael Espindola
1c13026e8f Remove more duplicated code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124056 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-23 04:43:11 +00:00
Rafael Espindola
c85dca66e6 Remove duplicated code. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124054 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-23 04:28:49 +00:00
Jakob Stoklund Olesen
f7ca976e74 Fix a few more places that should use MBB::getLastNonDebugInstr(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123408 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-13 22:47:43 +00:00
Anton Korobeynikov
7af6fad0a7 Update CMake stuff 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123171 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-10 12:39:23 +00:00
Anton Korobeynikov
16c29b5f28 Rename TargetFrameInfo into TargetFrameLowering. Also, put couple of FIXMEs and fixes here and there. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123170 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-10 12:39:04 +00:00
Evan Cheng
0521928ae7 Re-implement r122936 with proper target hooks. Now getMaxStoresPerMemcpy 
etc. takes an option OptSize. If OptSize is true, it would return
the inline limit for functions with attribute OptSize.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122952 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-06 06:52:41 +00:00
Chris Lattner
036609bd7d Flag -> Glue, the ongoing saga 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122513 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-23 18:28:41 +00:00
Chris Lattner
f1b4eafbfe rename MVT::Flag to MVT::Glue. "Flag" is a terrible name for 
something that just glues two nodes together, even if it is
sometimes used for flags.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122310 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-21 02:38:05 +00:00
Anton Korobeynikov
94c5ae0875 Move more PEI-related hooks to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120229 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:25 +00:00
Anton Korobeynikov
cd775ceff0 Move callee-saved regs spills / reloads to TFI 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120228 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-27 23:05:03 +00:00
Anton Korobeynikov
d9e3385ced Move getInitialFrameState() to TargetFrameInfo 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119754 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 23:25:52 +00:00
Anton Korobeynikov
d0c3817669 Move hasFP() and few related hooks to TargetFrameInfo. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119740 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-18 21:19:35 +00:00
Anton Korobeynikov
3346491223 First step of huge frame-related refactoring: move emit{Prologue,Epilogue} out of TargetRegisterInfo to TargetFrameInfo, which is definitely much better suitable place 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119097 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-15 00:06:54 +00:00
Chris Lattner
1139691e3a move all the target's asmprinters into the main target. The piece 
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119056 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-14 18:43:56 +00:00