Commit Graph

3184 Commits

Author SHA1 Message Date
Evan Cheng
260e07ec8c Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48578 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-20 02:18:41 +00:00
Evan Cheng
dff1dcac6c Add intrinsics to match mmx shift builtin's with immediate operand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48569 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 23:38:52 +00:00
Arnold Schwaighofer
4fe3073cfb Don't loose incoming argument registers. Fix documentation style.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48545 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 16:39:45 +00:00
Christopher Lamb
15cbde3cf6 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48542 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-19 08:30:06 +00:00
Bill Wendling
bebc3642d3 On Darwin, GCC issues a ".globl" for something that has a "visibility protected"
attribute instead of ".protected".


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48516 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 23:38:12 +00:00
Evan Cheng
586ccac4ec Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48515 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-18 23:36:35 +00:00
Evan Cheng
d183307639 Unbreak JIT. Ignore TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48447 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-17 06:56:52 +00:00
Nate Begeman
bc4efb8ac7 Add a couple missing SSE4 instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48430 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16 21:14:46 +00:00
Christopher Lamb
c929823525 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48412 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-16 03:12:01 +00:00
Evan Cheng
da47e6e0d0 Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48380 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-15 00:03:38 +00:00
Evan Cheng
029d9dafa0 Fix some 80 col violations.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48361 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 07:46:48 +00:00
Evan Cheng
172b794cd5 Fix a number of encoding bugs. SSE 4.1 instructions MPSADBWrri, PINSRDrr, etc. have 8-bits immediate field (ImmT == Imm8).
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48360 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 07:39:27 +00:00
Evan Cheng
17ed8fa63d Add debugging stuff.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48359 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 07:13:42 +00:00
Chris Lattner
69a74ab421 Add an issue that is preventing instcombine from doing a simplification.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48356 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-14 06:00:19 +00:00
Christopher Lamb
6634e26aa1 Get rid of a pseudo instruction and replace it with subreg based operation on real instructions, ridding the asm printers of the hack used to do this previously. In the process, update LowerSubregs to be careful about eliminating copies that have side affects.
Note: the coalescer will have to be careful about this too, when it starts coalescing insert_subreg nodes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48329 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-13 05:47:01 +00:00
Chris Lattner
58d74910c6 Reimplement the parameter attributes support, phase #1. hilights:
1. There is now a "PAListPtr" class, which is a smart pointer around
   the underlying uniqued parameter attribute list object, and manages
   its refcount.  It is now impossible to mess up the refcount.
2. PAListPtr is now the main interface to the underlying object, and
   the underlying object is now completely opaque.
3. Implementation details like SmallVector and FoldingSet are now no
   longer part of the interface.
4. You can create a PAListPtr with an arbitrary sequence of
   ParamAttrsWithIndex's, no need to make a SmallVector of a specific 
   size (you can just use an array or scalar or vector if you wish).
5. All the client code that had to check for a null pointer before
   dereferencing the pointer is simplified to just access the 
   PAListPtr directly.
6. The interfaces for adding attrs to a list and removing them is a
   bit simpler.

Phase #2 will rename some stuff (e.g. PAListPtr) and do other less 
invasive changes.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48289 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 17:45:29 +00:00
Evan Cheng
c8e3b147ee Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48279 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-12 07:02:50 +00:00
Anton Korobeynikov
4d86e2a6b8 Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48257 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:38:53 +00:00
Dan Gohman
bfae83139d Use PassManagerBase instead of FunctionPassManager for functions
that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48256 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 22:29:46 +00:00
Chris Lattner
e12ecf272d Implement basic support for the 'f' register class constraint. This basically
works, but probably won't if you mix it with 't' or 'u' yet.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48243 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 19:50:13 +00:00
Chris Lattner
1d38677e34 coalesce away 80-bit floating point copies.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48241 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 19:30:09 +00:00
Chris Lattner
07f7cc3ddb convert a massive if statement to a switch.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48240 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 19:28:17 +00:00
Chris Lattner
fce84acbbc start handling the 'f' x87 constraint.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48239 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 19:06:29 +00:00
Christopher Lamb
1bc1008b38 Missed part of recommit.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48224 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 10:27:36 +00:00
Christopher Lamb
1fab4a6bbb Recommitting parts of r48130. These do not appear to cause the observed failures.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48223 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 10:09:17 +00:00
Evan Cheng
204496d58e In 32-bit mode, mark 64-bit GPR's as unallocatable.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48217 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 07:16:00 +00:00
Nick Lewycky
3c78697a3c Fix the build on gcc 4.2.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48212 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 05:56:09 +00:00
Chris Lattner
447ff68c08 Change the model for FP Stack return to use fp operands on the
RET instruction instead of using FpSET_ST0_32.  This also generalizes
the code to handling returning of multiple FP results.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48209 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-11 03:23:40 +00:00
Chris Lattner
183275a627 abort with an assert instead of a cerr to get line#
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48199 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:56:08 +00:00
Chris Lattner
03fdec04d1 Don't emit FP_REG_KILL into a block that just returns. Nothing
can be live out of the block anyway, so it isn't needed.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48192 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 23:34:12 +00:00
Chris Lattner
8e6da15e54 Eliminate the FP_GET_ST0/FP_SET_ST0 target-specific dag nodes, just lower to
copyfromreg/copytoreg instead.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48174 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 21:08:41 +00:00
Evan Cheng
d2cde68855 Default ISD::PREFETCH to expand.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48169 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:38:10 +00:00
Evan Cheng
4499e495ea Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48167 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 19:31:26 +00:00
Scott Michel
5b8f82e35b Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48145 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 15:42:14 +00:00
Christopher Lamb
3feb0170a8 Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48130 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 06:12:08 +00:00
Dale Johannesen
b8cafe3427 Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48122 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-10 02:17:22 +00:00
Chris Lattner
f30e1cf9b7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48107 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 09:15:31 +00:00
Chris Lattner
5c927500c8 add some code to support cross-register class copying from
RST -> RFP{32/64/80}.  We only handle ST(0) for now.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48104 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 08:46:19 +00:00
Chris Lattner
90b347dc90 rearrange some code, no functionality change.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48101 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 07:58:04 +00:00
Chris Lattner
8dc023f684 claim ST(x) registers are 80 bits, which is true. This doesn't affect
codegen yet because these can't be spilled (they don't exist until after RA).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48098 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 07:49:01 +00:00
Chris Lattner
afb23f48a4 rename FP_SETRESULT -> FP_SET_ST0
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48094 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 07:08:44 +00:00
Chris Lattner
6fa2f9c636 rename FpGETRESULT32 -> FpGET_ST0_32 etc. Add support for
isel'ing value preserving FP roundings from one fp stack reg to another
into a noop, instead of stack traffic.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48093 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 07:05:32 +00:00
Chris Lattner
67f453aae7 Finish implementing a readme entry: when inserting an i64 variable
into a vector of zeros or undef, and when the top part is obviously
zero, we can just use movd + shuffle.  This allows us to compile
vec_set-B.ll into:

_test3:
	movl	$1234567, %eax
	andl	4(%esp), %eax
	movd	%eax, %xmm0
	ret

instead of:

_test3:
	subl	$28, %esp
	movl	$1234567, %eax
	andl	32(%esp), %eax
	movl	%eax, (%esp)
	movl	$0, 4(%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48090 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 05:42:06 +00:00
Chris Lattner
f68cbceb17 add a note
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48064 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 01:08:22 +00:00
Chris Lattner
62098040a1 Implement a readme entry, compiling
#include <xmmintrin.h>
__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:
	movl	$1, %eax
	movd	%eax, %xmm0
	ret

instead of a constant pool load.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48063 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-09 01:05:04 +00:00
Chris Lattner
19f7969f81 1) Improve comments.
2) Don't try to insert an i64 value into the low part of a 
   vector with movq on an x86-32 target.  This allows us to 
   compile:

__m128i doload64(short x) {return _mm_set_epi16(0,0,0,0,0,0,0,1);}

into:

_doload64:
	movaps	LCPI1_0, %xmm0
	ret

instead of:

_doload64:
	subl	$28, %esp
	movl	$0, 4(%esp)
	movl	$1, (%esp)
	movq	(%esp), %xmm0
	addl	$28, %esp
	ret


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48057 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 22:59:52 +00:00
Chris Lattner
c9517fb6eb minor simplifications to this code, don't create a dead
SCALAR_TO_VECTOR on paths that end up not using it.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48056 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 22:48:29 +00:00
Chris Lattner
b607f9c822 This one looks easy, add a note.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48055 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 22:32:39 +00:00
Chris Lattner
f658ad10f6 move these to the appropriate file
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48054 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 22:28:45 +00:00
Evan Cheng
27b7db549e Implement x86 support for @llvm.prefetch. It corresponds to prefetcht{0|1|2} and prefetchnta instructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@48042 91177308-0d34-0410-b5e6-96231b3b80d8
2008-03-08 00:58:38 +00:00