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12901 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen
feaf34758a Fix a bunch of ARM tests to be register allocation independent. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130800 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 22:31:21 +00:00
Bill Wendling
9493a285d1 Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. 
<rdar://problem/8460511>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 21:11:17 +00:00
Duncan Sands
ad20681cde Implement some basic simplifications involving min/max, for example 
max(a,b) >= a -> true.  According to my super-optimizer, these are
by far the most common simplifications (of the -instsimplify kind)
that occur in the testsuite and aren't caught by -std-compile-opts.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130780 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 19:53:10 +00:00
Evan Cheng
f35907f66b Make the test less likely to fail with minor changes. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130778 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 19:09:32 +00:00
Bob Wilson
22a751ac13 Remove test for iOS divmod function, since that is disabled for now. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130769 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 17:54:49 +00:00
Bruno Cardoso Lopes
54ad87ab78 Add a few ARM coprocessor intrinsics. Testcases included 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130763 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 17:29:22 +00:00
Rafael Espindola
a08bd8963b Pass --disable-cfi to llc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130754 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 15:56:16 +00:00
Eric Christopher
2fc496fcf5 xmm0 is an implicit parameter in this and so shouldn't be in the 
string template.

Fixes rdar://8493866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 01:28:32 +00:00
Dan Gohman
cca82149ad Add an unfolded offset field to LSR's Formula record. This is used to 
model constants which can be added to base registers via add-immediate
instructions which don't require an additional register to materialize
the immediate.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130743 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 00:46:49 +00:00
Rafael Espindola
8ce864e324 Pass -disable-cfi to llc. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130713 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 19:51:34 +00:00
Duncan Sands
448a6d3cc2 Fix PR9579: when simplifying a compare to "true" or "false", and it was 
a vector compare, generate a vector result rather than i1 (and crashing).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130706 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 18:51:41 +00:00
Duncan Sands
f24ed77d24 Move some rem transforms out of instcombine and into instsimplify. 
This automagically provides a transform noticed by my super-optimizer
as occurring quite often: "rem x, (select cond, x, 1)" -> 0.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130694 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 16:27:02 +00:00
Rafael Espindola
2866edf120 Add 130690 back. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130693 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 15:58:16 +00:00
Rafael Espindola
b2d7336fde Revert while I debug the tests that use march but not mtriple. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130691 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 15:42:31 +00:00
Rafael Espindola
433771c514 Move ppc OS X to cfi too. I am building it on an old ppc mini, but it will take some time. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130690 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-02 15:00:52 +00:00
Rafael Espindola
450a5a1207 Add r130623 back now that ELF has been fixed to work with -fno-dwarf2-cfi-asm. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130658 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-01 15:44:13 +00:00
Rafael Espindola
5426a9ee37 GCC uses a different encoding of pointers in the FDE when using 
-fno-dwarf2-cfi-asm. Implement the same behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130637 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-01 04:49:54 +00:00
Rafael Espindola
2b3e12d0cb Revert the previous patch while I figure out how to make llvm-gcc 
less agressive about disabling cfi on linux :-(

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130626 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 23:03:44 +00:00
Rafael Espindola
89fc9e8f5e Enable CFI on OS X. 
Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.

The only two differences I know of are:

* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130623 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 22:29:54 +00:00
Benjamin Kramer
7d6eb5a018 InstCombine: Turn (zext A) udiv (zext B) into (zext (A udiv B)). Same for urem or constant B. 
This obviously helps a lot if the division would be turned into a libcall
(think i64 udiv on i386), but div is also one of the few remaining instructions
on modern CPUs that become more expensive when the bitwidth gets bigger.

This also helps register pressure on i386 when dividing chars, divb needs
two 8-bit parts of a 16 bit register as input where divl uses two registers.

int foo(unsigned char a) { return a/10; }
int bar(unsigned char a, unsigned char b) { return a/b; }

compiles into (x86_64)
_foo:
  imull $205, %edi, %eax
  shrl  $11, %eax
  ret
_bar:
  movzbl        %dil, %eax
  divb  %sil, %al
  movzbl        %al, %eax
  ret

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130615 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 18:16:07 +00:00
Benjamin Kramer
23b02cd031 Use SimplifyDemandedBits on div instructions. 
This folds away silly stuff like (a&255)/1000 -> 0.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130614 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 18:16:00 +00:00
Benjamin Kramer
2f8e038b35 FileCheckize. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130613 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 18:15:53 +00:00
Jakob Stoklund Olesen
8e1e4cf226 Allow folded spills in test. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130599 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 08:00:50 +00:00
Jakob Stoklund Olesen
d5b679c8ce Weekly fix of register allocation dependent unit tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130567 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-30 01:37:52 +00:00
Eli Friedman
b2b03fc2fa Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM. Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130560 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 23:34:52 +00:00
Eli Friedman
c573e2c7ea Switch to ImmLeaf (which can be used by FastISel) for a few more common ARM/Thumb2 patterns. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130552 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 22:48:03 +00:00
Eli Friedman
51864a1d2b Fix run-line, again. :( 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130540 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 21:33:03 +00:00
Eli Friedman
9ebf57ae13 Re-committing r130454, which does not in fact break anything. 
Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130539 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 21:22:56 +00:00
Eric Christopher
bcf26aee86 Add trunc->branch support, this won't help with clang's i8->i1 truncations 
for bools, but is a start.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130534 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 20:02:39 +00:00
Peter Collingbourne
57808b3da0 SimplifyCFG: Expose phi node folding cost threshold as command line parameter 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130528 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 18:47:38 +00:00
Peter Collingbourne
f15907fead SimplifyCFG: Add CostRemaining parameter to DominatesMergePoint 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130527 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 18:47:31 +00:00
Peter Collingbourne
8a70192b51 SimplifyCFG: Add Trunc, ZExt and SExt to the list of cheap instructions for phi node folding 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130526 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 18:47:25 +00:00
Daniel Dunbar
c8497b6a25 MCAsmLayout: Add support for computing the symbol offset of variables. Not 
currently used, because variables don't get reported as being "defined".

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130524 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 18:20:20 +00:00
Daniel Dunbar
90604ab725 MC: Change variable symbols to be recognized as defined, by assigning their sections based on FindAssociatedSection(). 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130523 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 18:20:17 +00:00
Rafael Espindola
7b11a4cbdc Change DwarfCFIException's member variables to track what it actually 
emmits: .cfi_personality, .cfi_lsda and the moves.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130503 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 14:48:51 +00:00
Andrew Trick
d49ffe8284 Teach Thumb2 isel to fold and->rotr ==> ROR. 
Generalization of Nate Begeman's patch!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130502 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 14:18:15 +00:00
Andrew Trick
e02a1501e7 Combine thumb2-ror tests. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130498 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 14:02:41 +00:00
Benjamin Kramer
c2e31c1461 InstCombine: turn (C1 << A) << C2) into (C1 << C2) << A) 
Fixes PR9809.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130485 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 08:15:41 +00:00
Eli Friedman
6e6014cfb3 Revert r130454; apparently this doesn't actually work. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130462 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:55:14 +00:00
Eli Friedman
73359c1327 Fix runline. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130455 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:12:24 +00:00
Eli Friedman
2f7fcd7198 Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register. 
rdar://problem/9338332 .



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130454 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 23:03:25 +00:00
Eli Friedman
d227eedf82 fast-isel sret calls, try 2. We actually do need to do something on x86-32. rdar://problem/9303592 . 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130429 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 20:19:12 +00:00
Eli Friedman
3fb6e00238 Actually revert r130348 correctly. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130418 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 18:20:24 +00:00
Chris Lattner
0a9e3d613b final step needed to resolve PR6627, which allows us to flatten the code down to 
a nice and tidy:
  %x1 = load i32* %0, align 4
  %1 = icmp eq i32 %x1, 1179403647
  br i1 %1, label %if.then, label %if.end

instead of doing lots of loads and branches.  May the FreeBSD bootloader
long fit in its allocated space.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130416 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 18:15:47 +00:00
Eli Friedman
6cf31b0a1a Revert r130348; causing buildbot issues on x86-32. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130412 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 18:06:10 +00:00
Benjamin Kramer
264ac878b2 InstCombine: Merge "(trunc x) == C1 & (and x, CA) == C2" into a single and+icmp. 
This happens when GVN widens loads. Part of PR6627.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130405 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 16:58:40 +00:00
Chris Lattner
4034e14985 teach GVN to widen integer loads when they are overaligned, when doing an 
wider load would allow elimination of subsequent loads, and when the wider
load is still a native integer type.  This eliminates a ton of loads on 
various benchmarks involving struct fields, though it is somewhat hobbled
by clang not being very aggressive about field alignment.

This is yet another step along the way towards resolving PR6627.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130390 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 07:29:08 +00:00
Devang Patel
c26f5447e3 Teach dwarf writer to handle complex address expression for .debug_loc entries. 
This fixes clang generated blocks' variables' debug info.
Radar 9279956.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130373 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 02:22:40 +00:00
Eli Friedman
bd1253809b Fix a silly mistake in r130338. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130360 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 00:42:03 +00:00
Justin Holewinski
5a3cb924c6 PTX: support for bitwise operations on predicates 
- selection of bitwise preds (AND, OR, XOR)
- new bitwise.ll test

Patch by Dan Bailey

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130353 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-28 00:19:51 +00:00