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615 Commits

Author SHA1 Message Date
Bruno Cardoso Lopes
61905f0139 AVX Codegen support for 256-bit versions of vandps, vandpd, vorps, vorpd, vxorps, vxorpd 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@135023 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-13 01:15:33 +00:00
Eli Friedman
af45b3d8cb Add assembler/disassembler support for non-AVX pclmulqdq. While I'm here, use proper aliases for the pclmullqlqdq and friends. PR10269. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-07-05 18:21:20 +00:00
Eli Friedman
a390a1aa48 Add support for movntil/movntiq mnemonics. Reported on llvmdev. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133759 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-23 21:07:47 +00:00
Nick Lewycky
94d4c91bc5 Add support for assembling "movq" when it's correct to do so, while continuing 
to emit "movd" across the board to continue supporting a Darwin assembler bug.
This is the reincarnation of r133452.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133565 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-21 22:45:41 +00:00
Bob Wilson
38c892624b Revert r133452: "Emit movq for 64-bit register to XMM register moves..." 
This is breaking compiler-rt and llvm-gcc builds on MacOSX when not using
the integrated assembler.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133524 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-21 17:35:13 +00:00
Nick Lewycky
1bd15700a0 Emit movq for 64-bit register to XMM register moves, but continue to accept 
movd when assembling.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133452 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-20 18:33:26 +00:00
Bruno Cardoso Lopes
d381a7a91e Add AVX suport for fpextend. 
Original patch by Syoyo Fujita with more comments by me.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@133153 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-16 07:03:21 +00:00
Bruno Cardoso Lopes
9a767330f5 Add one more argument to the prefetch intrinsic to indicate whether it's a data 
or instruction cache access. Update the targets to match it and also teach
autoupgrade.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132976 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-14 04:58:37 +00:00
Stuart Hastings
865f09334f Reapply 132424 with fixes. This fixes PR10068. 
rdar://problem/5993888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132606 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-03 23:53:54 +00:00
Rafael Espindola
251b4a0405 Revert 132424 to fix PR10068. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132479 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-02 19:57:47 +00:00
Stuart Hastings
ec880283b3 Recommit 132404 with fixes. rdar://problem/5993888 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132424 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-01 21:33:14 +00:00
Stuart Hastings
4abc5fea9c Revert 132404 to appease a buildbot. rdar://problem/5993888 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132419 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-01 19:52:20 +00:00
Stuart Hastings
10ff0bbdfb Add support for x86 CMPEQSS and friends. These instructions do a 
floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs.  Only profitable when the user wants a materialized 0
or 1 at runtime.  rdar://problem/5993888


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132404 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-01 17:17:45 +00:00
Stuart Hastings
4fd0dee3bf FGETSIGN support for x86, using movmskps/pd. Will be enabled with a 
patch to TargetLowering.cpp.  rdar://problem/5660695


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132388 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-06-01 04:39:42 +00:00
Chad Rosier
62660310d9 Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist. 
crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].




git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132163 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-26 23:13:19 +00:00
Rafael Espindola
a3f88148e6 Don't produce a vmovntdq if we don't have AVX support. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131330 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-14 00:30:01 +00:00
Bill Wendling
9493a285d1 Replace the "movnt" intrinsics with a native store + nontemporal metadata bit. 
<rdar://problem/8460511>


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130791 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 21:11:17 +00:00
Eric Christopher
2fc496fcf5 xmm0 is an implicit parameter in this and so shouldn't be in the 
string template.

Fixes rdar://8493866


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130747 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-05-03 01:28:32 +00:00
Chris Lattner
bb0fff0cb4 clean up after Sean's r127646 patch. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@130475 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-29 05:40:18 +00:00
Bill Wendling
f93f7b2446 Reapply r129401 with patch for clang. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129419 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-13 00:36:11 +00:00
Bill Wendling
f9b2dc66c8 Revert r129401 for now. Clang is using the old way of doing things. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129403 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 22:59:27 +00:00
Bill Wendling
d5f323d70b Remove the unaligned load intrinsics in favor of using native unaligned loads. 
Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.

First part of <rdar://problem/8460511>.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@129401 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-04-12 22:46:31 +00:00
Sean Callanan
f88896b2a9 Enabled disassembler support for AVX instructions 
in the instruction tables and fixed a few bugs that
were causing decode conflicts.  Rudimentary tests
are coming up in the next patch.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127646 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-15 01:28:15 +00:00
David Greene
a20244d1ba [AVX] Fix mask predicates for 256-bit UNPCKLPS/D and implement 
missing patterns for them.

      Add a SIMD test subdirectory to hold tests for SIMD instruction
      selection correctness and quality.
'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@126845 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-03-02 17:23:43 +00:00
Joerg Sonnenberger
5ad596f9d2 Recognize monitor/mwait with explicit register arguments 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125805 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-18 00:48:11 +00:00
David Greene
ccacdc1952 [AVX] Support VSINSERTF128 with more patterns and appropriate 
infrastructure.  This makes lowering 256-bit vectors to 128-bit
vectors simple when 256-bit vector support is not available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124868 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-04 16:08:29 +00:00
David Greene
c38a03eeca [AVX] VEXTRACTF128 support. This commit includes patterns for 
matching EXTRACT_SUBVECTOR to VEXTRACTF128 along with support routines
to examine and translate index values.  VINSERTF128 comes next.  With
these two in place we can begin supporting more AVX operations as
INSERT/EXTRACT can be used as a fallback when 256-bit support is not
available.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124797 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-02-03 15:50:00 +00:00
Chris Lattner
ccea167db5 fix a missing shuffle pattern, PR9009. Patch by Artiom Myaskouvskey! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124102 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-24 03:42:46 +00:00
Chris Lattner
3a5004dc3e Fix PR8946, a missing reg/reg form of movdqu. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@123242 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-11 17:04:55 +00:00
Chris Lattner
c010e61ae1 fix PR8900, a shuffle miscompilation. Patch by Nadav Rotem! 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122921 91177308-0d34-0410-b5e6-96231b3b80d8
 2011-01-05 22:28:46 +00:00
Nate Begeman
672fb6225b Implement feedback from Bruno on making pblendvb an x86-specific ISD node in addition to being an intrinsic, and convert 
lowering to use it.  Hopefully the pattern fragment is doing the right thing with XMM0, looks correct in testing.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122277 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-20 22:04:24 +00:00
Nate Begeman
b65c175d32 Add support for matching psign & plendvb to the x86 target 
Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122098 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-17 22:55:37 +00:00
Nate Begeman
d191751f0e Add some missing predicates. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 00:54:26 +00:00
Nate Begeman
2ea8ee7c76 Formalize the notion that AVX and SSE are non-overlapping extensions from the compiler's point of view. Per email discussion, we either want to always use VEX-prefixed instructions or never use them, and are taking "HasAVX" to mean "Always use VEX". Passing -mattr=-avx,+sse42 should serve to restore legacy SSE support when desirable. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121439 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-10 00:26:57 +00:00
Nate Begeman
3c49706a61 Add support for AVX to materialize +0.0 when doing scalar FP. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@121415 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-09 21:43:51 +00:00
Benjamin Kramer
1292c22645 Add patterns for the x86 popcnt instruction. 
- Also adds a new POPCNT subtarget feature that is currently enabled if the target
  supports SSE4.2 (nehalem) or SSE4A (barcelona).


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120917 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-04 20:32:23 +00:00
Nate Begeman
07c21d85b4 Scalar f32/f64 are also subregs of ymm regs 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120844 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-12-03 21:54:39 +00:00
Eric Christopher
d872f144e2 Implement a PseudoI class and transfer the sse instructions over to use 
it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120412 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 08:57:23 +00:00
Eric Christopher
228232b282 Rewrite mwait and monitor support and custom lower arguments. 
Fixes PR8573.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@120404 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-30 07:20:12 +00:00
Bruno Cardoso Lopes
a84ad90c06 Fix PR8211 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118445 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-11-08 21:24:59 +00:00
Dale Johannesen
e49406fd63 Fix pastos in handling of AVX cvttsd2si, PR8491. 
Bruno, please review, but I'm pretty sure this is right.
Patch by Alex Mac!



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@117514 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-28 00:35:54 +00:00
Chris Lattner
a228376185 simplify some map operations. 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@116014 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 23:57:02 +00:00
Evan Cheng
835580fc3a Canonicalize X86ISD::MOVDDUP nodes to v2f64 to make sure all cases match. Also eliminate unneeded isel patterns. rdar://8520311 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115977 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-07 20:50:20 +00:00
Chris Lattner
c7252ce743 remove the !nameconcat tblgen feature. It "shorthand" and only used in 4 places 
where !cast is just as short.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115722 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-06 00:19:21 +00:00
Chris Lattner
8d978a75b4 allow !strconcat to take more than two operands to eliminate 
!strconcat(!strconcat(!strconcat(!strconcat

Simplify some x86 td files to use it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115719 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 23:58:18 +00:00
Chris Lattner
748a2fe917 distribute the rest of the contents of X86Instr64bit.td out to 
the right places.  X86Instr64bit.td now dies, long live x86-64!


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115669 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 20:49:15 +00:00
Chris Lattner
5673e1d314 move CMOV_FR32 and friends to InstrCompiler, since they are 
pseudo instructions.

Move POPCNT to InstrSSE since they are SSE4 instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115603 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-10-05 06:41:40 +00:00
Chris Lattner
6f42027263 fix rdar://8490728 - llvm-mc rejects gpr64 form of 'movmskpd' 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115029 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 05:05:03 +00:00
Chris Lattner
f3654db458 add assembler support for the cvtsd2sil/cvtsd2siq mnemonics, rdar://8456382 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115027 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 04:55:40 +00:00
Chris Lattner
b2ef4c1235 add basic avx support to the disassembler, also teach it about ssmem/sdmem 
operands.

With this done, we can remove the _Int suffixes from the round instructions
without the disassembler blowing up.  This allows the assembler to support
them, implementing rdar://8456376 - llvm-mc rejects 'roundss'


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@115019 91177308-0d34-0410-b5e6-96231b3b80d8
 2010-09-29 02:57:56 +00:00